CN103367268B - 基于pcb的射频功率封装窗口框架 - Google Patents
基于pcb的射频功率封装窗口框架 Download PDFInfo
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- CN103367268B CN103367268B CN201310240227.9A CN201310240227A CN103367268B CN 103367268 B CN103367268 B CN 103367268B CN 201310240227 A CN201310240227 A CN 201310240227A CN 103367268 B CN103367268 B CN 103367268B
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- electric insulation
- insulation component
- metal layer
- copper
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Abstract
本发明公开了基于PCB的射频功率封装窗口框架。一种半导体封装包括具有管芯附着区域和周边区域的基板、具有附着到管芯附着区域的第一端子和背对基板的第二端子和第三端子的晶体管管芯、以及包括电绝缘构件的框架,所述电绝缘构件具有附着到基板的周边区域的第一侧、背对基板的第二侧、在绝缘构件的第一侧处的第一金属层和在绝缘构件的第二侧处的第二金属层。该绝缘构件向外延伸超过基板的横向侧壁。第一金属层被附着到第一侧的向外延伸超过基板的横向侧壁的部分。第一和第二金属层在绝缘构件的与基板的横向侧壁间隔开的区域处被电连接。
Description
技术领域
本申请涉及射频功率封装,特别是用于射频功率封装的窗口框架(windowframe)。
背景技术
用于射频功率应用的气腔封装包括具有附着到金属法兰的源极端子的射频功率晶体管管芯和用于将功率晶体管的栅极和漏极引线与源极连接的法兰相隔离的基于陶瓷(氧化铝)的窗口框架。这样的封装相对较昂贵并且具有差的CTE(热膨胀系数)匹配。标准射频功率封装常常利用CPC(铜、铜-钼、铜叠层法兰)、CuW或CuMo法兰来构建,所述CPC(铜、铜-钼、铜叠层法兰)、CuW或CuMo法兰都具有与陶瓷紧密匹配的CTE。然而,法兰的CTE往往会比焊接到法兰上的系统冷却块/片(coin)低很多。法兰和冷却块/片之间的CTE失配产生焊料疲劳、部件破裂和弯曲问题。此外,存在与引线的CTE匹配,使得窗口框架和对应的引线与客户PCB(印刷电路板)是CTE匹配的。
另外,常规射频功率封装具有附着到陶瓷窗口框架并从陶瓷窗口框架向外凸出的栅极和漏极引线。引线提供封装的输入和输出端子。然而,引线通常包括Alloy42、Kovar、铜或类似材料,并且通常是3-7mil厚。这种引线是软的并且在没有被窗口框架支撑的区域中容易弯曲,从而产生用于焊接的底座平面高度的问题。另外,由于射频的趋肤效应,常规金属/陶瓷封装通过高损耗的Ni/Pd/Au或Ni/Au镀层传送射频能量。另一方法是塑料的/模塑的LCP(液晶聚合物)窗口框架以代替陶瓷窗口框架。然而,LCP窗口框架类型封装具有固有的大泄漏问题,这导致降低的可靠性和更高的产品损失。因此,更可靠的、更低成本的气腔射频功率封装是所期望的。
发明内容
根据半导体封装的一个实施例,所述封装包括具有管芯附着区域和周边区域的含铜基板以及晶体管管芯。晶体管管芯具有附着到基板的管芯附着区域的第一端子以及背对基板的第二端子和第三端子。所述封装还包括框架,所述框架包括电绝缘构件,所述电绝缘构件具有附着到基板的周边区域的第一侧、背对基板的第二侧、在绝缘构件的第一侧处的第一含铜金属层(metallization)和在绝缘构件的第二侧处的第二含铜金属层。所述绝缘构件向外延伸超过基板的横向侧壁。第一金属层被附着到第一侧的向外延伸超过基板的横向侧壁的部分。第一和第二金属层在与基板的横向侧壁间隔开的绝缘构件的区域处被电连接。
根据半导体封装的另一实施例,所述封装包括具有内部区域和周边区域的导电基板以及晶体管管芯。晶体管管芯具有附着到基板的内部区域的第一端子以及背对基板的第二端子和第三端子。所述封装还包括电绝缘构件,所述电绝缘构件具有附着到基板的周边区域的较薄区域、向外延伸超过基板的横向侧壁以使得绝缘构件悬于基板之上的较厚区域、以及在内部区域中的接收晶体管管芯的开口。在绝缘构件的背对基板的第一侧处的第一金属层被电连接到晶体管管芯的第二端子。在绝缘构件的第一侧处并与第一金属层间隔开的第二金属层被电连接到晶体管管芯的第三端子。在绝缘构件的第二相对侧处附着到绝缘构件的较厚区域的第三金属层在与基板的横向侧壁间隔开的绝缘构件的区域处被电连接到第一金属层。
根据半导体封装的又一实施例,所述封装包括基板、具有附着到基板的第一侧和背对基板的第二侧的射频功率晶体管管芯以及印刷电路板(PCB)窗口框架。所述PCB窗口框架包括:电绝缘构件,所述电绝缘构件被附着到基板,其中所述管芯位于电绝缘构件的开口中,以及所述电绝缘构件向外延伸超过基板的横向侧壁;第一金属层,其被嵌入或层叠在电绝缘构件的背对基板的一侧上并在晶体管管芯的第二侧处被电连接到晶体管管芯;以及第二金属层,其在电绝缘构件的背对第一金属层的一侧处被嵌入或层叠在电绝缘构件的向外延伸超过基板的横向侧壁的部分上。第二金属层与基板绝缘并在电绝缘构件的远离基板的边缘区域处被电连接到第一金属层。
根据制造半导体封装的方法的一个实施例,所述方法包括:提供具有管芯附着区域和周边区域的含铜基板和包括电绝缘构件的框架,所述电绝缘构件具有第一侧、第二相对侧、在第一侧处的第一含铜金属层和在第二侧处的第二含铜金属层;将晶体管管芯的第一端子附着到基板的管芯附着区域;将绝缘构件的第一侧附着到基板的周边区域以使得第二侧背对该基板,绝缘构件向外延伸超过基板的横向侧壁,以及第一金属层与基板的横向侧壁间隔开;将晶体管管芯的背对基板的第二端子电连接到第二金属层;以及将第一和第二金属层在与基板的横向侧壁间隔开的绝缘构件的区域处电连接。
一阅读下面的详细描述并且一查看附图,本领域技术人员将认识到附加的特征和优点。
附图说明
附图的元件相对于彼此不一定是按比例的。类似的附图标记表示对应的类似部分。各种所示的实施例的特征可以进行组合,除非它们互相排斥。实施例被描绘在附图中并且在后面的描述中被详述。
图1A和1B示出具有直引线配置的基于PCB的功率半导体封装的一个实施例的不同分解图。
图2A和2B示出具有表面安装配置的基于PCB的功率半导体封装的一个实施例的不同分解图。
图3示出基于PCB的功率半导体封装的一个实施例的剖视图。
图4示出基于PCB的功率半导体封装的另一实施例的剖视图。
图5A和5B示出基于PCB的功率半导体封装的又一实施例的不同剖视图。
图6示出基于PCB的功率半导体封装的又一实施例的剖视图。
图7示出基于PCB的功率半导体封装的另一实施例的剖视图。
图8示出其中射频信号路径被突出显示的基于PCB的功率半导体封装的一个实施例的部分剖视图。
图9示出其中射频信号路径被突出显示的基于PCB的功率半导体封装的另一实施例的部分剖视图。
具体实施方式
接下来描述基于PCB(印刷电路板)的功率半导体封装的实施例。所述封装具有金属基板和基于PCB的窗口框架。射频功率晶体管管芯的源极侧被连接到基板。基于PCB的窗口框架将源极与布置在管芯的和源极相对的侧处的栅极和漏极相隔离。所述封装可以利用可选的陶瓷、LCP或基于PCB的盖子封闭以使得所述封装是开放腔封装。在所有情况下,基于PCB的窗口框架是更为成本有效的,提供与基板更好的CTE匹配,以及对于直引线和表面安装配置这二者允许引线配置的高灵活性。例如,铜基板和具有铜迹线的基于PCB的窗口框架具有非常紧密匹配的CTE。基于PCB的窗口框架也是刚性的,并且因此更稳定和不容易弯曲。另外,与现有金属/陶瓷封装相比,基于PCB的封装具有改进的射频传输特性,因为射频信号能量可以通过PCB电介质上高度导电的铜的路线/微带/迹线来传送。
图1A示出具有直引线配置的半导体封装的自顶向下的分解图,以及图1B示出相同封装的自底向上的分解图。所述封装包括基板100、源极侧朝下附着到基板100的一个或多个晶体管管芯110(例如射频功率晶体管管芯,比如功率MOSFET(金属氧化物半导体场效应晶体管)(比如LDMOS(横向扩散的金属氧化物半导体)))、PCB窗口框架120、以及可选的陶瓷、LCP或基于PCB的盖子200。基板100由导电材料(例如铜、CPC(铜、铜-钼、铜叠层结构)或CuW)制成,并且具有与基于PCB的窗口框架120的CTE紧密匹配的CTE。管芯110的源极侧被附着到基板100的内部管芯附着区域102,比如利用软焊料、易熔管芯附着材料(例如AuSi或AuSn),或者使用有机粘合剂。在所有情况下,晶体管管芯110的源极侧被电连接到基板100。PCB窗口框架120包括从层叠、嵌入或以其他方式附着到电绝缘构件122的铜片刻蚀的导电路径、轨道、或信号迹线,所述电绝缘构件122被附着到基板100的外部周边区域104。PCB窗口框架120的绝缘构件122具有用于接收附着到基板100的内部管芯附着区域102的晶体管管芯110和任何其他部件150(举例来说,例如输入和输出匹配电容器、DC阻塞电容器、IPD(集成无源器件)等等)的开口124。绝缘构件122向外延伸超过基板100的横向侧壁106,以向嵌入或层叠到绝缘构件122的相对侧126、128的上方和下方金属层提供支撑。
更详细地,第一金属层130被嵌入或层叠到绝缘构件122的背对基板100的顶侧126,并且在管芯110的背对基板100的顶侧112处被电连接到晶体管管芯110。晶体管110的漏极和栅极端子被设置在管芯110的该侧112处。在一个实施例中,第一金属层130形成封装的输出端子,其被电连接到晶体管管芯110的漏极端子。绝缘构件122的顶侧126可以具有与第一金属层130间隔开的第二金属层132,其向晶体管管芯110的漏极端子提供DC偏置。根据该实施例,第二金属层132形成DC母线(busbar)的类型。还布置在绝缘构件122的顶侧126处的第三金属层134与第一和第二金属层130、132间隔开。第三金属层134形成封装的输入端子,其被电连接到晶体管管芯110的栅极端子。为了易于说明,到管芯110的电连接在图1A和1B中没有被示出,但是可以例如利用本领域已知的接合线来提供。
如图1A中所示,可以在封装的一(输入或栅极)侧处提供输入端子,并且在封装的相对(输出或漏极)侧处提供DC母线和输出端子。可以使用其他类型的晶体管,举例来说,例如IGBT(绝缘栅双极晶体管),其具有替代漏极的集电极和替代源极的发射极。因此,上面描述的源极连接对应于IGBT的发射极,以及上面描述的漏极连接对应于IGBT的集电极。IGBT也具有如上所述连接的栅极端子。也可以使用基于SiC、GaN和GaAs的器件。
PCB窗口框架120的绝缘构件122具有附着到基板100的周边区域104的底侧128。如示出半导体封装的自底向上的分解图的图1B中所示,在绝缘构件122的底侧128处提供附加(下方)金属层。下方金属层中的每一个对应于布置在绝缘构件122的顶侧126处的金属层中的一个。例如,第一下方金属层136对应于顶侧126上的DC母线金属层132,第二下方金属层138对应于顶侧126上的输出端子金属层130,以及第三下方金属层140对应于顶侧126上的输入端子金属层134。附加(下方)金属层136、138、140中的每个被嵌入、层叠或以其他方式附着到向外延伸超过基板100的横向侧壁106的绝缘构件122的底部。这样,下方金属层136、138、140与基板100绝缘。在电绝缘构件绝缘构件122的情况下,每个金属层130、132、134、136、138、140被嵌入或层叠在电绝缘构件122的顶侧126或底侧128上。
上方和下方金属层中对应的金属层在绝缘构件122的与基板100间隔开的区域中相互电连接。例如,在绝缘构件122的底侧128上的第一下方金属层136在绝缘构件122的远离基板100的边缘区域处被电连接到绝缘构件122的顶侧126上的DC母线金属层132。在图1A和1B所示的实施例中,绝缘构件122具有在绝缘构件122的顶侧126和底侧128之间延伸的导电通孔(via)160、162、164,以用于在绝缘构件122的与基板100的横向侧壁106间隔开的区域处电连接对应的上方和下方金属层130/138、132/136、134/140。这样,基于PCB的窗口框架120确保晶体管管芯110的栅极和漏极端子与附着到基板100的管芯110的源极侧相隔离。在一个实施例中,通孔160、162、164包括贯穿绝缘构件122并具有由含铜材料覆盖的侧壁的开口。
图2A示出具有表面安装配置的半导体封装的自顶向下的分解图,以及图2B示出相同封装的自底向上的分解图。图2A和2B中所示的实施例类似于图1A和1B中所示的实施例,除了封装具有表面安装配置,这意味着基板100和基于PCB的窗口框架120可以被直接安装到另一PCB(未在图2A和2B中示出)的表面上并且封装的外部端子在与基板100的底侧相同的平面上或其附近。因此,窗口框架120具有用于接收基板100的较薄内部202和沿着基板100的所有横向侧壁106围绕基板100的较厚外部204。
图3示出图2A和2B中所示的半导体封装在盖子附着之后的剖视图。PCB窗口框架120被附着到基板100的周边区域101,例如使用有机粘合剂、软焊料或易熔窗口框架附着材料105。在软焊料或易熔焊料作为窗口框架附着材料105的情况下,如图3中所示,可以在窗口框架120的附着到基板100的周边区域101的部分上还提供可选的铜环107。可选的铜环107可以被用来提供用于射频应用的射频接地,并处于与基板100以及晶体管管芯110的源极侧(端子)相同的电位。晶体管管芯110的源极侧(端子)可以在绝缘构件122被附着到基板的周边区域101之前被附着到基板100的内部管芯附着区域103。可替换地,绝缘构件122在晶体管管芯110的源极侧(端子)被附着到基板100的内部管芯附着区域103之前被附着到基板100的周边区域101。
在任一情况下,基于PCB的窗口框架120的绝缘构件122具有用于接收附着到基板100的晶体管管芯110和任何其他部件150的开口124。绝缘构件122向外延伸超过基板100的横向侧壁106以便为在绝缘构件122的相对侧126、128处提供的上方和下方金属层130、132、134、136、138、140提供支撑。再次在电绝缘构件绝缘构件122的情况下,金属层130、132、134、136、138、140被嵌入或层叠在电绝缘构件122上。如图3中所示,可选的陶瓷、LCP或基于PCB的盖子200可以被附着到基于PCB的框架120的顶侧以形成附着到基板100的晶体管管芯100和其他电路部件150的外壳,使得半导体封装具有开放腔,所述开放腔被密封并且保护容纳在该外壳内的管芯110、其他部件150和电连接。
图2A、2B和3中所示的基于PCB的窗口框架120的绝缘构件122具有附着到基板100的周边区域101的较薄部分202和邻接基板100的横向侧壁106并从其向外延伸的较厚部分204。上方金属层130、132、134在绝缘构件122的两部分202、204上延伸,以及下方金属层136、138、140仅在绝缘构件122的较厚部分204上延伸,使得下方金属层136、138、140与基板100间隔开并且电隔离。根据该实施例,封装具有表面安装配置,这意味着基板100和基于PCB的窗口框架120可以被直接安装到另一PCB(未在图3中示出)的表面上并且封装的外部端子处于与基板100的底侧相同的平面上或其附近。
图4示出根据另一实施例的半导体封装的剖视图。图4中所示的实施例类似于图3中所示的实施例,然而基于PCB的窗口框架120的绝缘构件122在绝缘构件122的整个长度上具有相对均匀的厚度。根据该实施例,封装具有直引线配置,即非表面安装配置,这意味着封装的外部端子处于与基板100的底侧不同的平面。
图5A和5B示出根据又一实施例的相同半导体封装的两个不同剖视图。图5A和5B中所示的实施例类似于图4中所示的实施例,然而基于PCB的窗口框架120是多层窗口框架。根据该实施例,窗口框架120包括在封装的输出侧处附加(上方)电绝缘构件210,例如在第一(下方)绝缘构件212上的电绝缘构件,使得布置在下方绝缘构件212的顶侧126上的输出端子金属层被插入在上方和下方绝缘构件210、212之间。DC母线金属层132被布置在上方绝缘构件210的背对下方绝缘构件212的(顶)侧上。这样,如图5B中所示,将下方绝缘构件212的顶侧126上的输出端子金属层130连接到下方绝缘构件212的底侧128上的对应金属层138的导电通孔160仅贯穿一个绝缘构件212。相比之下,如图5A中所示,将上方绝缘构件210的顶侧上的DC母线金属层132连接到下方绝缘构件212的底侧128上的对应金属层136的导电通孔162贯穿绝缘构件210、212这二者。导电通孔160、162、164的不同集合是相互电绝缘的。通过减少从晶体管漏极的射频路径的线长度,这样的多层的基于PCB的窗口框架布置改进了封装的射频性能。
例如,非对称Doherty放大器可以具有在基板110的中心部分的主放大器以及在主放大器的一侧的第一峰值放大器和在主放大器另一侧的第二峰值放大器。窗口框架120的上层210可以被用来接合DC电源线,以及窗口框架120的下层212可以被用来接合漏极输出线,因而最小化漏极输出线长度,如上面所解释的那样。减少漏极输出线长度产生改进的射频性能。此外,一般而言,射频信号通过在基于PCB的窗口框架120上的铜迹线来传导,所述铜迹线具有显著更好的导电性,例如与Ni、Ni/Pd/Au相比,其中Pd和Au如此薄以至于射频的大部分发生在Ni层或Ni/Au镀层。如果期望的话,可以提供附加堆叠绝缘构件和对应的金属层以作为基于PCB的窗口框架120的部分。
图6示出根据又一实施例的半导体封装的剖视图。图6中所示的实施例类似于图5A和5B中所示的实施例,然而多层基于PCB的窗口框架120是遵从表面安装的,因为多层窗口框架120具有附着到基板100的周边区域101的较薄部分202和邻接基板100的横向侧壁106并从其向外延伸的较厚部分204。在绝缘构件210、212这二者的顶侧上的金属层130、132、134在窗口框架120的两部分202、204上延伸,以及在下方绝缘构件210的底侧128上的金属层136、138、140仅在窗口框架120的较厚部分204上延伸,使得这些金属层与基板100间隔开并且电隔离。
如同图5A和5B中所示的实施例一样,DC母线金属层132被布置在上方绝缘构件210的背对下方绝缘构件212的顶侧上。这样,将下方绝缘构件212的顶侧126上的输出端子金属层130连接到下方绝缘构件212的底侧128上的对应金属层138的导电通孔160仅贯穿一个绝缘构件212。相比之下,将上方绝缘构件210的顶侧上的DC母线金属层132连接到下方绝缘构件210的底侧128上的对应金属层136的导电通孔162贯穿绝缘构件210、212这二者。底部DC金属层和对应的导电通孔在图6中的视图之外,但是可以具有例如如图5A中所示的类似配置。导电通孔的不同集合是相互电绝缘的。图6还示出在输入、输出和DC金属层134、130、132到附着到基板100的内部区域103的对应的电容器和/或IPD150和射频功率晶体管管芯110的各种接合线连接220。再次,如果期望多于2层的绝缘窗口框架,则可以提供附加堆叠绝缘构件和对应的金属层。
图7示出根据另一实施例的半导体封装的剖视图。图7中所示的实施例类似于图4中所示的实施例,然而绝缘构件122在封装的输入和输出侧处具有金属化的横向侧壁230,其与基板100的横向侧壁106间隔开。这样,布置在绝缘构件122的顶和底侧126、128处的相应金属层130、132、134、136、138、140可以被相互电连接而不利用导电通孔。
图8示出根据射频优化的实施例的半导体封装的部分剖视图。图8示出射频功率晶体管管芯110的源极(发射极)侧向下附着到基板100的部分。窗口框架120的内边缘利用有机粘合剂被粘合到基板100的周边区域101,并且具有如本文先前所述的顶和底金属层130、138。可替换地,焊料可以被用来将窗口框架120的内边缘附着到基板100的周边区域101,如本文先前例如参考图3所述。顶金属层130中的一个被示出为线接合到功率晶体管管芯110的漏极(集电极)。窗口框架120的外边缘例如使用焊料244被附着到另一PCB240的金属化侧242。通过窗口框架120和其他PCB240的射频信号路径用虚线突出显示。
Ni层250被形成在窗口框架120的顶侧金属层130上,以及Au层252被形成在Ni250上。在Ni和Au层250、252之间可以提供可选的Pd层254。射频能量优选尽可能接近地。在图8中所示的基于PCB的窗口框架120的情况下,射频能量行进通过包覆的Cu金属层130、138,而不通过电镀在金属层130的表面上的Ni/Au250、252或Ni/Pd/Au层250、254、252。例如,Cu的趋肤深度在1.88Ghz是1.5微米。因此,5个趋肤深度是7.5微米并且射频能量的约99%通过7.5微米来传送。7.5微米Cu包覆窗口框架顶侧金属层130具有约89.07Siemens-squares的有效表面电导率。图8没有示出在导电通孔160内部的Ni/Au镀层。射频路径也应该广泛地通过通孔160的Cu层,如果在通孔中提供这样的镀层的话。
图9示出根据另一实施例的半导体封装的部分剖视图。图9中所示的实施例类似于图8中所示的实施例,然而封装被配置成用于表面安装配置而不是直引线配置。根据该实施例,基于PCB的窗口框架120的绝缘构件122具有附着到基板100的周边区域101的较薄部分202和邻接基板100的横向侧壁106的较厚部分204。这样,顶侧金属层130、132、134在窗口框架120的两部分202、204上延伸,以及底侧金属层136、138、140仅在窗口框架120的较厚部分204上延伸,使得底侧金属层136、138、140与基板100间隔开并且电隔离。基板100经由焊料252被附着到包括在另一PCB240中的热沉250,如上面参考图8所述,基于PCB的窗口框架120的外边缘被附着到所述另一PCB240。再次,从功率晶体管110的漏极的射频路径包括高导电的铜,即顶侧和底侧金属层130、138,并且对应的导电通孔160可以由含铜材料制成以改进射频性能。
为了易于描述,使用诸如“在...下”、“在下面”、“下方”、“在...上”、“上方”等等之类的空间相对术语以解释一个元件相对于第二元件的定位。这些术语打算除了与附图中所描绘的那些取向不同的取向之外还包括器件的不同取向。此外,诸如“第一”、“第二”等等之类的术语也被用来描述各种元件、区域、部分等等,并且也不打算是限制性的。在整个说明书中相同的术语指代相同的元件。
如在这里所使用的,术语“具有”、“包含”、“包括”、“包括”等等是开放式术语,其指示所述元件或特征的存在,但是不排除附加的元件或特征。冠词“一”、“一个”、“所述”打算包括复数以及单数,除非上下文另有清楚地指示。
应当理解,在这里所述的各种实施例的特征可以相互组合,除非另有专门的说明。
尽管在这里已经示出并描述了特定实施例,但是本领域普通技术人员将认识到,可以用多种替换和/或等同实施来代替所示出并描述的特定实施例而不脱离本发明的范围。本申请打算覆盖在这里讨论的特定实施例的任何适配或变化。因此,本发明打算仅仅通过权利要求及其等同物来限定。
Claims (29)
1.一种半导体封装,包括:
含铜基板,其具有管芯附着区域和周边区域;
晶体管管芯,其具有附着到所述含铜基板的管芯附着区域的第一端子、以及背对所述含铜基板的第二端子和第三端子;以及
包括电绝缘构件的框架,所述电绝缘构件具有附着到所述含铜基板的周边区域的第一侧、背对所述含铜基板的第二侧、在所述电绝缘构件的第一侧处的第一含铜金属层以及在所述电绝缘构件的第二侧处的第二含铜金属层,
其中所述电绝缘构件向外延伸超过所述含铜基板的横向侧壁,所述第一含铜金属层被附着到所述第一侧的向外延伸超过所述含铜基板的横向侧壁的部分,以及所述第一和第二含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处被电连接。
2.根据权利要求1所述的半导体封装,其中,所述电绝缘构件包括附着到所述含铜基板的周边区域的薄部分和邻接所述含铜基板的横向侧壁的厚部分,使得所述半导体封装具有表面安装配置。
3.根据权利要求1所述的半导体封装,其中,所述第一和第二含铜金属层被嵌入或层叠到所述电绝缘构件。
4.根据权利要求1所述的半导体封装,其中,所述电绝缘构件包括在所述电绝缘构件的第一和第二侧之间延伸的导电通孔,所述导电通孔在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处电连接所述第一和第二含铜金属层。
5.根据权利要求4所述的半导体封装,其中,所述导电通孔包括贯穿所述电绝缘构件并具有由含铜材料覆盖的侧壁的开口。
6.根据权利要求1所述的半导体封装,其中,所述电绝缘构件具有与所述含铜基板的横向侧壁间隔开的横向侧壁,以及其中所述第一和第二含铜金属层通过布置在所述电绝缘构件的横向侧壁上的金属层而被电连接。
7.根据权利要求1所述的半导体封装,其中,所述框架还包括:
第三含铜金属层,其在所述电绝缘构件的第二侧处并与所述第二含铜金属层间隔开;以及
第四含铜金属层,其在所述电绝缘构件的第一侧处并与所述第一含铜金属层间隔开,
其中所述第三和第四含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处被电连接,所述第三含铜金属层将所述晶体管管芯的第二端子电连接到DC,以及所述第二含铜金属层形成所述半导体封装的输出端子,所述输出端子被电连接到所述晶体管管芯的第二端子。
8.根据权利要求7所述的半导体封装,其中,所述框架还包括:
第五含铜金属层,其在所述电绝缘构件的第二侧处并与所述第二和第三含铜金属层间隔开;以及
第六含铜金属层,其在所述电绝缘构件的第一侧处并与所述第一和第四含铜金属层间隔开,
其中所述第五和第六含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处被电连接,以及所述第五含铜金属层形成所述半导体封装的输入端子,所述输入端子被电连接到所述晶体管管芯的第三端子。
9.根据权利要求1所述的半导体封装,其中,所述框架还包括:
在所述第二含铜金属层上的附加电绝缘构件;
第三含铜金属层,其在所述附加电绝缘构件的背对所述第二含铜金属层的一侧处;
第四含铜金属层,其在所述电绝缘构件的第一侧处并与所述第一含铜金属层间隔开,
其中所述第三和第四含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处被电连接,所述第三含铜金属层将所述晶体管管芯的第二端子电连接到DC,以及所述第二含铜金属层形成所述半导体封装的输出端子,所述输出端子被电连接到所述晶体管管芯的第二端子。
10.根据权利要求9所述的半导体封装,其中,所述框架还包括:
第五含铜金属层,其在所述电绝缘构件的第二侧处并与所述第二含铜金属层间隔开;以及
第六含铜金属层,其在所述电绝缘构件的第一侧处并与所述第一和第四含铜金属层间隔开,
其中所述第五和第六含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处被电连接,以及所述第五含铜金属层形成所述半导体封装的输入端子,所述输入端子被电连接到所述晶体管管芯的第三端子。
11.根据权利要求9所述的半导体封装,其中,所述框架还包括:
导电通孔的第一集合,其在所述电绝缘构件的第一和第二侧之间延伸,并且将所述第一和第二含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处电连接;以及
导电通孔的第二集合,其贯穿两个电绝缘构件,并且将所述第三和第四含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处电连接,
其中导电通孔的所述第一和第二集合相互之间电绝缘。
12.根据权利要求1所述的半导体封装,其中,每个框架金属层包括铜上的Ni层和Ni上的Au层。
13.根据权利要求12所述的半导体封装,其中,每个框架金属层还包括在Ni层和Au层之间的Pd层。
14.根据权利要求1所述的半导体封装,还包括盖子,其被附着到所述框架的第二侧以形成所述晶体管管芯的外壳,使得所述半导体封装是开放腔封装。
15.根据权利要求1所述的半导体封装,其中,所述电绝缘构件的第一侧利用有机粘合剂被附着到所述含铜基板的周边区域。
16.根据权利要求1所述的半导体封装,其中,所述电绝缘构件的第一侧利用焊料被附着到所述含铜基板的周边区域。
17.根据权利要求16所述的半导体封装,还包括含铜层,其在所述电绝缘构件的第一侧处并通过焊料被附着到所述含铜基板的周边区域。
18.一种半导体封装,包括:
导电基板,其具有内部区域和周边区域;
晶体管管芯,其具有附着到所述导电基板的内部区域的第一端子和背对所述导电基板的第二端子和第三端子;以及
电绝缘构件,其具有附着到所述导电基板的周边区域的薄区域、向外延伸超过所述导电基板的横向侧壁以使得所述电绝缘构件悬于所述导电基板之上的厚区域、以及在所述薄区域中接纳所述晶体管管芯的开口;
第一金属层,其在所述电绝缘构件的背对所述导电基板的第一侧处并被电连接到所述晶体管管芯的第二端子;
第二金属层,其在所述电绝缘构件的第一侧处并与所述第一金属层间隔开,所述第二金属层被电连接到所述晶体管管芯的第三端子;以及
第三金属层,其在所述电绝缘构件的第二相对侧处被附着到所述电绝缘构件的厚区域,并在所述电绝缘构件的与所述导电基板的横向侧壁间隔开的区域处被电连接到所述第一金属层。
19.根据权利要求18所述的半导体封装,其中,所述电绝缘构件包括在所述电绝缘构件的第一和第二侧之间延伸的导电通孔,所述导电通孔将所述第一和第三金属层在所述电绝缘构件的与所述导电基板的横向侧壁间隔开的区域处电连接。
20.根据权利要求19所述的半导体封装,其中,所述导电通孔包括贯穿所述电绝缘构件并具有由含铜材料覆盖的侧壁的开口。
21.根据权利要求18所述的半导体封装,还包括在所述第一金属层上的附加电绝缘构件和在所述附加电绝缘构件的背对所述第一金属层的一侧处的第四金属层,以及其中所述第四金属层将所述晶体管管芯的第二端子电连接到DC,以及所述第一金属层形成所述半导体封装的输出端子。
22.根据权利要求21所述的半导体封装,还包括:
第五金属层,其在所述电绝缘构件的第二侧处并与所述第三金属层间隔开;
导电通孔的第一集合,其在所述电绝缘构件的第一和第二侧之间延伸,并且将所述第一和第三金属层在所述电绝缘构件的与所述导电基板的横向侧壁间隔开的区域处电连接;以及
导电通孔的第二集合,其贯穿两个电绝缘构件,并且将所述第四和第五金属层在所述电绝缘构件的与所述导电基板的横向侧壁间隔开的区域处电连接,
其中导电通孔的所述第一和第二集合相互之间电绝缘。
23.根据权利要求18所述的半导体封装,其中,所述第一金属层、第二金属层和第三金属层被嵌入或层叠到所述电绝缘构件。
24.一种半导体封装,包括:
基板;
射频RF功率晶体管管芯,其具有附着到所述基板的第一侧和背对所述基板的第二侧;以及
印刷电路板(PCB)窗口框架,其包括:
电绝缘构件,其被附着到所述基板,其中所述射频RF功率晶体管管芯位于所述电绝缘构件的开口中,并且所述电绝缘构件向外延伸超过所述基板的横向侧壁;
第一金属层,其被嵌入或层叠在所述电绝缘构件的背对所述基板的一侧上并在所述射频RF功率晶体管管芯的第二侧处被电连接到所述射频RF功率晶体管管芯;以及
第二金属层,其在所述电绝缘构件的背对所述第一金属层的一侧处被嵌入或层叠在所述电绝缘构件的向外延伸超过所述基板的横向侧壁的部分上,所述第二金属层与所述基板绝缘,并在所述电绝缘构件的远离所述基板的边缘区域处被电连接到所述第一金属层。
25.一种制造半导体封装的方法,包括:
提供具有管芯附着区域和周边区域的含铜基板以及包括电绝缘构件的框架,所述电绝缘构件具有第一侧、第二相对侧、在第一侧处的第一含铜金属层和在第二侧处的第二含铜金属层;
将晶体管管芯的第一端子附着到所述含铜基板的管芯附着区域;
将所述电绝缘构件的第一侧附着到所述含铜基板的周边区域,使得第二侧背对所述含铜基板,所述电绝缘构件向外延伸超过所述含铜基板的横向侧壁,以及所述第一含铜金属层与所述含铜基板的横向侧壁间隔开;
将所述晶体管管芯的背对所述含铜基板的第二端子电连接到所述第二含铜金属层;以及
将所述第一和第二含铜金属层在所述电绝缘构件的与所述含铜基板的横向侧壁间隔开的区域处电连接。
26.根据权利要求25所述的制造半导体封装的方法,其中,所述电绝缘构件的第一侧利用有机粘合剂被附着到所述含铜基板的周边区域。
27.根据权利要求25所述的制造半导体封装的方法,其中,所述电绝缘构件的第一侧利用焊料被附着到所述含铜基板的周边区域。
28.根据权利要求27所述的制造半导体封装的方法,其中,将所述电绝缘构件的第一侧附着到所述含铜基板的周边区域包括:将在所述电绝缘构件的第一侧处的含铜层通过焊料附着到所述含铜基板的周边区域。
29.根据权利要求25所述的制造半导体封装的方法,其中,在将所述绝缘构件的第一侧附着到所述含铜基板的周边区域之前,将所述晶体管管芯的第一端子附着到所述含铜基板的管芯附着区域。
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2012
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2013
- 2013-03-27 DE DE102013103119.6A patent/DE102013103119B4/de active Active
- 2013-03-28 CN CN201310240227.9A patent/CN103367268B/zh active Active
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2014
- 2014-11-03 US US14/531,186 patent/US9293407B2/en active Active
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Publication number | Publication date |
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DE102013103119A1 (de) | 2013-10-10 |
DE102013103119B4 (de) | 2019-04-18 |
US20150048492A1 (en) | 2015-02-19 |
CN103367268A (zh) | 2013-10-23 |
US20130256858A1 (en) | 2013-10-03 |
US8907467B2 (en) | 2014-12-09 |
US9293407B2 (en) | 2016-03-22 |
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