TWI435679B - 形成具有複數個隔離式電導通接觸之外殼元件之方法及藉此形成之外殼元件 - Google Patents

形成具有複數個隔離式電導通接觸之外殼元件之方法及藉此形成之外殼元件 Download PDF

Info

Publication number
TWI435679B
TWI435679B TW097118537A TW97118537A TWI435679B TW I435679 B TWI435679 B TW I435679B TW 097118537 A TW097118537 A TW 097118537A TW 97118537 A TW97118537 A TW 97118537A TW I435679 B TWI435679 B TW I435679B
Authority
TW
Taiwan
Prior art keywords
opening
forming
sidewall
substrate
electrically
Prior art date
Application number
TW097118537A
Other languages
English (en)
Chinese (zh)
Other versions
TW200913850A (en
Inventor
Michael Nashner
Jeff Howerton
Original Assignee
Electro Scient Ind Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electro Scient Ind Inc filed Critical Electro Scient Ind Inc
Publication of TW200913850A publication Critical patent/TW200913850A/zh
Application granted granted Critical
Publication of TWI435679B publication Critical patent/TWI435679B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K5/00—Casings, cabinets or drawers for electric apparatus
    • H05K5/02—Details
    • H05K5/0247—Electrical details of casings, e.g. terminals, passages for cables or wiring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09581—Applying an insulating coating on the walls of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0315—Oxidising metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0323—Working metal substrate or core, e.g. by etching, deforming
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
TW097118537A 2007-05-25 2008-05-20 形成具有複數個隔離式電導通接觸之外殼元件之方法及藉此形成之外殼元件 TWI435679B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/753,996 US7886437B2 (en) 2007-05-25 2007-05-25 Process for forming an isolated electrically conductive contact through a metal package

Publications (2)

Publication Number Publication Date
TW200913850A TW200913850A (en) 2009-03-16
TWI435679B true TWI435679B (zh) 2014-04-21

Family

ID=40071052

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097118537A TWI435679B (zh) 2007-05-25 2008-05-20 形成具有複數個隔離式電導通接觸之外殼元件之方法及藉此形成之外殼元件

Country Status (6)

Country Link
US (2) US7886437B2 (enExample)
JP (2) JP2010528491A (enExample)
KR (1) KR20100023804A (enExample)
CN (1) CN101681818B (enExample)
TW (1) TWI435679B (enExample)
WO (1) WO2008147695A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7886437B2 (en) * 2007-05-25 2011-02-15 Electro Scientific Industries, Inc. Process for forming an isolated electrically conductive contact through a metal package
US8220142B2 (en) * 2007-10-03 2012-07-17 Apple Inc. Method of forming a housing component
US8687359B2 (en) 2008-10-13 2014-04-01 Apple Inc. Portable computer unified top case
KR20100045857A (ko) * 2008-10-24 2010-05-04 삼성전자주식회사 반도체 칩, 스택 모듈, 메모리 카드 및 반도체 칩의 제조 방법
CH704884B1 (fr) * 2011-04-29 2015-04-30 Suisse Electronique Microtech Substrat destiné à recevoir des contacts électriques.
TWI454320B (zh) * 2011-08-19 2014-10-01 Jieng Tai Internat Electric Corp 填補穿孔的方法
JP2013045804A (ja) * 2011-08-22 2013-03-04 Shinko Electric Ind Co Ltd 基材
US8894868B2 (en) * 2011-10-06 2014-11-25 Electro Scientific Industries, Inc. Substrate containing aperture and methods of forming the same
JP2015531906A (ja) 2012-07-12 2015-11-05 エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド 双方向制御システム、その製造方法、及びそれを組み込んだデバイス
US9685414B2 (en) 2013-06-26 2017-06-20 Intel Corporation Package assembly for embedded die and associated techniques and configurations
WO2015076802A1 (en) * 2013-11-21 2015-05-28 Hewlett Packard Development Company, L.P. Oxidized layer and light metal layer on substrate
KR102134296B1 (ko) * 2014-09-23 2020-07-15 (주)포인트엔지니어링 안테나
US10732085B2 (en) 2015-03-24 2020-08-04 Bell Helicopter Textron Inc. Notch treatment methods for flaw simulation
US10989640B2 (en) 2015-03-24 2021-04-27 Bell Helicopter Textron Inc. Method for defining threshold stress curves utilized in fatigue and damage tolerance analysis
CN107872936B (zh) 2016-09-28 2020-10-23 华为机器有限公司 一种移动设备的金属壳及其制备方法、移动设备
EP3428955A1 (en) * 2017-07-10 2019-01-16 Murata Manufacturing Co., Ltd. Substrates employing surface-area amplification, for use in fabricating capacitive elements and other devices

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3296099A (en) * 1966-05-16 1967-01-03 Western Electric Co Method of making printed circuits
US4155972A (en) 1977-09-06 1979-05-22 Keystone Consolidated Industries, Inc. Multiple-shot method of molding plastic products
JPS59159595A (ja) * 1983-03-03 1984-09-10 オ−ケ−プリント配線株式会社 金属プリント基板の製造方法
US5293025A (en) 1991-08-01 1994-03-08 E. I. Du Pont De Nemours And Company Method for forming vias in multilayer circuits
JPH07201260A (ja) 1993-12-29 1995-08-04 Yamatake Honeywell Co Ltd 電子スイッチの表示窓形成方法
US5518964A (en) 1994-07-07 1996-05-21 Tessera, Inc. Microelectronic mounting with multiple lead deformation and bonding
US5614114A (en) 1994-07-18 1997-03-25 Electro Scientific Industries, Inc. Laser system and method for plating vias
US5593606A (en) 1994-07-18 1997-01-14 Electro Scientific Industries, Inc. Ultraviolet laser system and method for forming vias in multi-layered targets
TW309654B (enExample) * 1995-03-29 1997-07-01 Olin Corp
US5699613A (en) 1995-09-25 1997-12-23 International Business Machines Corporation Fine dimension stacked vias for a multiple layer circuit board structure
US5757079A (en) 1995-12-21 1998-05-26 International Business Machines Corporation Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages and the resulting MLTF structure
AU3301197A (en) 1996-06-05 1998-01-05 Larry W. Burgess Blind via laser drilling system
US6631558B2 (en) 1996-06-05 2003-10-14 Laservia Corporation Blind via laser drilling system
US5787578A (en) 1996-07-09 1998-08-04 International Business Machines Corporation Method of selectively depositing a metallic layer on a ceramic substrate
US5718326A (en) 1996-07-22 1998-02-17 Delco Electronics Corporation Backlit button/switchpad assembly
US6541709B1 (en) 1996-11-01 2003-04-01 International Business Machines Corporation Inherently robust repair process for thin film circuitry using uv laser
WO1998020557A1 (en) 1996-11-08 1998-05-14 W.L. Gore & Associates, Inc. Method for reducing via inductance in an electronic assembly and device
DE19758496A1 (de) 1997-04-25 1999-03-25 Trw Automotive Electron & Comp Verfahren zur Herstellung eines Elements mit Funktionssymbolen für die Beleuchtung mit Durchlicht, insbesondere eines Blendenteils oder Betätigungsteils
JPH11298104A (ja) * 1998-04-16 1999-10-29 Sumitomo Metal Electronics Devices Inc 半導体搭載用回路基板
GB9811328D0 (en) 1998-05-27 1998-07-22 Exitech Ltd The use of mid-infrared lasers for drilling microvia holes in printed circuit (wiring) boards and other electrical circuit interconnection packages
US6400018B2 (en) 1998-08-27 2002-06-04 3M Innovative Properties Company Via plug adapter
US6235544B1 (en) 1999-04-20 2001-05-22 International Business Machines Corporation Seed metal delete process for thin film repair solutions using direct UV laser
US6713719B1 (en) 1999-09-30 2004-03-30 Siemens Aktiengesellschaft Method and device for laser drilling laminates
JP2001237512A (ja) * 1999-12-14 2001-08-31 Nitto Denko Corp 両面回路基板およびこれを用いた多層配線基板ならびに両面回路基板の製造方法
JP3330925B2 (ja) 2000-04-05 2002-10-07 株式会社日鉱マテリアルズ レーザー穴開け用銅箔
DE10125397B4 (de) * 2001-05-23 2005-03-03 Siemens Ag Verfahren zum Bohren von Mikrolöchern mit einem Laserstrahl
JP2003101177A (ja) * 2001-09-25 2003-04-04 Hitachi Aic Inc メタルコア配線板とその製造方法、及び、かかるメタルコア配線板を利用した回路部品
US20030066679A1 (en) 2001-10-09 2003-04-10 Castro Abram M. Electrical circuit and method of formation
US6627844B2 (en) 2001-11-30 2003-09-30 Matsushita Electric Industrial Co., Ltd. Method of laser milling
US6541712B1 (en) 2001-12-04 2003-04-01 Teradyhe, Inc. High speed multi-layer printed circuit board via
US6863926B2 (en) * 2002-01-15 2005-03-08 David Mark Lynn Corrosive-resistant coating over aluminum substrates for use in plasma deposition and etch environments
TW558823B (en) 2002-04-10 2003-10-21 Via Tech Inc Through-hole process of integrated circuit substrate
US20040112881A1 (en) 2002-04-11 2004-06-17 Bloemeke Stephen Roger Circle laser trepanning
TWI271131B (en) 2002-04-23 2007-01-11 Via Tech Inc Pattern fabrication process of circuit substrate
TW561803B (en) 2002-10-24 2003-11-11 Advanced Semiconductor Eng Circuit substrate and manufacturing method thereof
TW587322B (en) 2002-12-31 2004-05-11 Phoenix Prec Technology Corp Substrate with stacked via and fine circuit thereon, and method for fabricating the same
US6867121B2 (en) 2003-01-16 2005-03-15 International Business Machines Corporation Method of apparatus for interconnecting a relatively fine pitch circuit layer and adjacent power plane(s) in a laminated construction
US20050137942A1 (en) * 2003-09-17 2005-06-23 Lafleur Bernard B. Rapid depolyment portable interactive kiosk
US7345350B2 (en) * 2003-09-23 2008-03-18 Micron Technology, Inc. Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias
US7402758B2 (en) 2003-10-09 2008-07-22 Qualcomm Incorporated Telescoping blind via in three-layer core
US8084866B2 (en) * 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
US7018219B2 (en) 2004-02-25 2006-03-28 Rosenau Steven A Interconnect structure and method for connecting buried signal lines to electrical devices
US20050189656A1 (en) 2004-02-26 2005-09-01 Chun Yee Tan Micro-vias for electronic packaging
US20060091023A1 (en) 2004-10-28 2006-05-04 Ahsan Bukhari Assessing micro-via formation PCB substrate manufacturing process
KR100688768B1 (ko) * 2004-12-30 2007-03-02 삼성전기주식회사 칩 내장형 인쇄회로기판 및 그 제조 방법
US7884315B2 (en) 2006-07-11 2011-02-08 Apple Inc. Invisible, light-transmissive display system
US7527872B2 (en) * 2005-10-25 2009-05-05 Goodrich Corporation Treated aluminum article and method for making same
US20070275540A1 (en) * 2006-05-24 2007-11-29 Hackitt Dale A Backside via formation prior to die attachment
US7968820B2 (en) 2006-06-02 2011-06-28 Electro Scientific Industries, Inc. Method of producing a panel having an area with light transmissivity
US8394301B2 (en) 2006-06-02 2013-03-12 Electro Scientific Industries, Inc. Process for forming panel with an optically transmissive portion and products related thereto
US7655292B2 (en) * 2007-04-11 2010-02-02 Kaylu Industrial Corporation Electrically conductive substrate with high heat conductivity
US8134235B2 (en) * 2007-04-23 2012-03-13 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional semiconductor device
US7886437B2 (en) * 2007-05-25 2011-02-15 Electro Scientific Industries, Inc. Process for forming an isolated electrically conductive contact through a metal package

Also Published As

Publication number Publication date
JP2010528491A (ja) 2010-08-19
CN101681818B (zh) 2011-11-23
US8117744B2 (en) 2012-02-21
WO2008147695A1 (en) 2008-12-04
KR20100023804A (ko) 2010-03-04
CN101681818A (zh) 2010-03-24
US20080289178A1 (en) 2008-11-27
US20110131807A1 (en) 2011-06-09
US7886437B2 (en) 2011-02-15
TW200913850A (en) 2009-03-16
JP2014143423A (ja) 2014-08-07

Similar Documents

Publication Publication Date Title
TWI435679B (zh) 形成具有複數個隔離式電導通接觸之外殼元件之方法及藉此形成之外殼元件
JP2010528491A5 (enExample)
JP2013509718A (ja) 金属の付着
US20110198018A1 (en) Method for integrating an electronic component into a printed circuit board
TW201121378A (en) Metal deposition
JP2013509719A (ja) 金属の付着
JP3779745B2 (ja) プリント回路基板とフィルム回路基板の製造方法
KR101435239B1 (ko) 액체 토출 헤드 기재를 제조하는 프로세스
TW200934325A (en) Method for forming circuit
CN109719404A (zh) 一种ic载板激光钻孔的方法
CN115497923A (zh) 玻璃基底中的电容器
CN102593086B (zh) 半导体装置和用于制造半导体装置的方法
US20190208645A1 (en) Laminate structures with hole plugs and methods of forming laminate structures with hole plugs
TWI291382B (en) Method of forming a metal thin film with micro holes by ink-jet printing
JP2001308480A (ja) 金属インターロック構造を含む電子構造及びその形成
JP4199206B2 (ja) 半導体装置の製造方法
Mościcki et al. Interconnection process by ink jet printing method
ES2324355T3 (es) Arquitectura microfluidica.
US20140174794A1 (en) Heat radiating substrate and manufacturing method thereof
JP7444885B2 (ja) 蓋をされ金属化されたビアの形成方法
US20120138339A1 (en) Method of producing an electrically conducting via in a substrate
KR102594179B1 (ko) 얇은 라미네이트를 위한 홀 플러그
JP2004307924A (ja) 電子部品のめっき方法
JP2005136052A (ja) 配線基板及び電気装置並びにその製造方法
JP2019059163A (ja) 液体吐出ヘッド及びその製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees