TWI407552B - 5-電晶體非揮發性記憶體單元 - Google Patents
5-電晶體非揮發性記憶體單元 Download PDFInfo
- Publication number
- TWI407552B TWI407552B TW099145118A TW99145118A TWI407552B TW I407552 B TWI407552 B TW I407552B TW 099145118 A TW099145118 A TW 099145118A TW 99145118 A TW99145118 A TW 99145118A TW I407552 B TWI407552 B TW I407552B
- Authority
- TW
- Taiwan
- Prior art keywords
- electrode
- transistor
- array
- voltage
- nmos
- Prior art date
Links
- 210000000746 body region Anatomy 0.000 claims description 37
- 238000000034 method Methods 0.000 claims description 14
- 239000013641 positive control Substances 0.000 claims description 7
- 210000004027 cell Anatomy 0.000 description 67
- 239000000758 substrate Substances 0.000 description 5
- 230000005641 tunneling Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000005689 Fowler Nordheim tunneling Effects 0.000 description 1
- 210000005056 cell body Anatomy 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/702,061 US8284600B1 (en) | 2010-02-08 | 2010-02-08 | 5-transistor non-volatile memory cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201143034A TW201143034A (en) | 2011-12-01 |
| TWI407552B true TWI407552B (zh) | 2013-09-01 |
Family
ID=44356029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099145118A TWI407552B (zh) | 2010-02-08 | 2010-12-22 | 5-電晶體非揮發性記憶體單元 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8284600B1 (enExample) |
| JP (1) | JP5632490B2 (enExample) |
| CN (1) | CN102741936B (enExample) |
| TW (1) | TWI407552B (enExample) |
| WO (1) | WO2011096978A2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8958245B2 (en) | 2010-06-17 | 2015-02-17 | Ememory Technology Inc. | Logic-based multiple time programming memory cell compatible with generic CMOS processes |
| US8355282B2 (en) * | 2010-06-17 | 2013-01-15 | Ememory Technology Inc. | Logic-based multiple time programming memory cell |
| US9042174B2 (en) | 2010-06-17 | 2015-05-26 | Ememory Technology Inc. | Non-volatile memory cell |
| US8804407B1 (en) * | 2011-07-12 | 2014-08-12 | Altera Corporation | PMOS pass gate |
| US8995175B1 (en) | 2012-01-13 | 2015-03-31 | Altera Corporation | Memory circuit with PMOS access transistors |
| US8921175B2 (en) | 2012-07-20 | 2014-12-30 | Semiconductor Components Industries, Llc | Process of forming an electronic device including a nonvolatile memory cell |
| US9362001B2 (en) | 2014-10-14 | 2016-06-07 | Ememory Technology Inc. | Memory cell capable of operating under low voltage conditions |
| US9847133B2 (en) * | 2016-01-19 | 2017-12-19 | Ememory Technology Inc. | Memory array capable of performing byte erase operation |
| TWI602183B (zh) * | 2016-03-10 | 2017-10-11 | 力旺電子股份有限公司 | 記憶體單元及記憶體陣列 |
| EP3546063B1 (en) * | 2018-03-26 | 2020-12-30 | IMEC vzw | A molecular synthesis device |
| US11694751B2 (en) * | 2019-11-30 | 2023-07-04 | Semibrain Inc. | Logic compatible flash memory programming with a pulse width control scheme |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6191980B1 (en) * | 2000-03-07 | 2001-02-20 | Lucent Technologies, Inc. | Single-poly non-volatile memory cell having low-capacitance erase gate |
| US7041763B2 (en) * | 2000-07-14 | 2006-05-09 | Simon Fraser University | Photochromic polymers and methods of synthesizing same |
| US20070070707A1 (en) * | 2005-09-29 | 2007-03-29 | Yasue Yamamoto | Nonvolatile semiconductor memory device |
| US20090262548A1 (en) * | 2008-04-16 | 2009-10-22 | Kojima Press Industry Co., Ltd. | Vehicle interior illumination apparatus |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5596524A (en) | 1995-04-21 | 1997-01-21 | Advanced Micro Devices, Inc. | CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase |
| US6201732B1 (en) * | 1997-01-02 | 2001-03-13 | John M. Caywood | Low voltage single CMOS electrically erasable read-only memory |
| US6137723A (en) | 1998-04-01 | 2000-10-24 | National Semiconductor Corporation | Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure |
| US6867622B2 (en) * | 2003-01-07 | 2005-03-15 | Xicor, Inc. | Method and apparatus for dual conduction analog programming |
| US6903978B1 (en) | 2003-09-17 | 2005-06-07 | National Semiconductor Corporation | Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage |
| US7042763B1 (en) * | 2004-07-08 | 2006-05-09 | National Semiconductor Corporation | Programming method for nonvolatile memory cell |
| US6992927B1 (en) | 2004-07-08 | 2006-01-31 | National Semiconductor Corporation | Nonvolatile memory cell |
| US6985386B1 (en) * | 2004-07-08 | 2006-01-10 | National Semiconductor Corporation | Programming method for nonvolatile memory cell |
| US7164606B1 (en) | 2005-07-15 | 2007-01-16 | National Semiconductor Corporation | Reverse fowler-nordheim tunneling programming for non-volatile memory cell |
| US7167392B1 (en) | 2005-07-15 | 2007-01-23 | National Semiconductor Corporation | Non-volatile memory cell with improved programming technique |
| US7326994B2 (en) * | 2005-10-12 | 2008-02-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Logic compatible non-volatile memory cell |
| US7483310B1 (en) * | 2006-11-02 | 2009-01-27 | National Semiconductor Corporation | System and method for providing high endurance low cost CMOS compatible EEPROM devices |
| US7755941B2 (en) * | 2007-02-23 | 2010-07-13 | Panasonic Corporation | Nonvolatile semiconductor memory device |
| US7436710B2 (en) | 2007-03-12 | 2008-10-14 | Maxim Integrated Products, Inc. | EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well |
| JP5228195B2 (ja) * | 2007-04-20 | 2013-07-03 | インターチップ株式会社 | 不揮発性メモリ内蔵シフトレジスタ |
| US7889553B2 (en) * | 2007-04-24 | 2011-02-15 | Novelics, Llc. | Single-poly non-volatile memory cell |
| JP5266443B2 (ja) * | 2008-04-18 | 2013-08-21 | インターチップ株式会社 | 不揮発性メモリセル及び不揮発性メモリセル内蔵データラッチ |
-
2010
- 2010-02-08 US US12/702,061 patent/US8284600B1/en active Active
- 2010-11-29 CN CN201080063339.6A patent/CN102741936B/zh active Active
- 2010-11-29 JP JP2012552859A patent/JP5632490B2/ja active Active
- 2010-11-29 WO PCT/US2010/058214 patent/WO2011096978A2/en not_active Ceased
- 2010-12-22 TW TW099145118A patent/TWI407552B/zh active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6191980B1 (en) * | 2000-03-07 | 2001-02-20 | Lucent Technologies, Inc. | Single-poly non-volatile memory cell having low-capacitance erase gate |
| US7041763B2 (en) * | 2000-07-14 | 2006-05-09 | Simon Fraser University | Photochromic polymers and methods of synthesizing same |
| US20070070707A1 (en) * | 2005-09-29 | 2007-03-29 | Yasue Yamamoto | Nonvolatile semiconductor memory device |
| US20090262548A1 (en) * | 2008-04-16 | 2009-10-22 | Kojima Press Industry Co., Ltd. | Vehicle interior illumination apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| US8284600B1 (en) | 2012-10-09 |
| TW201143034A (en) | 2011-12-01 |
| WO2011096978A2 (en) | 2011-08-11 |
| JP5632490B2 (ja) | 2014-11-26 |
| CN102741936A (zh) | 2012-10-17 |
| WO2011096978A3 (en) | 2011-09-29 |
| CN102741936B (zh) | 2016-08-24 |
| JP2013519182A (ja) | 2013-05-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI407552B (zh) | 5-電晶體非揮發性記憶體單元 | |
| TWI394163B (zh) | 減少記憶體裝置中程式干擾之影響之方法與裝置 | |
| KR100272037B1 (ko) | 불휘발성 반도체 기억 장치 | |
| US6353555B1 (en) | Flash memory device capable of minimizing a substrate voltage bouncing and a program method thereof | |
| US8320184B2 (en) | Method of programming nonvolatile semiconductor memory device | |
| JP4504405B2 (ja) | 半導体記憶装置 | |
| US7672169B2 (en) | Nonvolatile semiconductor memory and driving method thereof | |
| CN107077891B (zh) | 非易失性分裂栅存储器装置及其操作方法 | |
| JP2009146556A (ja) | 半導体記憶装置 | |
| CN101558450A (zh) | 用于对非易失性存储器单元进行低电压编程的方法及系统 | |
| US7379335B2 (en) | Nonvolatile semiconductor memory device and a method for programming NAND type flash memory | |
| US8848446B2 (en) | Nonvolatile semiconductor memory device | |
| JP2010198685A (ja) | 不揮発性半導体メモリ | |
| TWI449047B (zh) | 全-nmos 4-電晶體非揮發性記憶體單元 | |
| US20120014183A1 (en) | 3 transistor (n/p/n) non-volatile memory cell without program disturb | |
| TWI499042B (zh) | 具pmos-nmos-pmos-nmos結構之4電晶體非揮發性記憶體單元 | |
| US7916532B2 (en) | Use of recovery transistors during write operations to prevent disturbance of unselected cells | |
| JP4511627B1 (ja) | 不揮発性半導体記憶装置における書き込み方法及び不揮発性半導体記憶装置 | |
| US8159877B2 (en) | Method of directly reading output voltage to determine data stored in a non-volatile memory cell | |
| KR20080088170A (ko) | 반도체 플래시 메모리 장치 및 그 구동방법 |