CN102741936B - 五晶体管非易失性存储器单元 - Google Patents
五晶体管非易失性存储器单元 Download PDFInfo
- Publication number
- CN102741936B CN102741936B CN201080063339.6A CN201080063339A CN102741936B CN 102741936 B CN102741936 B CN 102741936B CN 201080063339 A CN201080063339 A CN 201080063339A CN 102741936 B CN102741936 B CN 102741936B
- Authority
- CN
- China
- Prior art keywords
- transistor
- nmos
- electrode connected
- drain
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/702,061 | 2010-02-08 | ||
| US12/702,061 US8284600B1 (en) | 2010-02-08 | 2010-02-08 | 5-transistor non-volatile memory cell |
| PCT/US2010/058214 WO2011096978A2 (en) | 2010-02-08 | 2010-11-29 | 5-transistor non-volatile memory cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102741936A CN102741936A (zh) | 2012-10-17 |
| CN102741936B true CN102741936B (zh) | 2016-08-24 |
Family
ID=44356029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201080063339.6A Active CN102741936B (zh) | 2010-02-08 | 2010-11-29 | 五晶体管非易失性存储器单元 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8284600B1 (enExample) |
| JP (1) | JP5632490B2 (enExample) |
| CN (1) | CN102741936B (enExample) |
| TW (1) | TWI407552B (enExample) |
| WO (1) | WO2011096978A2 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8355282B2 (en) * | 2010-06-17 | 2013-01-15 | Ememory Technology Inc. | Logic-based multiple time programming memory cell |
| US9042174B2 (en) | 2010-06-17 | 2015-05-26 | Ememory Technology Inc. | Non-volatile memory cell |
| US8958245B2 (en) | 2010-06-17 | 2015-02-17 | Ememory Technology Inc. | Logic-based multiple time programming memory cell compatible with generic CMOS processes |
| US8804407B1 (en) | 2011-07-12 | 2014-08-12 | Altera Corporation | PMOS pass gate |
| US8995175B1 (en) | 2012-01-13 | 2015-03-31 | Altera Corporation | Memory circuit with PMOS access transistors |
| US8921175B2 (en) * | 2012-07-20 | 2014-12-30 | Semiconductor Components Industries, Llc | Process of forming an electronic device including a nonvolatile memory cell |
| US9362001B2 (en) | 2014-10-14 | 2016-06-07 | Ememory Technology Inc. | Memory cell capable of operating under low voltage conditions |
| US9847133B2 (en) | 2016-01-19 | 2017-12-19 | Ememory Technology Inc. | Memory array capable of performing byte erase operation |
| TWI602183B (zh) * | 2016-03-10 | 2017-10-11 | 力旺電子股份有限公司 | 記憶體單元及記憶體陣列 |
| EP3546063B1 (en) * | 2018-03-26 | 2020-12-30 | IMEC vzw | A molecular synthesis device |
| US11694751B2 (en) * | 2019-11-30 | 2023-07-04 | Semibrain Inc. | Logic compatible flash memory programming with a pulse width control scheme |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201732B1 (en) * | 1997-01-02 | 2001-03-13 | John M. Caywood | Low voltage single CMOS electrically erasable read-only memory |
| US7167392B1 (en) * | 2005-07-15 | 2007-01-23 | National Semiconductor Corporation | Non-volatile memory cell with improved programming technique |
| CN1949522A (zh) * | 2005-10-12 | 2007-04-18 | 台湾积体电路制造股份有限公司 | 非易失性存储单元与集成电路 |
| US7483310B1 (en) * | 2006-11-02 | 2009-01-27 | National Semiconductor Corporation | System and method for providing high endurance low cost CMOS compatible EEPROM devices |
| US20090262584A1 (en) * | 2008-04-18 | 2009-10-22 | Interchip Corporation | Nonvolatile Memory Cell and Data Latch Incorporating Nonvolatile Memory Cell |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5596524A (en) | 1995-04-21 | 1997-01-21 | Advanced Micro Devices, Inc. | CMOS memory cell with gate oxide of both NMOS and PMOS transistors as tunneling window for program and erase |
| US6137723A (en) | 1998-04-01 | 2000-10-24 | National Semiconductor Corporation | Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure |
| US6191980B1 (en) * | 2000-03-07 | 2001-02-20 | Lucent Technologies, Inc. | Single-poly non-volatile memory cell having low-capacitance erase gate |
| US7041763B2 (en) * | 2000-07-14 | 2006-05-09 | Simon Fraser University | Photochromic polymers and methods of synthesizing same |
| US6867622B2 (en) * | 2003-01-07 | 2005-03-15 | Xicor, Inc. | Method and apparatus for dual conduction analog programming |
| US6903978B1 (en) | 2003-09-17 | 2005-06-07 | National Semiconductor Corporation | Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage |
| US6992927B1 (en) | 2004-07-08 | 2006-01-31 | National Semiconductor Corporation | Nonvolatile memory cell |
| US6985386B1 (en) * | 2004-07-08 | 2006-01-10 | National Semiconductor Corporation | Programming method for nonvolatile memory cell |
| US7042763B1 (en) * | 2004-07-08 | 2006-05-09 | National Semiconductor Corporation | Programming method for nonvolatile memory cell |
| US7164606B1 (en) | 2005-07-15 | 2007-01-16 | National Semiconductor Corporation | Reverse fowler-nordheim tunneling programming for non-volatile memory cell |
| JP2007123830A (ja) * | 2005-09-29 | 2007-05-17 | Matsushita Electric Ind Co Ltd | 不揮発性半導体記憶装置 |
| US7755941B2 (en) * | 2007-02-23 | 2010-07-13 | Panasonic Corporation | Nonvolatile semiconductor memory device |
| US7436710B2 (en) | 2007-03-12 | 2008-10-14 | Maxim Integrated Products, Inc. | EEPROM memory device with cell having NMOS in a P pocket as a control gate, PMOS program/erase transistor, and PMOS access transistor in a common well |
| JP5228195B2 (ja) * | 2007-04-20 | 2013-07-03 | インターチップ株式会社 | 不揮発性メモリ内蔵シフトレジスタ |
| US7889553B2 (en) * | 2007-04-24 | 2011-02-15 | Novelics, Llc. | Single-poly non-volatile memory cell |
| JP5108602B2 (ja) * | 2008-04-16 | 2012-12-26 | 小島プレス工業株式会社 | 車室内照明装置 |
-
2010
- 2010-02-08 US US12/702,061 patent/US8284600B1/en active Active
- 2010-11-29 WO PCT/US2010/058214 patent/WO2011096978A2/en not_active Ceased
- 2010-11-29 JP JP2012552859A patent/JP5632490B2/ja active Active
- 2010-11-29 CN CN201080063339.6A patent/CN102741936B/zh active Active
- 2010-12-22 TW TW099145118A patent/TWI407552B/zh active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201732B1 (en) * | 1997-01-02 | 2001-03-13 | John M. Caywood | Low voltage single CMOS electrically erasable read-only memory |
| US7167392B1 (en) * | 2005-07-15 | 2007-01-23 | National Semiconductor Corporation | Non-volatile memory cell with improved programming technique |
| CN1949522A (zh) * | 2005-10-12 | 2007-04-18 | 台湾积体电路制造股份有限公司 | 非易失性存储单元与集成电路 |
| US7483310B1 (en) * | 2006-11-02 | 2009-01-27 | National Semiconductor Corporation | System and method for providing high endurance low cost CMOS compatible EEPROM devices |
| US20090262584A1 (en) * | 2008-04-18 | 2009-10-22 | Interchip Corporation | Nonvolatile Memory Cell and Data Latch Incorporating Nonvolatile Memory Cell |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011096978A2 (en) | 2011-08-11 |
| WO2011096978A3 (en) | 2011-09-29 |
| TWI407552B (zh) | 2013-09-01 |
| TW201143034A (en) | 2011-12-01 |
| JP5632490B2 (ja) | 2014-11-26 |
| US8284600B1 (en) | 2012-10-09 |
| CN102741936A (zh) | 2012-10-17 |
| JP2013519182A (ja) | 2013-05-23 |
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| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |