TWI405513B - 在金屬與聚亞醯胺間不具黏合物之金屬插塞基板 - Google Patents

在金屬與聚亞醯胺間不具黏合物之金屬插塞基板 Download PDF

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Publication number
TWI405513B
TWI405513B TW097121815A TW97121815A TWI405513B TW I405513 B TWI405513 B TW I405513B TW 097121815 A TW097121815 A TW 097121815A TW 97121815 A TW97121815 A TW 97121815A TW I405513 B TWI405513 B TW I405513B
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Taiwan
Prior art keywords
metal
hole
layer
metal layer
cover
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TW097121815A
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English (en)
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TW200908833A (en
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Donald C Abbott
Usman M Chaudhry
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Texas Instruments Inc
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
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Description

在金屬與聚亞醯胺間不具黏合物之金屬插塞基板
本發明大體而言係關於半導體裝置組裝及封裝之領域,且更具體言之,係關於製造具有撓性膠帶基板之積體電路(IC)裝置。
撓性膠帶基板通常由聚合物材料(諸如,聚亞醯胺)構成,且通常被稱為聚亞醯胺膠帶基板或被簡稱為薄膜基板。通常藉由安置在聚亞醯胺層與金屬層之間鋪設的黏合物材料來製造聚亞醯胺膠帶基板。作為第一步驟,用由可移除之保護性塑膠薄片保護之薄膜黏合物覆蓋聚亞醯胺層之表面。在於所要位置衝壓出孔後,剝落覆蓋黏合層之保護性薄片,藉此曝露黏合表面。將薄銅箔層壓至黏合表面,藉此產生3層聚亞醯胺/黏合物/銅撓性膠帶基板,其在聚亞醯胺層中具有多個孔且在銅箔中無孔。
因為通常柔軟且膠黏之黏合物材料傾向於黏著至諸如衝壓機及衝模套組之處理裝備且亦傾向於擠出(例如,在衝壓期間伸展),所以黏合物材料通常難以處置。此外,歸因於在銅箔之層壓期間施加之壓力,黏合物材料可擠壓至衝壓出之孔之內腔或空穴內。在衝壓出之孔之內腔中的黏合物材料之存在可破壞在該等孔中之後續金屬沈積,且可潛在地導致在插塞基底處之空隙之形成或缺陷插塞表面之形成。
申請者認識到對一種用於使用一具有一金屬層及金屬插塞通道之無黏合物撓性膠帶基板來製造半導體裝置之方法及設備之現有需要,該方法及設備不存在於以上論述之先前技術中發現之缺點。申請者亦認識到,在內腔中之黏合物材料之存在亦可導致在焊球中的諸如凹口之缺陷之形成,在回焊製程期間,焊球耦接至插塞孔。缺陷之形成可為應力起始點,且在可靠性測試期間可導致焊接點破裂。
前述需要由本揭示案之教示解決,本揭示案之教示係關於一種用於半導體裝置之組裝及封裝之設備及方法。根據一實施例,在用於製造具有一撓性膠帶基板之半導體裝置之方法及設備中,在該撓性膠帶基板中衝壓出一孔。撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有黏合物。將一蓋置放於金屬層上以蓋住孔之基底。將金屬沈積於在孔之基底處曝露之蓋上,該金屬用以形成與金屬層之接合。經沈積之金屬使孔被插塞至選擇性高度。在移除蓋後,亦可將金屬沈積於金屬層上以增加金屬層之厚度。
在本揭示案之一態樣中,一種用於製造一半導體裝置之一撓性膠帶基板之設備包括一沖孔機及一電鑄機。該沖孔機在該撓性膠帶基板中衝壓出一或多個孔。撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有黏合物。該電鑄機可操作以電沈積一金屬,該金屬亦用以形成金屬層。該電鑄機包括一心軸、一用於該金屬之電解質溶液及一對由一電源供電之電極。心軸之表面與金屬層歐姆 接觸。心軸及撓性膠帶基板部分浸漬於該電解質溶液中。為了起始金屬之電沈積,該電源將一負電壓提供至為陰極之心軸,且將一正電壓提供至由該金屬製成之陽極。金屬電沈積於在孔之基底處曝露的心軸之表面上。經電沈積之金屬使孔被插塞至選擇性高度。在移除心軸後,將金屬電沈積於金屬層之一表面上,藉此增加其厚度。
藉由根據本文中所呈現之說明性實施例的方法及設備來達成若干優點。該等實施例有利地提供一種用於製造一具有一未使用黏合物之撓性膠帶基板的半導體裝置之改良之方法及設備。無黏合物之製造製程使用較不昂貴的起始材料,消除將銅層層壓於黏合表面上之步驟,且藉由消除黏合物之使用而簡化衝壓操作。撓性膠帶基板之無黏合物之製造有利地消除歸因於在通道中之黏合物材料之存在的金屬沈積之破壞,藉此減少空隙或缺陷插塞表面之形成。藉由消除內腔中之黏合物之可能性,無黏合物之製造技術有利地改良半導體封裝可靠性,藉此消除在焊料中之缺陷之形成。藉由消除缺陷(其可潛在地成為應力起始點),消除在可靠性測試期間的諸如焊接點破裂之應力誘發之缺陷。無黏合物之製造技術亦有利地將電鑄用於在撓性膠帶基板之選擇性區域上的金屬之電沈積。舉例而言,電鑄有利地用以增加金屬層之厚度,該金屬層作為具有小於2微米之厚度的晶種層而開始且積聚到數十微米的所要厚度。可布署諸如遮罩之標準基板製造製程來使迹線圖案顯影,且可使用蝕刻來選擇性地自具有增加之厚度的金屬層移除金 屬。
在撓性膠帶基板之製造過程中之黏合物的使用使得達成所要產品品質及可靠性更具挑戰性。因為通常柔軟且膠黏之黏合物材料傾向於黏著至衝壓機及衝模套組,且亦傾向於擠出(例如,在衝壓期間伸展),所以通常難以處置黏合物材料。此外,由於在銅箔之層壓期間施加之壓力,黏合物材料可擠壓至衝壓出之孔之內腔或空穴內。在衝壓出之孔之內腔中之黏合物材料的存在可破壞在孔中之金屬的沈積,且可潛在地導致空隙及缺陷插塞表面之形成,因而降低產品品質及可靠性。在回焊製程期間,在內腔中之黏合物材料的存在亦可導致焊球中諸如凹口之缺陷,缺陷可為應力起始點,且可導致在可靠性測試期間的焊接點破裂。此問題可藉由製造具有改良之無黏合物撓性膠帶基板之半導體裝置的設備及方法解決。根據一實施例,在用於製造具有一撓性膠帶基板之半導體裝置之方法及設備中,於該撓性膠帶基板中衝壓出一孔。撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有黏合物。將一蓋置放於金屬層上,以蓋住孔之基底。將一金屬沈積於在孔之基底處曝露的蓋上,該金屬係用以形成與金屬層之接合。經沈積之金屬使孔被插塞至選擇性高度。在移除蓋後,亦可將金屬沈積於金屬層上,以增加金屬層之厚度。參看圖1A至圖1E、圖2A至圖2C及圖3A至圖3B而描述具有改良之無黏合物撓性膠帶基板之半導體裝置的一部分。 以下術語可用於理解本揭示案。應理解,本文中所描述之術語係用於描述之目的,且不應被視為限制。
半導體封裝(或封裝)-半導體封裝對至少一積體電路(IC)或晶粒提供實體介面及電介面,以將IC連接至外部電路。封裝保護IC免受諸如處置、加熱及冷卻之因素產生之損壞、污染及應力。將IC置於封裝內以使其可靠且便於使用之過程被稱為半導體封裝組裝或簡稱為"組裝"。
基板-基板為用以製造半導體裝置之底層材料。除了提供基底支撐之外,基板亦用以提供IC晶片與外部電路之間的電互連。
半導體裝置-半導體裝置為利用半導體材料之電子特性執行所要功能的電子組件。半導體裝置可製造為單一離散裝置或製造為封裝至模組內之一或多個IC。
電鑄-藉由電沈積(亦可被稱為電鍍)而形成金屬物件之製造製程。電鍍指形成金屬覆蓋之物件之製程。電沈積為回應於電輸入的來自電解質溶液之金屬離子之沈積(例如,電化學還原)。金屬沈積至"心軸"或具有合適形狀之"模型"上以形成所要厚度之金屬層,接著移除心軸以產生獨立的金屬物件或金屬覆蓋之物件。電鑄常用以生產諸如積體電路晶片之精確固態電子裝置。心軸通常為充當一核心之圓柱形金屬條,在該核心周圍可澆鑄、模製、鍛造、彎曲、沈積材料(諸如,金屬)或另外使該材料成形。
組態-描述元件、電路、封裝、電子裝置及類似其他物之設置,且指在裝置之使用或操作前或使用或操作期間 設定、界定或選擇裝置之特定特性、參數或屬性之過程。一些組態屬性可經選擇以具有預設值。舉例而言,金屬層之厚度可經組態以自l微米之預設值增加至40微米。
內腔-中空管之內孔或空穴、孔或通道。
圖1A說明根據一實施例的具有無黏合物之撓性膠帶基板110的半導體裝置100之一部分之簡化且示意性橫截面圖。無黏合物撓性膠帶基板通常為市售的且由諸如位於St.Paul,Minnesota 55144的3M Company之供應商提供。在一實例未描繪之實施例中,半導體裝置100可包括諸如積體電路(IC)或晶粒之額外組件、諸如接合線及球柵陣列之電互連及諸如模塑化合物(mold compound)之封裝材料。參看圖1E而描述組裝後之半導體裝置100之額外細節。在一特定實施例中,半導體裝置100為微處理器、特殊應用積體電路(ASIC)、數位信號處理器、射頻晶片、記憶體、微控制器及晶片上系統、或其組合中之至少一者。
在所描繪之實施例中,半導體裝置100包括具有2層(具有組合厚度TS 112)之撓性膠帶基板110。撓性膠帶基板110包括一具有厚度TM 122之金屬層120,其直接附著至具有厚度TP 132之聚亞醯胺層130。亦即,金屬層120與聚亞醯胺層130以無黏合物之方式附著,例如,其間不存在黏合物。在一特定實施例中,金屬層120係使用金屬來製造,諸如,銅、銀、金、鎳、鋅、鉑、鈀、銥、釕、鋨、銠、鐵、鈷、銦、錫、銻、鉛、鉍、及其合金。
圖1B說明根據一實施例的參看圖1A而描述的半導體裝 置100之一部分之簡化且示意性橫截面圖,該半導體裝置100具有在撓性膠帶基板110中衝壓之孔140。可藉由使用習知衝壓機及衝模套組穿過撓性膠帶基板110來衝壓出孔140。應理解,雖然展示撓性膠帶基板110包括一個孔,但撓性膠帶基板110可包括複數個孔或通道。孔140之內腔具有金屬層120之曝露邊緣及聚亞醯胺層130之曝露邊緣。
圖1C說明根據一實施例的參看圖1A而描述的半導體裝置100之一部分之簡化且示意性橫截面圖,該半導體裝置100具有由蓋150蓋住的孔140。在所描繪之實施例中,蓋150與金屬層120直接接觸。蓋150置放於金屬層120上以蓋住或閉合孔140之基底。應理解,蓋150之尺寸及形狀可隨每一應用而變化,例如,呈圓柱體之形狀之蓋。在一特定實施例中,蓋150由能夠保護金屬層120之頂表面免受由金屬源(未圖示)提供之金屬之沈積的防沈積金屬製成。在一特定實施例中,蓋150由導電材料製成。導電材料可為可選自不鏽鋼及鎳中之一者或其合金之金屬。參看圖2A、圖2B及圖2C而描述在撓性膠帶基板110之選擇性區域上之沈積金屬的設備及方法之額外細節。
返回參看圖1C,蓋150之底表面152與金屬層120之頂表面共平面。曝露至孔140之底表面152能夠自金屬源接收金屬之沈積。經沈積之金屬(亦被稱為金屬插塞)能夠接合至金屬層120。在一特定實施例中,沈積於孔140中之金屬可與用以製造金屬層120之金屬相同,例如,銅。在另一實施例中,沈積於孔140中之金屬可與用以製造金屬層120之 金屬不同,例如,在銅層上之Ni金屬沈積。如較早所述,用於沈積之金屬或金屬層120被選擇為以下各者中之一者:銅、銀、金、鎳、鋅、鉑、鈀、銥、釕、鋨、銠、鐵、鈷、銦、錫、銻、鉛、鉍、及其合金。沈積於孔140中之金屬能夠將孔140插塞至選擇性高度。與在金屬與孔140中之金屬層120之曝露邊緣之間的黏合係數相比,包括底表面152之蓋150具有較低對金屬的黏合係數。當將蓋150與金屬層120分離時,黏合係數之差異藉此使插塞於孔140中之金屬能夠保持附著至孔140中之金屬層120之邊緣。蓋150可經處理以進一步減小對金屬之黏合係數。
圖1D說明根據一實施例的參看圖1A而描述的半導體裝置100之一部分之簡化且示意性橫截面圖,該半導體裝置100具有用金屬插塞至選擇性高度的孔140。在所描繪之實施例中,蓋150與金屬層120分離(例如,抬高或實體移除)。用金屬插塞的孔140之基底與金屬層120共平面。可變化沈積於孔140中的金屬之量以將選擇性高度自0調整至充分插塞孔。充分插塞孔140之選擇性高度等於厚度TS 112。在所描繪之實施例中,選擇性高度等於厚度TS 122,其等於金屬層120之厚度。
在一實例未描繪之實施例中,撓性膠帶基板110可經受進一步處理以完成半導體裝置100之組裝及封裝。舉例而言,藉由金屬之額外沈積或移除,可調整(例如,增加或減小)金屬層120之厚度或在孔140中之金屬沈積之選擇性高度或者兩者。可使用遮罩而在金屬層上形成電路圖案。 可剝離或蝕刻掉多餘金屬以留下所要電路圖案。
圖1E說明參看圖1A、圖1B、圖1C及圖1D而描述之根據一實施例之半導體裝置100於組裝後的簡化且示意性橫截面圖。在所描繪之實施例中,使用撓性膠帶基板110、具有所要金屬圖案的金屬層120、晶粒附著化合物162、晶粒160、接合線164及模塑化合物170來組裝半導體裝置100。將阻焊劑154材料塗覆於聚亞醯胺層130及金屬層120之頂表面上,以保護可能不需要焊料之區域。使用晶粒附著化合物162而將晶粒160附著至撓性基板110。如較早所述,沈積於孔中之金屬形成具有自0%變化至100%(例如,充分插塞孔或通道)之選擇性高度的金屬插塞172。可能需要將在通道中之金屬插塞172之高度選擇為至少約30%。此有利地自通道逐出焊料空隙,且亦限制水分(其可存在於撓性膠帶基板110中)進入通道中之焊料。金屬插塞172將金屬層120電耦接至按球柵陣列配置之複數個焊球中的對應焊球174。焊球174之一部分延伸至通道且附著至金屬插塞172。使用接合線164將晶粒160電耦接至金屬層120,且因此電耦接至金屬插塞172及焊球174。接著使用模塑化合物170來囊封半導體封裝。
圖2A說明根據一實施例的用於製造參看圖1A而描述的半導體裝置100之一部分之設備200之簡化方塊圖。在所描繪之實施例中,設備200包括一沖孔機210及一電鑄機總成220。在一實施例中,沖孔機210可操作以在撓性膠帶基板110中衝壓出通孔140,藉此產生具有孔140之撓性膠帶基 板110。電鑄機總成220可操作以在具有孔140之撓性膠帶基板110之選擇性區域上電沈積金屬。如較早所述,電鑄為藉由電沈積(亦被稱為電鍍)而形成金屬物件之製造製程。電沈積為回應於電輸入之來自電解質溶液之金屬離子的沈積(例如,電化學還原)。在所描繪之實施例中,電鑄機總成220可操作以電沈積一金屬,該金屬與用以形成金屬層120之金屬為同一金屬。參看圖2B來描述電鑄機總成220之額外細節。
圖2B說明根據一實施例的參看圖2A而描述的電鑄機總成220之簡化方塊圖。在所描繪之實施例中,電鑄機總成220包括一清潔機222、一活化器224、一電鑄機226及一乾燥機228。在一實例未描繪之實施例中,可添加沖洗機以在每一階段前或每一階段後或其組合時執行沖洗操作。在衝壓製程期間,具有孔140之撓性膠帶基板110由清潔機222清潔以移除不良沈積物或碎屑。清潔機222可包括鹼性電清潔溶液。清潔機222之強度可調整以促進清潔但避免蝕刻或溶解金屬層120。
活化器224可操作以活化金屬層120之金屬表面,藉此促進金屬之均勻電沈積。活化器224可包括化學品,例如,還原形成於表面上之氧化物以活化金屬表面的酸。電鑄機226可操作以在具有孔140之撓性膠帶基板110之經清潔且經活化之金屬表面的選擇性區域上執行金屬之電沈積。電鑄機226之特定操作(諸如,在基板之兩側上電鍍)可藉由移除組件來執行或可線外執行。參看圖2C而描述電鑄機226 之額外細節。乾燥機228可操作以乾燥已接收電沈積處理之撓性膠帶基板110之表面。
圖2C說明根據一實施例的參看圖2B而描述的電鑄機226之簡化方塊圖。在所描繪之實施例中,電鑄機226包括一心軸250、一用於金屬之電解質溶液260、一含有電解質溶液260之貯槽262、一電源270及一控制器280。可為整流器之電源270可操作以提供用以執行電鑄之電力。電源270包括提供至作為陰極272而連接的心軸250之負電壓。電源270包括連接至由金屬形成之陽極274之正電壓。藉由促進電極溶解及在貯槽262中之金屬離子之補給,電解質溶液260支援電沈積製程。
在一實施例中,心軸250與參看圖1C而描述之蓋150相同,且陽極274為金屬源。返回參看圖2C,耦接至陰極272之心軸250之表面與具有孔140之撓性膠帶基板110的金屬表面120部分歐姆接觸。因此,金屬表面120電耦接至陰極272。心軸250及撓性膠帶基板110部分浸漬於電解質溶液260中。心軸250能夠圍繞一軸線旋轉以控制孔140完全浸漬於電解質溶液260中的時間量。藉由處於歐姆接觸,除了孔140之基底之外,金屬表面120由心軸250之表面有利地遮蔽以免於接收金屬之電沈積。
控制器280可操作以接收輸入,且藉由控制孔140浸漬於電解質溶液260中的時間量及藉由控制在陰極272與陽極274之間流動的電流量來控制電沈積於撓性膠帶基板110之選擇性區域上(諸如,在孔140中)的金屬之量。控制器280 可(例如)由操作者以手動控制來操作,或者可以自動控制來操作。舉例而言,控制器280可操作以調整引起在曝露至孔140之心軸250之表面上的金屬之電沈積之時間及電流,藉此使孔140用金屬插塞至選擇性高度,例如,等於金屬層120之厚度TS 122的高度。
在一實施例中,在達到孔140中之插塞之選擇性高度後,心軸250可自貯槽移除,例如,以執行線外處理227。線外處理227之實例可包括基板遮罩、顯影及蝕刻。遮罩、顯影及蝕刻操作形成圖案側(假定層壓至撓性膠帶基板110的金屬層120具有所要厚度)。在一些應用中,線外處理可包括最終電鍍製程,以用諸如Ni及Au之金屬層覆蓋圖案及插塞之選擇性表面。在一些應用中,線外處理可包括使用電鍍製程來增加金屬層120之厚度。在此應用中,金屬層120呈薄晶種層之形式。薄晶種層之厚度經積聚而具有可用諸如Ni及Au或Ni及Pd之金屬過度電鍍的金屬圖案,此後,剝離抗蝕劑且蝕刻掉晶種層,進而留下用其他金屬之薄層蓋住的電離散圖案。在一些應用中,金屬層120可具有所要厚度。在遮罩、暴光-顯影迹線側且電鍍(例如,用Ni+Au)且剝離抗蝕劑後,不具有Ni及Au的經曝露之金屬層120使用Ni+Au作為蝕刻遮罩而蝕刻至聚亞醯胺,因此形成電離散迹線或圖案。
心軸250之移除使沈積於心軸250上之金屬屬於金屬層120。心軸250之分離曝露金屬層120之連續頂表面。孔140之基底具有插塞表面,其與金屬層120共平面。分離亦致 能在具有至少部分插塞之孔140之撓性膠帶基板110的額外區域上之金屬之沈積。亦即,具有至少部分插塞之孔的撓性膠帶基板110可浸漬於電解質溶液260中以用於接收額外電沈積處理(若需要)。舉例而言,可將金屬層120之厚度自TS 122增加至厚度TS2 292。在一特定實施例中,金屬層120為具有小於2微米之第一厚度的晶種層。經由電沈積製程,可將金屬層之厚度增加至約50微米。類似地,可將在孔140之內腔中之金屬的電沈積自等於TS 122之高度增加至小於厚度TS 112之第二高度TH2 294。若金屬層120之初始厚度滿足所要需要,則可不提供進一步的電沈積處理。如較早所述,在一實例未描繪之實施例中,遮罩可用以在金屬層120上形成電路圖案。可剝離或蝕刻掉多餘的金屬以留下所要電路圖案。若使用晶種層,則在圖案化及電鍍至所要厚度後,使用蝕刻製程以移除晶種層。
圖3A為說明根據一實施例的製造具有一撓性基板之半導體裝置之方法之流程圖。在一特定實施例中,圖3A說明用於製造參看圖1A、圖1B、圖1C、圖1D、圖1E、圖2A、圖2B及圖2C而描述之半導體裝置100之過程。在步驟310處,在撓性膠帶基板中衝壓出一孔。撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有黏合物。在步驟320處,將一蓋置放於金屬層上以蓋住孔之基底。在步驟330處,將一金屬沈積於在孔之基底處曝露的蓋上。經沈積之金屬(其可與用以形成金屬層之金屬為同一金屬)使孔被插塞至選擇性高度。在步驟340處,移除蓋以曝露具 有與金屬層共平面的插塞表面之基底。在步驟350處,藉由金屬之額外沈積將金屬層之厚度自第一厚度增加至第二厚度,且回應於金屬沈積於孔之內腔中,選擇性高度自第一高度增加至第二高度。
可按不同次序添加、省略、組合、更改或執行上述各種步驟。舉例而言,步驟330可被分為子步驟。圖3B為說明根據一實施例的藉由電鑄來沈積金屬之方法之流程圖。在一特定實施例中,圖3B說明參看圖2A、圖2B及圖2C而描述的電鑄之過程。在步驟3302處,清潔撓性膠帶基板。在步驟3304處,將撓性膠帶基板及蓋浸漬於金屬電解質溶液中,藉此將孔浸漬於電解質溶液中。在步驟3306處,將負電壓施加至蓋,蓋與金屬層歐姆接觸。在步驟3308處,將正電壓施加至由金屬製成之陽極以起始電沈積製程。
藉由根據本文中所呈現之說明性實施例的方法及設備達成若干優點。該等實施例有利地提供一種用於製造一具有一未使用黏合物(例如,不具有黏合物或無黏合物)之撓性膠帶基板的半導體裝置之改良之方法及設備。無黏合物之製造製程有利地使用較不昂貴的起始材料,消除將銅層層壓於黏合表面上之步驟,且藉由消除黏合物之使用而簡化衝壓操作。撓性膠帶基板之無黏合物製造亦有利地消除歸因於在通道中之黏合物材料之存在的金屬沈積之破壞,藉此減少空隙或缺陷插塞表面之形成。藉由消除內腔中之黏合物之可能性,無黏合物之製造技術有利地改良半導體封裝可靠性,藉此消除在焊料中的諸如凹口之缺陷之形成。 藉由消除缺陷(其可潛在地成為應力起始點),消除在可靠性測試期間的諸如焊接點破裂之應力誘發之缺陷。無黏合物之製造技術亦將電鑄用於在撓性膠帶基板之選擇性區域上之金屬之電沈積。舉例而言,電鑄有利地用以增加金屬層之厚度,該金屬層作為具有小於2微米之厚度的晶種層而開始,且積聚到數十微米的所要厚度。可布署諸如遮罩之標準製程來顯影迹線圖案,且可使用蝕刻來自具有增加之厚度的金屬層移除金屬。
雖然已在使用銅作為用於電鑄之金屬之情形下描述本揭示案之特定態樣,但一般熟習此項技術者應瞭解,所揭示之製程能夠用於具有不同類型之金屬及不同金屬沈積技術的半導體裝置之組裝。
熟習本發明所屬技術者應瞭解,所描述之實施例僅為代表性實例,且在所主張之本發明中,許多其他變化及實施例係可能的。
100‧‧‧半導體裝置
110‧‧‧撓性膠帶基板
112‧‧‧厚度
120‧‧‧金屬層
122‧‧‧厚度
130‧‧‧聚亞醯胺層
132‧‧‧厚度
140‧‧‧孔
150‧‧‧蓋
152‧‧‧底表面
154‧‧‧阻焊劑
160‧‧‧晶粒
162‧‧‧晶粒附著化合物
164‧‧‧接合線
170‧‧‧模塑化合物
172‧‧‧金屬插塞
174‧‧‧焊球
200‧‧‧設備
210‧‧‧沖孔機
220‧‧‧電鑄機總成
222‧‧‧清潔機
224‧‧‧活化器
226‧‧‧電鑄機
227‧‧‧線外處理
228‧‧‧乾燥機
250‧‧‧心軸
260‧‧‧電解質溶液
262‧‧‧貯槽
270‧‧‧電源
272‧‧‧陰極
274‧‧‧陽極
280‧‧‧控制器
圖1A至圖1E為根據實例實施例的在具有無黏合物之撓性膠帶基板之半導體裝置之製造過程中的各種步驟時之簡化示意性橫截面圖;圖2A至圖2C為在根據圖1A至圖1E之實例實施例的半導體裝置之製造過程中使用的設備之簡化方塊圖;圖3A至圖3B為根據實例實施例的說明用於製造具有一撓性基板之半導體裝置及用於藉由電鑄來沈積金屬之方法之流程圖。
100‧‧‧半導體裝置
110‧‧‧撓性膠帶基板
112‧‧‧厚度
120‧‧‧金屬層
122‧‧‧厚度
130‧‧‧聚亞醯胺層
132‧‧‧厚度
140‧‧‧孔
150‧‧‧蓋
152‧‧‧底表面

Claims (13)

  1. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含:在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔被插塞至一選擇性高度;及移除該蓋以曝露具有一與該金屬層共平面之插塞表面之該孔之該基底,其中回應於該蓋之該移除,沈積於該蓋上之該金屬被剝落,其中相對於該金屬與給該孔加襯之該金屬層之一邊緣之間的黏合係數,曝露至該孔之該蓋之一表面對該金屬具有一較低之黏合係數。
  2. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含:在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔 被插塞至一選擇性高度;移除該蓋以曝露具有一與該金屬層共平面之插塞表面之該孔之該基底;在該金屬層之該共平面表面上沈積該金屬,以將該金屬層之一厚度自一第一厚度增加至一第二厚度;及在該孔之一內腔中沈積該金屬,以將該選擇性高度自一第一高度增加至一第二高度,該第二高度不超過該金屬層與該聚亞醯胺層之一組合厚度,其中具有該第一厚度之該金屬層之一部分經遮罩以在具有該第二厚度之該金屬層上形成一電路圖案。
  3. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含:在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔被插塞至一選擇性高度;移除該蓋以曝露具有一與該金屬層共平面之插塞表面之該孔之該基底;在該金屬層之該共平面表面上沈積該金屬,以將該金屬層之一厚度自一第一厚度增加至一第二厚度;及在該孔之一內腔中沈積該金屬,以將該選擇性高度自 一第一高度增加至一第二高度,該第二高度不超過該金屬層與該聚亞醯胺層之一組合厚度,其中具有該第一厚度之該金屬層之一部分經剝離以移除該金屬,且具有該第二厚度之該金屬層之一部分經剝離以移除該金屬。
  4. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含:在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;及於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔被插塞至一選擇性高度,其中該金屬之該沈積係藉由電鑄來執行,其中該電鑄包括:清潔該撓性膠帶基板;將該撓性膠帶基板及該蓋浸漬於該金屬之一電解質溶液中,藉此將該孔浸漬於該電解質溶液中;將一負電壓施加至該蓋,該蓋係由一導電材料製成,該蓋與該金屬層歐姆接觸;及將一正電壓施加至一由該金屬製成之陽極。
  5. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含: 在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;及於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔被插塞至一選擇性高度,其中該金屬被選擇為銅、銀、金、鎳、鋅、鉑、鈀、銥、釕、鋨、銠、鐵、鈷、銦、錫、銻、鉛、鉍,及其合金中之一者,其中該金屬層係由另一金屬製成,該另一金屬被選擇為銅、銀、金、鎳、鋅、鉑、鈀、銥、釕、鋨、銠、鐵、鈷、銦、錫、銻、鉛、鉍,及其合金中之一者。
  6. 一種用於製造一具有一撓性膠帶基板之半導體裝置之方法,該方法包含:在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;將一蓋置放於該金屬層上,以蓋住該孔之一基底;及於該孔之該基底處曝露的該蓋上沈積一金屬,其中該金屬能夠接合至該金屬層,其中該經沈積之金屬使該孔被插塞至一選擇性高度,其中該蓋係可選擇的,以由不鏽鋼及鎳中之一者或其一合金製成。
  7. 一種用於製造一半導體裝置之一撓性膠帶基板之設備,該設備包含:一沖孔機,其在該撓性膠帶基板中衝壓出一孔,該撓性膠帶基板包括一附著至一聚亞醯胺層之金屬層,其間不具有一黏合物;及一電鑄機,其電沈積一金屬,其中該金屬能夠接合至該金屬層,其中該電鑄機包括:一心軸,其由一導電材料製成,該心軸具有一與該金屬層歐姆接觸之表面;一用於該金屬之電解質溶液,該心軸及該撓性膠帶基板部分浸漬於該電解質溶液中;一電源,其能夠提供一正電壓及一負電壓,其中該負電壓被提供至連接作為一陰極之該心軸,其中一正電壓被提供至一由該金屬製成之陽極,其中該金屬電沈積於曝露至該孔之該心軸之一表面上,其中經電沈積之該金屬使該孔被插塞至一選擇性高度。
  8. 如請求項7之設備,進一步包含:一控制器,其藉由控制該孔浸漬於該電解質溶液中之一時間量及在該陽極與該陰極之間流動之一電流量來控制該選擇性高度。
  9. 如請求項7之設備,其中該半導體裝置為一微處理器、一特殊應用積體電路(ASIC)、一數位信號處理器、一射頻晶片、一記憶體、一微控制器及一晶片上系統,或其一組合中之至少一者。
  10. 如請求項7之設備,其中該選擇性高度係可選擇的,以為該金屬層之一厚度與該撓性層基板之一厚度之間。
  11. 如請求項7之設備,其中當回應於該心軸之一旋轉,該金屬層與該心軸分離時,沈積於該心軸之該表面上的該金屬被剝落,其中相對於在該金屬與在該孔內之該金屬層之一邊緣之間的黏合係數,該心軸之該表面對該金屬具有一較低的黏合係數。
  12. 如請求項7之設備,其中該心軸與該金屬層分離以曝露該孔,該孔具有一與該金屬層共平面之插塞表面。
  13. 如請求項7之設備,其中該電鑄機經組態以藉由將該負電壓提供至該金屬層且將該正電壓提供至該陽極,而在無該心軸之情況下操作,藉此使該金屬電沈積於該金屬層之該共平面表面上,且致能該金屬層之厚度的增加,自一第一厚度至一第二厚度,並使該金屬電沈積於該孔之一內腔中,且致能該選擇性高度的增加,自一第一高度至一第二高度,該第二高度不超過該金屬層與該聚亞醯胺層之一組合厚度。
TW097121815A 2007-06-12 2008-06-11 在金屬與聚亞醯胺間不具黏合物之金屬插塞基板 TWI405513B (zh)

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