TWI383717B - 印刷電路板製造方法及由此製造之印刷電路板 - Google Patents

印刷電路板製造方法及由此製造之印刷電路板 Download PDF

Info

Publication number
TWI383717B
TWI383717B TW097141256A TW97141256A TWI383717B TW I383717 B TWI383717 B TW I383717B TW 097141256 A TW097141256 A TW 097141256A TW 97141256 A TW97141256 A TW 97141256A TW I383717 B TWI383717 B TW I383717B
Authority
TW
Taiwan
Prior art keywords
metal layer
gold
substrate
layer
printed circuit
Prior art date
Application number
TW097141256A
Other languages
English (en)
Other versions
TW200930183A (en
Inventor
Jae-Chul Ryu
Original Assignee
Samsung Techwin Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Techwin Co Ltd filed Critical Samsung Techwin Co Ltd
Publication of TW200930183A publication Critical patent/TW200930183A/zh
Application granted granted Critical
Publication of TWI383717B publication Critical patent/TWI383717B/zh

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/241Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0315Oxidising metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0361Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0542Continuous temporary metal layer over metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1142Conversion of conductive material into insulating material or into dissolvable compound
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49204Contact or terminal manufacturing
    • Y10T29/49208Contact or terminal manufacturing by assembling plural parts
    • Y10T29/4921Contact or terminal manufacturing by assembling plural parts with bonding
    • Y10T29/49211Contact or terminal manufacturing by assembling plural parts with bonding of fused material
    • Y10T29/49213Metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

印刷電路板製造方法及由此製造之印刷電路板
本發明關於一種製造印刷電路板(PCB)的方法及由此製造之印刷電路板,更特定言之係關於一種製造PCB的方法及由該方法製造的PCB,在該方法中利用一陽極處理程序形成一用於保護一基板上之一電路圖案的氧化物層。
近年來隨著電子設備日益縮小及其功能更為複雜,多晶片封裝體(MCPs)或內有積體電路(IC)晶片堆疊之堆疊晶片尺寸封裝體被廣泛使用。用於MCP或堆疊晶片尺寸封裝體的IC封裝基板必須有一預定厚度或更小厚度使得MCP或堆疊晶片尺寸封裝體可應用於具有複雜功能的小尺寸電子設備。
製造印刷電路板(PCB)之傳統方法必定包含一塗布抗焊劑(solder resist)的程序以便防止一基板之一外表面上的暴露電路圖案(或互連圖案)氧化並使電路圖案彼此電絕緣。該抗焊劑係一種塗料且係藉由塗布在基板上之銅箔腐蝕獲得。基本上來說,該抗焊劑係一未塗有一絕緣材料的裸線。
第1圖是一使用一引線之傳統金電鍍程序的方塊圖,且第2A至2C圖是例示利用一金電鍍程序製造PCB之傳統方法的圖。
參照第1及2A至2C圖,在步驟S10中,在一基板1之一表面上形成一互連圖案2和一引線圖案3,且使由一絕緣材料構成的抗焊劑4塗布在基板1之全表面上。
然後在步驟S20中,進行一乾燥程序、一曝光程序及一顯影程序,藉此形成一讓一晶片(圖中未示)於其內安裝到基板1之一預定位置的窗口5,使得一搭接金手指2a在基板1上暴露。
然後在步驟S30中,將一電源6連接到引線圖案3且用金2a’電鍍搭接金手指2a以便增進搭接效率。
但由於其必須形成一鍍金引線以便用金電鍍搭接金手指2a,製造傳統PCB係複雜且花錢的。
又,傳統抗焊劑具有高吸濕率及高熱膨脹係數,故傳統PCB無法確保高可靠度。
再者,當基板1有一極小厚度時,必須更進一步將一加勁板黏附於基板1,因此要在一封裝體組裝程序期間於程序步驟之間的間隔移動或搬運PCB會有困難。
本發明之一範例實施例提出一種製造印刷電路板(PCB)的方法及由此方法製造之PCB,其中藉由初次陽極處理程序用金電鍍一搭接金手指且藉由二次陽極處理程序在一基板之表面上形成一絕緣層,使得金電鍍程序無須引線即可進行。
本發明之另一範例實施例提出一種製造PCB的方法及由此方法製造之PCB,其中一由陽極處理形成的氧化物層可有效地保護一形成於一基板上之電路圖案並使電路彼此電絕緣以增強可靠度。
本發明之更另一範例實施例提出一種製造PCB的方法及由此方法製造之PCB,其中一基板之表面經陶瓷塗布使得該基板可維持剛度而不需要對一小厚度的基板黏上一加勁板,因此要在一封裝體組裝程序期間於程序步驟之間的間隔移動或搬運PCB係易於進行。
在一觀點中,本發明係關於一種製造PCB的方法。該方法包含:在一具有一外表面的基板之全表面上塗布一金屬層,在該外表面上有一互連圖案形成;從該基板表面部分地移除該金屬層以形成一供一晶片安裝於內的窗口且部分地暴露該互連圖案以形成一搭接金手指;藉由使該金屬層初次陽極處理的方式在該金屬層上形成一第一絕緣層;藉由向該金屬層供電的方式電鍍該搭接金手指之一表面;且藉由使該金屬層完全二次陽極處理的方式形成一位於該第一絕緣層下方的第二絕緣層。
依據本發明各實施例,當搭接金手指被電鍍時,該互連圖案可不包含一電鍍引線。
該金屬層可由Al、Mg、Zn、Ti、Ta、Hf、及Nb當中任一者構成。
部分地暴露該互連圖案可由一曝光程序、一顯影程序及一蝕刻程序進行。
搭接金手指之表面的電鍍可由一金電鍍程序進行。其中,該第一和第二絕緣層可為氧化物層。
在另一觀點中,本發明係關於一種PCB。該PCB包含:一設置在一基板之一外表面上的互連圖案。一因該基板表面上之互連圖案部分地暴露而形成的搭接金手指經金電鍍。該互連圖案之一未暴露部分經一氧化物層塗布。
該氧化物層可為氧化鋁(Al2 O3 )層。
以下將參照示出本發明之範例實施例的隨附圖式更詳盡地說明本發明各實施例。在圖式中,各層和區域之厚度可能經誇大以利圖面清楚。應理解到當一層被稱為在另一層或基板〝上〞時,其可為直接在該另一層或基板上或者亦可能有中間層存在。本說明書全文以相同參考數字標示相同元件。
第3圖是一例示依據本發明各實施例之PCB製造方法的流程圖,且第4A至4D圖是例示依據本發明各實施例之PCB製造方法的圖。
參照第3及4A至4D圖,一種依據本發明各實施例製造PCB的方法包含:在一具有一外表面的基板110之全表面上塗布一金屬層113,在該外表面上有一互連圖案111形成(步驟S110)。在步驟S120中,從基板110之表面部分地移除金屬層113以形成一供一晶片(圖中未示)安裝於內的窗口且部分地暴露基板110表面上之互連圖案111以形成一搭接金手指111a。在步驟S130中,初次陽極處理金屬層113以在金屬層113之一表面上形成一絕緣層113a。在步驟S140中,藉由向金屬層113供電115的方式用金111a’電鍍搭接金手指111a之一表面。在步驟S150中,二次陽極處理金屬層113使得整個金屬層113(亦即金屬層113之表面及其內部)係由一絕緣材料或氧化物構成。
在初次陽極處理期間金屬層113只有表面被氧化,而在二次陽極處理期間金屬層113不僅表面還有其內部皆被氧化。
在初次陽極處理期間,僅有金屬層113表面被氧化,使得金屬層113可電連接至由銅箔構成的互連圖案111,且互連圖案111之搭接金手指111a可被金電鍍。
金屬層113可由一濺鍍程序或蒸鍍程序塗布。
在步驟S120中,露出欲用金111a’電鍍之互連圖案111搭接金手指111a可由一曝光程序、一顯影程序及一蝕刻程序進行,且該蝕刻程序可利用一用於蝕刻鋁的材料例如氫氧化鈉或是硝酸、磷酸與醋酸之一混合物進行。
在依據本發明各實施例製造PCB的方法中,當搭接金手指111a用金111a’電鍍時,互連圖案111不包含電鍍引線。換句話說,由於金111a’之電鍍不用引線,在形成互連圖案111時不用製備引線。
在步驟S140中,電鍍搭接金手指111a表面可由用金111a’電鍍進行。其中,搭接金手指111a係指互連圖案111之一部分,其電連接於晶片之一搭接墊。
又,當金屬層112被二次陽極處理時,金屬層112完全被氧化。
在陽極氧化(或陽極處理)過程中,一當作陽極的金屬層於一稀釋酸溶液內電解,使得該金屬層與陽極產生之氧反應,藉此形成一對於賤金屬有良好黏附特性的金屬氧化物層。
一般而言,陽極處理程序可為在一鋁(Al)層上進行。然鎂(Mg)、鋅(Zn)、鈦(Ti)、鉭(Ta)、鉿(Hf)、或鈮(Nb)亦可被陽極處理。
當一Al層在陽極被電解時,該Al層之一表面之厚度的一半被腐蝕,且另一半具有氧化鋁(Al2 O3 )。在此例中,Al2 O3 層之特質可能取決於陽極處理程序之處理條件,特定言之係取決於溶液之組成和濃度、添加物種類、溶液溫度、電壓、及電流。陽極處理程序導致一具有高腐蝕抗性的氧化物塗層形成。又,PCB可改善外觀,因為陽極處理程序產生裝飾性效果。
實施例1
第5A至5F圖是例示依據本發明一範例實施例之PCB製造方法的圖。
參照第5A圖,互連圖案211例如銅圖案形成於一基板210之兩面上且藉由一通道212彼此電連接。
參照第5B圖,一金屬層213例如Al層213塗布於基板210之全表面上。在此例中,金屬層213可由一濺鍍程序或蒸鍍程序塗布達到數微米之厚度。更特定言之,金屬層213可經形成達到一不允許有超過約0.3MΩ之電阻的厚度,且因此在後續程序中不會妨礙電流之流動。
參照第5C圖,進行曝光、顯影及蝕刻程序使得金屬層213從基板210之一表面部分地移除,藉此形成一供一晶片(圖中未示)安裝於內的窗口。因此,該窗口經形成使互連圖案211部分地暴露以形成一搭接金手指211a。
參照第5D圖,金屬層213被初次陽極處理使得一氧化物層213a僅形成於金屬層213上。
參照第5E圖,一電流供應給金屬層213使得搭接金手指211a之一表面被金211a’電鍍。由於氧化物層213a僅形成於金屬層213上,故只有搭接金手指211a被金211a’電鍍但金屬層213沒有。
參照第5F圖,為防止互連圖案211氧化,金屬層213被二次陽極處理使金屬層213完全氧化以形成一金屬氧化物層213b例如氧化鋁(Al2 O3 )層,其發揮抗焊劑的功能。
如第5F圖所示,依據本發明一實施例由上述方法製成的PCB包含塗布在基板210之一外表面上的互連圖案211、在基板210表面上暴露且經金211a’電鍍的互連圖案211搭接金手指211a、及塗布於互連圖案211之一未暴露部分上的金屬氧化物層213b。
依據前述發明實施例,一金電鍍程序無須引線即可進行,且一由一陽極處理程序形成的氧化物層可保護一形成於一基板上的電路圖案並使電路彼此電絕緣。又,由於如上所述依據本發明各實施例之PCB相較於傳統抗焊劑具有低吸濕率及低熱膨脹係數,本發明的PCB極為可靠。
為促進對於本發明之原則的理解,以上已就圖式所示較佳實施例做說明,且已用特定文字描述這些實施例。但這些內容並非希望限制本發明之範圍,且本發明應解釋為涵蓋熟習此技藝者通常會想到的所有實施例。
本發明可用功能性方塊組件及各處理步驟描述。此等功能性方塊可由任意數量經構形用以執行指定功能的組件實現。此外,本發明可運用任意數量關於電子組態、信號處理及/或控制、資料處理及類似技術的習知技術。
本說明書所示特定實施例係本發明之範例實例且不希望以任何方式限制本發明之範圍。為求簡潔,習知觀點可能不詳細描述。此外,各圖式中示出的連接線或連接器並非想要代表各元件之間的範例功能性關係及/或實體或邏輯性耦合。應理解到許多替代或附加功能性關係、實體連接或邏輯性連接可能出現在一實行裝置中。再者,除非文中明確稱之為〝關鍵的〞元件,否則各單體或組件並非實行本發明所不可或缺。
本發明之說明內容(特別是以下申請專利範圍項之內容)中有關〝一〞、〝該〞及類似指示詞的使用應解釋為涵蓋單數形和複數形。又,文中關於數值範圍的敘述除非另有說明否則只是用來指出該範圍內每一單獨數值的簡化方法,且將每一單獨數值以視為在文中個別提及的方式併入本說明書中。最後,文中所述所有方法的步驟除非文中另有說明或依內容判斷會有明顯矛盾產生,否則可依任何適當順序進行。〝機構〞一辭係依廣義解釋使用且不侷限在機械實施例。熟習此技藝者會輕易想出不脫離本發明之精神和範圍的許多修改和調適形式。
S10...用抗焊劑塗布基板表面
S20...使搭接金手指外露
S30...用金電鍍搭接金手指
1、110、210...基板
2、111、211...互連圖案
3...引線圖案
4...抗焊劑
5...窗口
2a...搭接金手指
2a’、111a’...金
S110...用金屬層塗布基板表面
S120...使搭接金手指外露
S130...一次陽極處理該金屬層
S140...二次陽極處理該金屬層
111a、211a...搭接金手指
113、213...金屬層
113a...絕緣層
115...供電
211a’...被金
212...通道
213a...氧化物層
213b...金屬氧化物層
本發明之上述及其他目標、特徵和優點將在如隨附圖式所例示之發明範例實施例的更詳盡說明中顯露。圖式不一定按比例繪製,重點在於例示本發明之原則。
第1圖是一使用引線之傳統金電鍍程序的方塊圖;
第2A-2C圖是例示利用金電鍍程序製造印刷電路板(PCB)之一傳統方法的圖;
第3圖是一例示依據本發明一實施例之PCB製造方法的流程圖;
第4A-4D圖是例示依據本發明一實施例之PCB製造方法的圖;且
第5A-5F圖是例示依據本發明一範例實施例之PCB製造方法的圖。
S110...用金屬層塗布基板表面
S120...使搭接金手指外露
S130...一次陽極處理該金屬層
S140...二次陽極處理該金屬層

Claims (6)

  1. 一種製造印刷電路板(PCB)的方法,其包括:在具有一外表面的一基板之全表面上塗布一金屬層,在該外表面上有一互連圖案形成;從該基板表面部分地移除該金屬層以形成供一晶片安裝於其內的一窗口且部分地暴露該互連圖案以形成一搭接金手指;藉由使該金屬層初次陽極處理的方式在該金屬層上形成一第一絕緣層;藉由向該金屬層供電的方式電鍍該搭接金手指之一表面;以及藉由使該金屬層完全二次陽極處理的方式形成位於該第一絕緣層下方的一第二絕緣層。
  2. 如申請專利範圍第1項之方法,其中該金屬層係用從Al、Mg、Zn、Ti、Ta、Hf及Nb組成之群中選出之一者所形成。
  3. 如申請專利範圍第1項之方法,其中部分地暴露該互連圖案係由一曝光程序、一顯影程序及一蝕刻程序進行。
  4. 如申請專利範圍第1項之方法,其中電鍍該搭接金手指表面係由一金電鍍程序進行。
  5. 如申請專利範圍第1項之方法,其中該第一絕緣層和該第二絕緣層是氧化物層。
  6. 如申請專利範圍第1項之方法,其中該搭接金手指是 該互連圖案與該晶片之一搭接墊電連接的一部分。
TW097141256A 2007-10-26 2008-10-27 印刷電路板製造方法及由此製造之印刷電路板 TWI383717B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070108407A KR101126767B1 (ko) 2007-10-26 2007-10-26 인쇄회로기판의 제조방법 및 그 방법에 의해 제조된인쇄회로기판

Publications (2)

Publication Number Publication Date
TW200930183A TW200930183A (en) 2009-07-01
TWI383717B true TWI383717B (zh) 2013-01-21

Family

ID=40581350

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097141256A TWI383717B (zh) 2007-10-26 2008-10-27 印刷電路板製造方法及由此製造之印刷電路板

Country Status (5)

Country Link
US (1) US8122599B2 (zh)
JP (1) JP4705143B2 (zh)
KR (1) KR101126767B1 (zh)
CN (1) CN101419918B (zh)
TW (1) TWI383717B (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9559449B2 (en) 2013-09-05 2017-01-31 Fujikura Ltd. Printed wiring board and connector connecting the wiring board
US9601853B2 (en) 2013-09-05 2017-03-21 Fujikura Ltd. Printed wiring board and connector connecting the wiring board
US9655241B2 (en) 2013-09-05 2017-05-16 Fujikura Ltd. Printed wiring board and connector connecting the wiring board

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI442000B (zh) * 2011-07-19 2014-06-21 Wistron Corp 燈條結構及其光源裝置
CN102510682B (zh) * 2011-12-21 2016-02-24 博罗县精汇电子科技有限公司 采用跳步再蚀刻法生产插件镀金有缝长短手指的方法
KR101976436B1 (ko) * 2012-04-12 2019-05-09 엘지이노텍 주식회사 기판, 발광 모듈 및 조명 시스템
US9113583B2 (en) * 2012-07-31 2015-08-18 General Electric Company Electronic circuit board, assembly and a related method thereof
KR101616625B1 (ko) * 2014-07-30 2016-04-28 삼성전기주식회사 반도체 패키지 및 그 제조방법
JP6453622B2 (ja) * 2014-11-21 2019-01-16 デクセリアルズ株式会社 配線基板の製造方法、及び配線基板
WO2017095189A1 (ko) * 2015-12-02 2017-06-08 웰머 주식회사 알루미늄 박막의 형성 방법 및 이에 따른 알루미늄 박막
CN107809852A (zh) * 2016-09-08 2018-03-16 鹏鼎控股(深圳)股份有限公司 无导线表面电镀方法及由该方法制得的电路板
KR102595293B1 (ko) 2018-02-12 2023-10-30 삼성전자주식회사 인쇄 회로 기판 및 이를 포함하는 반도체 패키지

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11220245A (ja) * 1998-01-30 1999-08-10 Yazaki Corp 電気回路及び電気回路の形成方法
JP2003013281A (ja) * 2001-06-29 2003-01-15 Ryouwa:Kk 電解メッキ方法及びプリント配線基板の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3205555A (en) * 1961-11-07 1965-09-14 Western Electric Co Methods of making printed circuit components
JPS62242337A (ja) * 1986-04-15 1987-10-22 Toshiba Corp 多層配線用金属膜の形成方法
US4897508A (en) * 1988-02-10 1990-01-30 Olin Corporation Metal electronic package
JPH02164093A (ja) 1988-12-19 1990-06-25 Mitsubishi Electric Corp 回路基板の製造方法
US5025114A (en) * 1989-10-30 1991-06-18 Olin Corporation Multi-layer lead frames for integrated circuit packages
US5136474A (en) * 1990-04-03 1992-08-04 Giner, Inc. Proton exchange membrane electrochemical capacitors
US5545850A (en) * 1995-01-13 1996-08-13 Olin Corporation Guard ring for integrated circuit package
US5742009A (en) * 1995-10-12 1998-04-21 Vlsi Technology Corporation Printed circuit board layout to minimize the clock delay caused by mismatch in length of metal lines and enhance the thermal performance of microeletronics packages via condution through the package leads
US5986885A (en) * 1997-04-08 1999-11-16 Integrated Device Technology, Inc. Semiconductor package with internal heatsink and assembly method
CN1468049A (zh) * 2002-07-08 2004-01-14 联测科技股份有限公司 一种用以在印刷电路板的电路布局上电镀导接层的方法
KR100632577B1 (ko) * 2004-05-03 2006-10-09 삼성전기주식회사 인쇄회로기판의 전해 금도금 방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11220245A (ja) * 1998-01-30 1999-08-10 Yazaki Corp 電気回路及び電気回路の形成方法
JP2003013281A (ja) * 2001-06-29 2003-01-15 Ryouwa:Kk 電解メッキ方法及びプリント配線基板の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9559449B2 (en) 2013-09-05 2017-01-31 Fujikura Ltd. Printed wiring board and connector connecting the wiring board
US9601853B2 (en) 2013-09-05 2017-03-21 Fujikura Ltd. Printed wiring board and connector connecting the wiring board
US9655241B2 (en) 2013-09-05 2017-05-16 Fujikura Ltd. Printed wiring board and connector connecting the wiring board
TWI603659B (zh) * 2013-09-05 2017-10-21 Fujikura Ltd Printed circuit board and connector to connect the circuit board
TWI603656B (zh) * 2013-09-05 2017-10-21 Fujikura Ltd Printed circuit board and connector to connect the circuit board

Also Published As

Publication number Publication date
TW200930183A (en) 2009-07-01
KR101126767B1 (ko) 2012-03-29
KR20090042569A (ko) 2009-04-30
JP4705143B2 (ja) 2011-06-22
CN101419918B (zh) 2011-12-28
CN101419918A (zh) 2009-04-29
US8122599B2 (en) 2012-02-28
US20090107699A1 (en) 2009-04-30
JP2009111387A (ja) 2009-05-21

Similar Documents

Publication Publication Date Title
TWI383717B (zh) 印刷電路板製造方法及由此製造之印刷電路板
US20060131729A1 (en) Ball grid array substrate having window and method of fabricating same
US9107313B2 (en) Method of manufacturing a hybrid heat-radiating substrate
JP2000269381A (ja) パッケージ基板、半導体パッケージおよび製造方法
JP2004193549A (ja) メッキ引込線なしにメッキされたパッケージ基板およびその製造方法
JP2008085089A (ja) 樹脂配線基板および半導体装置
TWI397358B (zh) 打線基板及其製作方法
JP2011187913A (ja) 電子素子内蔵型印刷回路基板及びその製造方法
US6651324B1 (en) Process for manufacture of printed circuit boards with thick copper power circuitry and thin copper signal circuitry on the same layer
JP2001015895A (ja) 配線基板およびその製造方法
JP2000091743A (ja) ビルドアップ多層基板及びその製造方法
KR100495932B1 (ko) 필름 캐리어 테이프 및 그 제조방법
JP2007324232A (ja) Bga型多層配線板及びbga型半導体パッケージ
JP2010199530A (ja) 印刷回路基板及びその製造方法
JP4826103B2 (ja) 半導体装置用基板、および半導体素子用bgaパッケージ
JP2005235982A (ja) 配線基板の製造方法と配線基板、および半導体パッケージ
JP2005093502A (ja) 半導体装置用テープキャリア
JP4591098B2 (ja) 半導体素子搭載用基板の製造方法
JP2006049642A (ja) 両面配線テープキャリアの製造方法およびその方法により製造されたテープキャリア
JP2008288494A (ja) 半導体部品搭載用有機配線基板及びその製造方法
JP5312831B2 (ja) プリント配線板の製造方法
KR101118878B1 (ko) 회로 기판 및 그 제조 방법, 그리고 상기 회로 기판을 구비하는 반도체 패키지 및 그 제조 방법
JP2008004857A (ja) プリント配線板とその製造方法
JP2008078303A (ja) Lga用搭載基板と半導体集積回路装置
JP2004158888A (ja) 配線基板の製造方法