TWI380413B - Pressure sensing device package and manufacturing method thereof - Google Patents
Pressure sensing device package and manufacturing method thereof Download PDFInfo
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- TWI380413B TWI380413B TW097122867A TW97122867A TWI380413B TW I380413 B TWI380413 B TW I380413B TW 097122867 A TW097122867 A TW 097122867A TW 97122867 A TW97122867 A TW 97122867A TW I380413 B TWI380413 B TW I380413B
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- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L19/00—Details of, or accessories for, apparatus for measuring steady or quasi-steady pressure of a fluent medium insofar as such details or accessories are not special to particular types of pressure gauges
- G01L19/14—Housings
- G01L19/148—Details about the circuit board integration, e.g. integrated with the diaphragm surface or encapsulation
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- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L19/00—Details of, or accessories for, apparatus for measuring steady or quasi-steady pressure of a fluent medium insofar as such details or accessories are not special to particular types of pressure gauges
- G01L19/14—Housings
- G01L19/141—Monolithic housings, e.g. molded or one-piece housings
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Description
1380413 0803006 28056twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種感測元件封裝及其製作方法,且 特別是有關於一種壓力感測元件封裝及其製作方法。 【先前技術】 壓力感測器是利用壓力感測元件來測知其承受(戋 接觸)氣體或液體壓力的數值。於習知技術t,是將壓力 • 感測元件固定在預成型封裝導線架(pre-mold leadfMm〇 上,並將壓力感測元件打線接合至導線架,以使壓力感測 元件的訊號可藉由導線架傳遞至外界。之後,再加上蓋 以包覆壓力感測元件,以形成壓力感測元件封裝。另可: 將壓力感測元件固定在導線架(leadframe)上,並將壓力 • 感測兀件打線接合至導線架。之後,再以封裝膠體包覆壓 力感測7G件、導線與部分導線架,以形成壓力感測元件封 裝。 籲 於習知技術中,壓力感測元件是配置在導線架上,並 以打線接合(wire bonding)的方式分別與這些引腳電性連 接。因此1知的壓力感測元件縣的體積偏大而不利於 壓力感測元件朝向小型化的方向發展。 、 【發明内容】 本發明提出一種壓力感測元件封裝’其體積較小。 ,本發明更提出一種壓力感測元件封裝的製作方法,其 所製得的壓力感測元件封裝的體積較小。 '八 本發明提出一種壓力感測元件封裝,包括—線路基 5 1380413 0803006 28056twf.doc/n • 板、一壓力感測元件、一封裝膠體與一軟性保護層。線路 基板具有一開口。壓力感測元件覆晶接合(flip chip bonding)於線路基板上,並具有一感測區域,其朝向開口。 封裝耀·體包覆壓力感測元件’但暴露出感測區域。軟性保 護層配置於感測區域上,並受到線路基板的開口所暴露。 在本發明之一實施例中,壓力感測元件包括一壓力感 測晶片與一玻璃。壓力感測晶片具有一壓力感測薄膜,其 φ 位於感測區域内。玻璃黏著於壓力感測晶片(非感測薄膜區 域)’並與壓力感測薄膜形成一密閉空腔。 在本發明之一實施例中,壓力感測元件封裝更包括多 個導電凸塊,其中壓力感測晶片經由導電凸塊覆晶接合至 線路基板。 在本發明之一實施例中,壓力感測元件封裝更包括一 止洩牆(dam),配置於壓力感測元件與線路基板之間, 並圍繞壓力感測元件。 在本發明之一實施例中,塵力感測元件封裝更包括一 特姝應用積體電路(applicati〇n speciflc integrated circuit, ASIC)晶片,配置於線路基板之上,並與線路基板電性 接。 在本發明之一實施例中,封裝膠體更包覆特殊應用積 體電路晶片。 在本發明之一實施例中,特殊應用積體電路晶片固定 於線路基板上,並打線接合至線路基板。 在本發明之一實施例中,特殊應用積體電路晶片包括 6 1380413 0803006 28056twf.doc/n 覆晶接合於線路基板上。 在本發明之一實施例中,特殊應用積體電路晶片包括 固定於壓力感測元件上並打線接合至線路基板。 在本發明之一實施例中,壓力感測元件封敦更包括乡 個導電球,配置於線路基板之相對遠離於壓力感測元件的 一表面上。 在本發明之一實施例中’軟性保護層的材質包括石夕膠 (silicone)。 在本發明之一實施例中,軟性保護層更配置於由線路 基板與壓力感測元件所構成的空隙中。 本發明提出一種壓力感測元件封裝的製作方法如下 所述。首先,覆晶接合一壓力感測元件於一線路基板上, 其中線路基板具有一開口,而壓力感測元件具有一感測區 域,其朝向開口。接著,在壓力感測元件外圍與線路基板 ,間形成一止洩牆(dam),以防止後續作業溢膠至感測 區域。接著,形成一封裝膠體來包覆壓力感測元件,但不 包^感測區域。然後,於感測區域上形成一軟性保護層, 其受到線路基板的開口所暴露。 曰 一汽t發明之—實施例中,所採用的壓力感測元件包括 =感—片與-玻璃。壓力感測晶片覆晶接合於線路 ^具有—壓力感測薄膜,其位於感囊域内並位 』成=閉=黏著於壓力感測晶片,並與壓力感測薄 在本發明之-實施例中,在覆晶接合壓力感測元件的 7 0803006 28056twf.doc/n 步驟中,經由多個導電凸塊將壓力感測晶片覆晶接合於線 路基板上。 在本發明之一實施例中,在形成封裝膠體的步驟以前 更包括於壓力感測元件與線路基板之間形成一止洩牆,其 圍繞壓力感測元件,用以防止封裝膠體覆蓋感測區域。 在本發明之一實施例中,在形成封裝膠體的步驟之前 更包括將一特殊應用積體電路晶片配置於線路基板上並 與線路基板電性連接。 在本發明之一實施例中,在形成封裝膠體的步驟中, 封裝膠體更包覆特殊應用積體電路晶片。 在本發明之一實施例中,將特殊應用積體電路晶片與 線路基板電性連接的步驟包括將特殊應用積體電路晶片覆 晶接合於線路基板上。 在本發明之一實施例中,將特殊應用積體電路晶片與 2路基板電性連接的步驟包括將特殊應用積體電路晶片固 定於線路基板上,並將其打線接合至線路基板。 在本發明之一實施例中,將特殊應用積體電路晶片與 ,路基板電性連接的步驟包括將特殊應用讀體電路晶片/固 疋於壓力感測元件上,並將其打線接合至線路基板。 、在本發明之一實施例中,壓力感測元件封裝的製作方 法更包括在線路基板之一表面上形成多個導電球。 在本發明之一實施例中,在形成軟性保護層的步驟 中’更包括將軟性保護層填人由料基板與壓力感測元件 所構成的空隙中。 0803006 28056twf.doc/n 本發暇抑覆晶接合的方找壓力^収件配 ;、-路基板上’而覆晶接合所需的承載器(即線路及拓 面積小於打線接合所需的承載器(即導線架)面積。土 ), 本發明之壓力制元件域的體積比習知的壓力 杜 封裝的體積小。 〜 件 ^為讓本發明之上述和其他特徵和優點能更明顯县 懂’下文特舉實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 圖1為本發明一實施例之壓力感測元件封裝的剖面示 意圖。圖2為本發明另一實施例之壓力感測元件封裝: 面示意圖。 ° 請參照圖1,本實施例之壓力感測元件封裴1〇〇包括 一線路基板110、一壓力感測元件12〇、一封裝膠體13〇 與一軟性保護層140。 線路基板11〇具有一開口 〇p。線路基板例如是 單層線路基板或多層線路基板。於本實施例中,線路基板 110可具有一基層112、一第一線路層Π4、一第二線路層 116與多個導電通道118’其中第一線路層1H與第二線路 層116分別配置於基層112的上表面U2a與下表面U2b。 導電通道118貫穿基層112並與第一及第二線路層n4、 116電性連接。 壓力感測元件120覆晶接合於線路基板11〇上,並具 有一感測區域S ’其朝向開口 OP。具體而言,本實施例的 壓力感測元件120是透過多個導電凸塊B覆晶接合至線路 1380413 0803006 28056twf.doc/n
基板110的第一線路層114。導電凸塊B例如是金凸塊或 是其他適合的凸塊D 值得注意的是’不同於習知,本實施例是以覆晶接合 的方式將虔力感測元件丨2〇配置於線路基板no上。覆晶 接合是指壓力感測元件丨2〇透過其下的導電凸塊b與線路 基板110連接。而相較於覆晶接合,習知的打線接合則是 指壓力感測元件透過多條導線分別向遠離壓力感測元件的 方向延伸至導線架的多個引腳。 因此,覆晶接合所需的承載器(即線路基板11〇)的 面積小於打線接合所需的承載器(即導線架)面積。如此 一來’本實施例的壓力感測元件封裝1〇〇的體積比習知的 壓力感測元件封裝的體積小,並有利於本實施例的壓力感 測元件封裝100朝向小型化的方向發展。 於本實施例中’壓力感測元件120包括一壓力感測晶 片122與一玻璃124,其中壓力感測晶片122具有一壓力 感測薄膜122a,其位於感測區域S内。於本實施例中,壓 力感測晶片122具有一相對於感測區域s的凹槽V,而壓 力感測薄膜122a為凹槽V的底部,且壓力感測晶片122 可藉由壓力感測薄膜122a感測與開口 〇p連通的外界流體 壓力。 玻璃124黏著於壓力感測晶片122,並與壓力感測薄 膜122a形成一密閉空腔C。詳細而言,密閉空腔C是由玻 璃124密封壓力感測晶片122的凹槽V所形成的。而且, 密閉空腔C的内部可為真空狀態。 1380413 0803006 28056twf.doc/n 此外,為處理壓力感測元件120所測得的壓力訊號, 本實施例還可在線路基板110上配置一特殊應用積體電路 (ASIC)晶片150’其與線路基板11〇電性連接並透過線 路基板Π0與壓力感測元件120電性連接,以接收壓力感 測元件120的訊號。於本實施例中,特殊應用積體電路晶 片150例如是藉由一黏著層a固定在線路基板11〇上,並 打線接合至線路基板110的第一線路層114。 另外’請參照圖2,於其他實施例中,特殊應用積體 電路晶片150也可以是固定於壓力感測元件丨2〇上並打線 接合至線路基板110,詳細而言,特殊應用積體電路晶片 150疋固疋在玻璃124上。於其他未繪示的實施例中,特 殊應用積體電路晶片150可以是覆晶接合於線路基板ι1〇 上。值得注意的是,在其他未繪示的實施例中,特殊應用 積體電路晶片150也可以是配置於其他構裝體上,再與壓 力感測元件120電性連接。 請再次參照圖1,封裝膠體130包覆壓力感測元件 120 ’但暴露出感測區域S,且封.裝膠體13〇還包覆特殊應 用積體電路晶片15〇。由於封裝膠體丨3〇若是覆蓋感測區 域s將會影響壓力感測元件12〇的壓力感測準確度,因此 本實施例在壓力感測元件120與線路基板110之間設置一 止洩牆D,其圍繞壓力感測元件120外圍,以避免封裝膠 體130在製程中溢流至感測區域S。止洩牆D例如是一環 氧樹脂封裝材料(epoxy encapsulant )。 為保護壓力感測薄膜122a免於受到外界衝擊或污染 11 1380413 0803006 28056twf.doc/n ^貝壞’本只_將軟性賴層14()配置 =’軟性保護層⑽受到線路基板UG的開口⑽ 所暴路’以使其可透侧σ OP而受到朗σ 〇ρ相連通 的外界環境的壓力,並可將此壓力傳遞至壓力感測_
= ί性保遵層14G還可配置於由線路基板110與 兀件m所構成的空隙中’以包覆並保護配置於 線路基板1 ίο與壓力感測元件⑽之間的導電凸塊b。於 本實施例中,軟性保護層14G的材質包括臂等軟性材 質’以達到兼具保護與傳遞壓力的功效。 、 一此外,為便於壓力感測元件封裝100可以其他的電子 π件電性連接,本實施例還可在線路基板110之第二線路 表面F上配置多個導電球16〇 (例如錫球)。詳細而言、,導 電球160是配置於第二線路層116上並與其電性連接。 、下則將詳細介紹本發明之一實施例的一種上述壓力 感測元件封裝100的製作方法。
圖3Α〜圖3F為本發明一實施例之壓力感測元件封骏 的製程剖面示意圖。 首先,請參照圖3Α,覆晶接合一壓力感測元件12〇 於一線路基板11〇上,其中線路基板11()具有一開口 ’ 而壓力感測元件120具有一感測區域s ’其朝向開口 〇ρ。 此外,本實施例所採用的壓力感測元件120包括—墨 力感測晶片122與一玻璃124。壓力感測晶片122可藉由 夕個導電凸塊B覆晶接合於線路基板110上,並具有一墨 12 1380413 0803006 28056twf.doc/n 力感測薄臈122a,其位於感洌區域s内並位於開口 〇p上 方。玻璃124黏著於壓力感測晶片122,並與壓力感測薄 膜122a幵/成③閉空腔c ’以使屋力感測元件12〇可測量 氣體壓力。 苟处理歷力感測元件120所測得的壓力訊號, =實施例將-特殊制積體電路“⑼配置於線路基板
著’請翔®3B ’本實關是藉由打線接合的 心,日姓址接線路基板11G與特殊應用積體電路晶片 録*片、丨應用積體電路晶片150可透過線路基板110 與壓力感測元件120電性連接。 帝路,不的實施例中,也可以是將特殊應用積體 电路4⑸覆晶接合於㈣ 應用積體電路晶片15〇 W疋將特殊 線路基板m。固疋於玻璃124上,並打線接合至 然後,諳參4Β3 _ _ 與線路基板丨Η)之間形成於壓力感測元件⑽
件120外®,用以防止 / ^ D ’其11繞壓力感測元 區域s而___ _形成賴«體溢流至感測 之德凡件12G的壓力感測精準度。 之後’凊參照圖3d 力感測元件UG,彳日^/;;成;'封鱗體13G來包覆® 線路板no上形成封s °具體而言’當於 止茂牆D’的阻擋而不會溢 了 =因受到 膠體130還包覆44硅處ra芏為判&域S中。此外,封骏 應用積體電路晶片, …後4照圖犯,於感測區域8上形成一軟性保 13 0803006 28056twf.doc/n 護層140,其受到線路基板110的開口 〇p所暴露。此外, 本實施例還可將軟性保護層14〇填入由線路基板ιι〇盘壓 力感測元件120所構成的空隙中,以包覆導電凸塊b: 之後,請參照圖3F,為便於壓力感測元件封裝1〇〇 可以與其他的電子科電性連接,本實施例還可在線路基 板110之第二線路表面F上形成多個導電球⑽ 部電性連接。 〃# 翻/ίίΓ4’本發明是讀晶接合的方式將壓力感測元 於線路基板上,而覆晶接合所需的承魅(即線路 J板)面積小則丁線接合所需的承載器(即導線架)面積。 *此,本糾之壓力錢元件縣的體積比胃 測元件封裝㈣積小,並有獅本發明 3 裝朝向小魏的方向發展。 力4心件封 ^本發明已以實施例揭露如上,然其並非用以限定 明何所屬領域中具有通f知識者,在不脫離本發 明之關内,當可作些許之更動與潤飾,因此本發 之保複乾圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 意圖圖1為本發明-實施例之壓域測元件封裝的剖面示 示意=為本發明另-實施例之壓力錢元件封裝的剖面 的製本發明—實侧之壓力㈣元件封裝 1380413 0803006 28056twf.doc/n 【主要元件符號說明】 100 :壓力感測元件封裝 110 :線路基板 112 :基層 112a :上表面 112b :下表面 114 :第一線路層 116 :第二線路層 118 :導電通道 120 :壓力感測元件 122 :壓力感測晶片 122a :壓力感測薄膜 124 :玻璃 130 :封裝膠體 140 :軟性保護層 150 :特殊應用積體電路晶片 160 :導電球 A :黏著層 B :導電凸塊 C:密閉空腔 D :止泡牆 F:第二線路表面 OP :開口 S:感測區域 V :凹槽 15
Claims (1)
1380413
叫年I月烟 Λ 突Ϊ7-
十、申請專利範圍: 1. 一種壓力感測元件封裝,包括: 一線路基板,具有一開口; 一壓力感測元件’覆晶接合於該線路基板上,並具有 一感測區域’其朝向該開口,其中該壓力感測元件包^: 一壓力感測晶片,具有一壓力感測薄膜,其位於 該感測區域内;以及 ' 、 一玻璃,黏著於該壓力感測晶片的一表面,其中 該表面遠離該壓力感測薄膜; 、 ,封裝膠體,包覆該壓力感測元件,但暴露出該感測 隱域;以及 --軟性保§蔓層’配置於該感測區域上’完全覆蓋兮成 測區威’並受到邊線路基板的該開口所暴露。 2. 如申請專利範圍第1項所述之壓力感測元件封 裝,其中該玻璃與該壓力感測薄膜形成一密閉空腔。 3. 如申請專利範圍第2項所述之壓力感測元件封 裝,更包括: 多個導電凸塊’其中該壓力感測晶片經由該些導電凸 塊覆晶接&至該線路基板。 4. 如申請專利範圍第丨項所述之壓力感測元件封 裝,更包括. ' ^土洩牆,配置於該壓力感測元件與該線路基板之 間,旅圍繞該壓力感測元件。 5·如申请專利範圍第1項所述之壓力感測元件封 16 101-1-30 裝’更包括: 特殊應用積體電路晶片,配置於該線路基板之上, 並與該線路基板電性連接。 1如申請專利範圍第5項所述之壓力感測元件封 、,八中該封裝膠體更包覆該特殊應用積體電路晶片。 ^如申請專利範圍第5項所述之壓力感測元件封
裝,,、中該特殊應用積體電路晶片固定於該線路基板上, 並打線接合至該線路基板。 8.如申請專利範圍第5項所述之壓力感測元件封 裝,其中该特殊應用積體電路晶片覆晶接合於該線路基板 9.如申請專利範圍第5項所述之壓力感測元件封 裝、’其中婦殊翻積體電路晶片固定於該壓力感測元件 上並打線接合至該線路基板。 1〇.如申請專利範圍第1項所述之壓力感測元件封 裝’更包括:
多個導電球,配置於該線路基板之一表面上。 壯I1.如申請專利範圍第1項所述之壓力感測元件封 裝,其中該軟性保護層的材質包括矽膠。 ϋ如申請專職圍第丨項所述之壓力感測元件封 裝=中錄性倾層魏置於由該祕基板與該壓力感 測兀件所構成的空隙中。 13. -種壓力感測元件封|的製作方法,包括: 覆晶接合-壓力感測元件於—線路基板上,其中該線 17 1380413 101-1-30 路基板具有一開口,而該壓力感測元件具有一感測區域’ 其朝向該開口,其中該壓力感測元件包括: 一壓力感測晶片,具有一壓力感測薄膜,其位於 該感測區域内;以及 一玻璃,黏著於該壓力感測晶片的一表面,其中 該表面遠離該壓力感測薄膜; 形成一封裝膠體來包覆該壓力感測元件,但不包覆該 感測區域;以及 於該感測區域上形成一軟性保護層,其中該軟性保護 層完全覆蓋該感測區域,且其受到該線路基板的該開口所 暴露。 14. 如申請專利範圍第13項所述之壓力感測元件封 裝的製作方法’其中該壓力感測晶片覆晶接合於該線路基 板上’且該壓力感測薄膜位於該開口上方,該玻璃與該壓 力感測薄膜形成一密閉空腔。 15. 如_請專利範圍第η項所述之壓力感測元件封 裝的製作方法,其中在覆晶接合該壓力感測元件的步驟 中,經由多個導電凸塊將該壓力感測晶片覆晶接合於該線 路基板上。 16. 如申請專利範圍第13項所述之壓力感測元件封 襄的製作方法,其中在形成該封裝膠體的步驟以前,更包 括: ▲於該壓力感測元件與該線路基板之間形成—止洩 牆,其圍繞該壓力感測元件,用以防止該封骏膠體覆蓋节 18 1380413 101-1-30 感測區域。 ㈣H如申料利翻第13項所狀勤感測元件封 ^. 方法,其中在形成該封裝膠體的步驟之前,更包 括· 特殊應用賴電路晶片配1於鱗路基板上,並 與5玄線路基板電性連接。 裝的i8作=請::範圍第17項所述之壓力感測元件封 i辦ΐΓί 在形成該封娜體的步驟中,該封裝 勝體更包覆該特殊應用積體電路晶片。 ㈣1如_料利麵第17項所述之壓力感測元件封 二二方法其中將該特殊應用積體電路晶片與該線路 二入认雜的步驟包括將該特殊應用積體電路晶片覆晶 接合於該線路基板上。 炎日日 ㈣如申請專利範圍第17項所述之麼力感測元件封 2,方去,其中將該特殊應用積體電路晶片與該線路 t連接的步驟包括將該特_用積體電路晶片固定 …f路基板上’並將其打線接合至該線路基板。 —制1从如争請專利範圍第17項所述之壓力感測元件封 症W·方去,其中將該特殊應用積體電路晶片與該線路 二㈣七,接的步驟包括將該特殊應用積體電路晶片固定 〜=«I ;収件上,並將其打線接合至該線路基板。 如申請專利範圍第13項所述之壓力感測元件封 裝的製作方法,更包括: 在°亥線路基板之一表面上形成多個導電球。 1380413
101-1-30 23.如申請專利範圍第13項所述之壓力感測元件封 裝的製作方法,其中在形成該軟性保護層的步驟中,更包 括將該軟性保護層填入由該線路基板與該壓力感測元件所 構成的空隙中。 20
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI582399B (zh) * | 2014-12-24 | 2017-05-11 | 藤倉股份有限公司 | 壓力感測器及壓力感測器模組 |
TWI627391B (zh) * | 2017-03-03 | 2018-06-21 | 智動全球股份有限公司 | 力量感測器 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8148808B2 (en) * | 2007-08-13 | 2012-04-03 | Lv Sensors, Inc. | Partitioning of electronic packages |
TWI421955B (zh) * | 2010-06-30 | 2014-01-01 | 矽品精密工業股份有限公司 | 具壓力感測器之微機電結構及其製法 |
TW201326773A (zh) | 2011-12-30 | 2013-07-01 | Ind Tech Res Inst | 壓力感測器的電性量測裝置及其方法 |
TWI486566B (zh) * | 2012-02-27 | 2015-06-01 | Fujikura Ltd | 壓力感測器模組 |
US8890308B2 (en) * | 2012-04-06 | 2014-11-18 | Freescale Semiconductor, Inc. | Integrated circuit package and method of forming the same |
US9082883B2 (en) * | 2013-03-04 | 2015-07-14 | Unisem (M) Berhad | Top port MEMS cavity package and method of manufacture thereof |
CN103539063A (zh) * | 2013-11-05 | 2014-01-29 | 华进半导体封装先导技术研发中心有限公司 | 环境mems传感器基板封装结构及制作方法 |
JP6266351B2 (ja) * | 2014-01-08 | 2018-01-24 | 新日本無線株式会社 | センサ装置およびその製造方法 |
US9930793B2 (en) * | 2014-03-27 | 2018-03-27 | Intel Corporation | Electric circuit on flexible substrate |
JP6445295B2 (ja) * | 2014-10-07 | 2018-12-26 | 新日本無線株式会社 | センサ装置およびその製造方法 |
TWI531783B (zh) * | 2014-10-28 | 2016-05-01 | Pressure sensor package structure | |
KR20160126212A (ko) * | 2015-04-23 | 2016-11-02 | 삼성전기주식회사 | 압력 센서 패키지 |
CN105067013A (zh) * | 2015-07-21 | 2015-11-18 | 歌尔声学股份有限公司 | 一种环境传感器 |
US10186468B2 (en) | 2016-03-31 | 2019-01-22 | Infineon Technologies Ag | System and method for a transducer in an eWLB package |
US10351419B2 (en) * | 2016-05-20 | 2019-07-16 | Invensense, Inc. | Integrated package containing MEMS acoustic sensor and pressure sensor |
IT201900022503A1 (it) * | 2019-11-29 | 2021-05-29 | St Microelectronics Srl | Sensore ambientale incapsulato |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08210935A (ja) | 1995-02-07 | 1996-08-20 | Tokai Rika Co Ltd | 圧力センサ |
US6401545B1 (en) | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
TW460994B (en) | 2000-11-16 | 2001-10-21 | Kingpak Tech Inc | Packaging structure of the image sensor chip and method for packaging thereof |
TW512505B (en) | 2001-11-06 | 2002-12-01 | Jian Huei Jiuan | Common type packaging method of microsensor |
US6653723B2 (en) * | 2002-03-09 | 2003-11-25 | Fujitsu Limited | System for providing an open-cavity low profile encapsulated semiconductor package |
TW569017B (en) | 2002-09-13 | 2004-01-01 | Chien Hui Chuan | Vertical probe card with feedback contact force sensor |
TWI242749B (en) | 2004-04-14 | 2005-11-01 | Advanced Semiconductor Eng | Pressing type fingerprint sensor package |
JP4808729B2 (ja) * | 2004-11-12 | 2011-11-02 | アナログ デバイシーズ インク | 離間した突き当て型コンポーネント構造体 |
US7401523B2 (en) * | 2005-02-25 | 2008-07-22 | Analog Devices, Inc. | Capacitive sensor and method of fabricating |
US20060191351A1 (en) * | 2005-02-25 | 2006-08-31 | Meehan Peter G | Sealed capacitive sensor |
TWI312581B (en) | 2006-07-17 | 2009-07-21 | Chipmos Technologies Inc | Chip-on-glass package of image sensor |
TWI341014B (en) * | 2007-05-30 | 2011-04-21 | Ind Tech Res Inst | A device structure with preformed ring and method therefor |
-
2008
- 2008-06-19 TW TW097122867A patent/TWI380413B/zh active
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI582399B (zh) * | 2014-12-24 | 2017-05-11 | 藤倉股份有限公司 | 壓力感測器及壓力感測器模組 |
US10720534B2 (en) | 2014-12-24 | 2020-07-21 | Fujikura Ltd. | Pressure sensor and pressure sensor module |
TWI627391B (zh) * | 2017-03-03 | 2018-06-21 | 智動全球股份有限公司 | 力量感測器 |
US10067014B1 (en) | 2017-03-03 | 2018-09-04 | GlobalMEMS Co., Ltd. | Force sensor |
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