TWI371594B - Testing device and testing method - Google Patents

Testing device and testing method

Info

Publication number
TWI371594B
TWI371594B TW094109065A TW94109065A TWI371594B TW I371594 B TWI371594 B TW I371594B TW 094109065 A TW094109065 A TW 094109065A TW 94109065 A TW94109065 A TW 94109065A TW I371594 B TWI371594 B TW I371594B
Authority
TW
Taiwan
Prior art keywords
testing
testing device
testing method
Prior art date
Application number
TW094109065A
Other languages
English (en)
Chinese (zh)
Other versions
TW200533943A (en
Inventor
Masuhiro Yamada
Kazuhiko Sato
Toshimi Ohsawa
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of TW200533943A publication Critical patent/TW200533943A/zh
Application granted granted Critical
Publication of TWI371594B publication Critical patent/TWI371594B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56004Pattern generation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5602Interface to device under test
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5606Error catch memory
TW094109065A 2004-03-24 2005-03-24 Testing device and testing method TWI371594B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004087924A JP4130811B2 (ja) 2004-03-24 2004-03-24 試験装置及び試験方法

Publications (2)

Publication Number Publication Date
TW200533943A TW200533943A (en) 2005-10-16
TWI371594B true TWI371594B (en) 2012-09-01

Family

ID=34993950

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094109065A TWI371594B (en) 2004-03-24 2005-03-24 Testing device and testing method

Country Status (7)

Country Link
US (1) US7441166B2 (enExample)
JP (1) JP4130811B2 (enExample)
KR (1) KR100838864B1 (enExample)
CN (1) CN100524538C (enExample)
DE (1) DE112005000640T5 (enExample)
TW (1) TWI371594B (enExample)
WO (1) WO2005091305A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4401319B2 (ja) * 2005-04-07 2010-01-20 株式会社日立製作所 Dram積層パッケージ並びにdram積層パッケージの試験および救済方法
JP2007322141A (ja) * 2006-05-30 2007-12-13 Yokogawa Electric Corp 半導体集積回路試験装置及び方法
JP5003941B2 (ja) * 2007-02-05 2012-08-22 横河電機株式会社 Ic試験装置およびic試験方法
JP5080501B2 (ja) * 2007-02-16 2012-11-21 株式会社アドバンテスト 試験装置および試験方法
US8368418B2 (en) * 2007-11-14 2013-02-05 Advantest Corporation Testing apparatus for multiple identical circuit components
TW200947450A (en) * 2008-05-09 2009-11-16 A Data Technology Co Ltd Storage system capable of data recovery and method thereof
JP5077265B2 (ja) * 2009-02-26 2012-11-21 横河電機株式会社 記憶装置及び半導体試験装置
US8706439B2 (en) * 2009-12-27 2014-04-22 Advantest Corporation Test apparatus and test method
JP2012174313A (ja) 2011-02-23 2012-09-10 Advantest Corp 試験装置
CN104090846A (zh) * 2013-04-01 2014-10-08 深圳芯力电子技术有限公司 一种电子信息产品数据存取方法及电子信息产品
US9251915B2 (en) * 2013-11-11 2016-02-02 Advantest Corporation Seamless fail analysis with memory efficient storage of fail lists
KR102825124B1 (ko) * 2022-12-29 2025-06-25 주식회사 와이씨 인터리브 방식을 이용한 메모리 스크램블 방법 및 장치
KR102835344B1 (ko) * 2022-12-29 2025-07-18 주식회사 와이씨 메모리 페일 카운트 방법 및 시스템

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100192064B1 (ko) * 1990-04-17 1999-06-15 가나이 쓰도무 저저항 배선구조를 갖는 반도체장치 및 그 제조방법
US5070297A (en) * 1990-06-04 1991-12-03 Texas Instruments Incorporated Full wafer integrated circuit testing device
US5610925A (en) * 1995-03-27 1997-03-11 Advantest Corporation Failure analyzer for semiconductor tester
JPH0933615A (ja) * 1995-07-19 1997-02-07 Advantest Corp 半導体メモリ試験装置のメモリ不良解析装置
US5790559A (en) * 1996-03-29 1998-08-04 Advantest Corporation Semiconductor memory testing apparatus
US6499121B1 (en) * 1999-03-01 2002-12-24 Formfactor, Inc. Distributed interface for parallel testing of multiple devices using a single tester channel
WO2002033708A1 (en) * 2000-10-19 2002-04-25 Advantest Corporation Memory defect redress analysis treating method, and memory testing apparatus performing the method
JP4377238B2 (ja) * 2001-11-15 2009-12-02 株式会社アドバンテスト 半導体試験装置
JP4097069B2 (ja) 2002-08-28 2008-06-04 Tdk株式会社 プリント基板の製造方法
US7036053B2 (en) * 2002-12-19 2006-04-25 Intel Corporation Two dimensional data eye centering for source synchronous data transfers
JP4308637B2 (ja) * 2003-12-17 2009-08-05 株式会社日立製作所 半導体試験装置
US20070061669A1 (en) * 2005-08-30 2007-03-15 Major Karl L Method, device and system for detecting error correction defects

Also Published As

Publication number Publication date
JP2005276317A (ja) 2005-10-06
US20070067685A1 (en) 2007-03-22
KR100838864B1 (ko) 2008-06-16
DE112005000640T5 (de) 2008-07-03
US7441166B2 (en) 2008-10-21
CN1934654A (zh) 2007-03-21
JP4130811B2 (ja) 2008-08-06
WO2005091305A1 (ja) 2005-09-29
TW200533943A (en) 2005-10-16
KR20060135036A (ko) 2006-12-28
CN100524538C (zh) 2009-08-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees