TWI365235B - Method for manufacturing epitaxial wafer - Google Patents

Method for manufacturing epitaxial wafer

Info

Publication number
TWI365235B
TWI365235B TW096140611A TW96140611A TWI365235B TW I365235 B TWI365235 B TW I365235B TW 096140611 A TW096140611 A TW 096140611A TW 96140611 A TW96140611 A TW 96140611A TW I365235 B TWI365235 B TW I365235B
Authority
TW
Taiwan
Prior art keywords
epitaxial wafer
manufacturing epitaxial
manufacturing
wafer
epitaxial
Prior art date
Application number
TW096140611A
Other languages
English (en)
Other versions
TW200829732A (en
Inventor
Yasuo Koike
Toshiaki Ono
Naoki Ikeda
Tomokazu Katano
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Publication of TW200829732A publication Critical patent/TW200829732A/zh
Application granted granted Critical
Publication of TWI365235B publication Critical patent/TWI365235B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • C30B15/206Controlling or regulating the thermal history of growing the ingot
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/20Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02Heat treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/26Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
TW096140611A 2006-11-06 2007-10-29 Method for manufacturing epitaxial wafer TWI365235B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006300644A JP4853237B2 (ja) 2006-11-06 2006-11-06 エピタキシャルウェーハの製造方法

Publications (2)

Publication Number Publication Date
TW200829732A TW200829732A (en) 2008-07-16
TWI365235B true TWI365235B (en) 2012-06-01

Family

ID=38969955

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096140611A TWI365235B (en) 2006-11-06 2007-10-29 Method for manufacturing epitaxial wafer

Country Status (5)

Country Link
US (1) US8920560B2 (zh)
EP (1) EP1926134B1 (zh)
JP (1) JP4853237B2 (zh)
KR (1) KR100933552B1 (zh)
TW (1) TWI365235B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4805681B2 (ja) * 2006-01-12 2011-11-02 ジルトロニック アクチエンゲゼルシャフト エピタキシャルウェーハおよびエピタキシャルウェーハの製造方法
JP5136518B2 (ja) * 2008-06-16 2013-02-06 株式会社Sumco シリコン単結晶の育成方法
JP5555995B2 (ja) * 2008-09-12 2014-07-23 株式会社Sumco 貼り合わせシリコンウェーハの製造方法
JP2011054821A (ja) * 2009-09-03 2011-03-17 Sumco Corp エピタキシャルウェーハの製造方法及びエピタキシャルウェーハ
JP2011082443A (ja) * 2009-10-09 2011-04-21 Sumco Corp エピタキシャルウェーハおよびその製造方法
JP5194146B2 (ja) * 2010-12-28 2013-05-08 ジルトロニック アクチエンゲゼルシャフト シリコン単結晶の製造方法、シリコン単結晶、およびウエハ
US11180866B2 (en) * 2013-04-10 2021-11-23 Kla Corporation Passivation of nonlinear optical crystals
KR101729515B1 (ko) * 2015-04-14 2017-04-24 주식회사 엘지실트론 실리콘 단결정 잉곳의 성장 방법
JP6447351B2 (ja) 2015-05-08 2019-01-09 株式会社Sumco シリコンエピタキシャルウェーハの製造方法およびシリコンエピタキシャルウェーハ
JP6610056B2 (ja) 2015-07-28 2019-11-27 株式会社Sumco エピタキシャルシリコンウェーハの製造方法
JP6631460B2 (ja) * 2016-10-03 2020-01-15 株式会社Sumco シリコン単結晶の製造方法およびシリコン単結晶
DE102017213587A1 (de) * 2017-08-04 2019-02-07 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zur Herstellung der Halbleiterscheibe
CN113862791A (zh) * 2021-09-28 2021-12-31 西安奕斯伟材料科技有限公司 一种用于拉制单晶硅棒的拉晶炉
CN113862777B (zh) * 2021-09-30 2023-05-16 西安奕斯伟材料科技股份有限公司 一种用于制造单晶硅棒的拉晶炉、方法及单晶硅棒
JP2023093096A (ja) * 2021-12-22 2023-07-04 グローバルウェーハズ・ジャパン株式会社 シリコンエピタキシャル基板の製造方法およびシリコンエピタキシャル基板

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3006669B2 (ja) * 1995-06-20 2000-02-07 信越半導体株式会社 結晶欠陥の均一なシリコン単結晶の製造方法およびその製造装置
KR100319413B1 (ko) 1996-12-03 2002-01-05 고지마 마타오 반도체 실리콘 에피택셜 웨이퍼 및 반도체 디바이스의 제조 방법
JPH10223641A (ja) * 1996-12-03 1998-08-21 Sumitomo Sitix Corp 半導体シリコンエピタキシャルウェーハ及び半導体デバイスの製造方法
JP2000016897A (ja) * 1998-07-03 2000-01-18 Sumitomo Metal Ind Ltd 高品質シリコン単結晶の製造方法
JP4233651B2 (ja) * 1998-10-29 2009-03-04 信越半導体株式会社 シリコン単結晶ウエーハ
JP3601324B2 (ja) * 1998-11-19 2004-12-15 信越半導体株式会社 結晶欠陥の少ないシリコン単結晶ウエーハ及びその製造方法
TW528816B (en) 1999-04-23 2003-04-21 Mitsubishi Material Silicon Method for heat treating silicon wafer
JP4003351B2 (ja) 1999-07-28 2007-11-07 株式会社Sumco Ig処理法
JP3855531B2 (ja) 1999-04-23 2006-12-13 株式会社Sumco ポリシリコン層付きシリコンウェーハ及びその製造方法
JP4107628B2 (ja) 1999-11-26 2008-06-25 株式会社Sumco シリコンウェーハにig効果を付与するための前熱処理方法
US20020142170A1 (en) * 1999-07-28 2002-10-03 Sumitomo Metal Industries, Ltd. Silicon single crystal, silicon wafer, and epitaxial wafer
JP2001217251A (ja) 1999-11-26 2001-08-10 Mitsubishi Materials Silicon Corp シリコンウェーハの熱処理方法
JP2001253795A (ja) * 2000-03-09 2001-09-18 Sumitomo Metal Ind Ltd シリコンエピタキシャルウェーハとその製造方法
KR100368331B1 (ko) 2000-10-04 2003-01-24 주식회사 실트론 반도체 웨이퍼의 열처리 방법 및 이를 통해 제조된 반도체 웨이퍼
US6835245B2 (en) * 2000-06-22 2004-12-28 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing epitaxial wafer and method of producing single crystal as material therefor
DE10047346B4 (de) * 2000-09-25 2007-07-12 Mitsubishi Materials Silicon Corp. Verfahren zur Herstellung eines Siliciumwafers zur Abscheidung einer Epitaxieschicht und Epitaxiewafer
JP3624827B2 (ja) * 2000-12-20 2005-03-02 三菱住友シリコン株式会社 シリコン単結晶の製造方法
EP2295619B1 (en) * 2001-01-26 2014-04-23 MEMC Electronic Materials, Inc. Process for producing Low Defect Density Silicon Having a Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults
US6709957B2 (en) * 2001-06-19 2004-03-23 Sumitomo Mitsubishi Silicon Corporation Method of producing epitaxial wafers
JP2004091211A (ja) * 2002-07-12 2004-03-25 Oki Data Corp 媒体トレイ及びこれを用いた画像記録装置
JP4570317B2 (ja) * 2002-08-29 2010-10-27 株式会社Sumco シリコン単結晶とエピタキシャルウェーハ並びにそれらの製造方法
KR20060040733A (ko) * 2003-08-12 2006-05-10 신에쯔 한도타이 가부시키가이샤 웨이퍼의 제조방법

Also Published As

Publication number Publication date
KR20080041128A (ko) 2008-05-09
US20080286565A1 (en) 2008-11-20
KR100933552B1 (ko) 2009-12-23
TW200829732A (en) 2008-07-16
EP1926134A1 (en) 2008-05-28
JP4853237B2 (ja) 2012-01-11
EP1926134B1 (en) 2016-03-30
JP2008115050A (ja) 2008-05-22
US8920560B2 (en) 2014-12-30

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