TWI360833B - Semiconductor on insulator substrate and devices f - Google Patents

Semiconductor on insulator substrate and devices f Download PDF

Info

Publication number
TWI360833B
TWI360833B TW094110692A TW94110692A TWI360833B TW I360833 B TWI360833 B TW I360833B TW 094110692 A TW094110692 A TW 094110692A TW 94110692 A TW94110692 A TW 94110692A TW I360833 B TWI360833 B TW I360833B
Authority
TW
Taiwan
Prior art keywords
layer
semiconductor material
semiconductor
dielectric
lattice
Prior art date
Application number
TW094110692A
Other languages
English (en)
Chinese (zh)
Other versions
TW200539278A (en
Inventor
Qi Xiang
Original Assignee
Globalfoundries Us Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Globalfoundries Us Inc filed Critical Globalfoundries Us Inc
Publication of TW200539278A publication Critical patent/TW200539278A/zh
Application granted granted Critical
Publication of TWI360833B publication Critical patent/TWI360833B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6758—Thin-film transistors [TFT] characterised by the insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
  • Inorganic Insulating Materials (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
TW094110692A 2004-04-07 2005-04-04 Semiconductor on insulator substrate and devices f TWI360833B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/819,441 US7005302B2 (en) 2004-04-07 2004-04-07 Semiconductor on insulator substrate and devices formed therefrom

Publications (2)

Publication Number Publication Date
TW200539278A TW200539278A (en) 2005-12-01
TWI360833B true TWI360833B (en) 2012-03-21

Family

ID=34964796

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094110692A TWI360833B (en) 2004-04-07 2005-04-04 Semiconductor on insulator substrate and devices f

Country Status (8)

Country Link
US (2) US7005302B2 (enExample)
JP (1) JP2007533137A (enExample)
KR (1) KR101093785B1 (enExample)
CN (1) CN1998088B (enExample)
DE (1) DE112005000775B4 (enExample)
GB (1) GB2429114B (enExample)
TW (1) TWI360833B (enExample)
WO (1) WO2005101521A1 (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365357B2 (en) * 2005-07-22 2008-04-29 Translucent Inc. Strain inducing multi-layer cap
US7202513B1 (en) * 2005-09-29 2007-04-10 International Business Machines Corporation Stress engineering using dual pad nitride with selective SOI device architecture
US7495290B2 (en) * 2005-12-14 2009-02-24 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof
KR100649874B1 (ko) * 2005-12-29 2006-11-27 동부일렉트로닉스 주식회사 에스오아이 웨이퍼를 이용한 트랜지스터 제조 방법
DE102006035669B4 (de) * 2006-07-31 2014-07-10 Globalfoundries Inc. Transistor mit einem verformten Kanalgebiet, das eine leistungssteigernde Materialzusammensetzung aufweist und Verfahren zur Herstellung
KR100850899B1 (ko) * 2007-02-09 2008-08-07 엘지전자 주식회사 박막 트랜지스터 및 그 제조방법
US7781288B2 (en) * 2007-02-21 2010-08-24 International Business Machines Corporation Semiconductor structure including gate electrode having laterally variable work function
KR100994995B1 (ko) * 2007-08-07 2010-11-18 삼성전자주식회사 ＤｙＳｃ０３ 막을 포함하는 반도체 박막의 적층 구조 및 그 형성방법
US7692224B2 (en) * 2007-09-28 2010-04-06 Freescale Semiconductor, Inc. MOSFET structure and method of manufacture
JP5190275B2 (ja) * 2008-01-09 2013-04-24 パナソニック株式会社 半導体メモリセル及びそれを用いた半導体メモリアレイ
KR101535222B1 (ko) * 2008-04-17 2015-07-08 삼성전자주식회사 반도체 소자 및 그의 제조 방법
US8835955B2 (en) * 2010-11-01 2014-09-16 Translucent, Inc. IIIOxNy on single crystal SOI substrate and III n growth platform
CN102751231A (zh) * 2012-03-13 2012-10-24 清华大学 一种半导体结构及其形成方法
JP5561311B2 (ja) * 2012-05-14 2014-07-30 ソニー株式会社 半導体装置
CN102683345B (zh) * 2012-05-22 2015-04-15 清华大学 半导体结构及其形成方法
CN102683388B (zh) * 2012-05-30 2016-06-29 清华大学 半导体结构及其形成方法
CN102903739B (zh) * 2012-10-19 2016-01-20 清华大学 具有稀土氧化物的半导体结构
CN102916039B (zh) * 2012-10-19 2016-01-20 清华大学 具有氧化铍的半导体结构
US9570588B2 (en) * 2014-12-29 2017-02-14 Globalfoundries Inc. Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel material
CN108060457A (zh) * 2017-12-21 2018-05-22 苏州晶享嘉世光电科技有限公司 一种钪酸钆钇晶体及熔体法晶体生长方法
CN110284192A (zh) * 2019-06-17 2019-09-27 南京同溧晶体材料研究院有限公司 一种掺铒钪酸钆3μm中红外波段激光晶体及其制备方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3372158B2 (ja) * 1996-02-09 2003-01-27 株式会社東芝 半導体装置及びその製造方法
US5830270A (en) * 1996-08-05 1998-11-03 Lockheed Martin Energy Systems, Inc. CaTiO3 Interfacial template structure on semiconductor-based material and the growth of electroceramic thin-films in the perovskite class
JP2001110801A (ja) * 1999-10-05 2001-04-20 Takeshi Yao パターン形成方法、並びに電子素子、光学素子及び回路基板
US6603156B2 (en) 2001-03-31 2003-08-05 International Business Machines Corporation Strained silicon on insulator structures
US20020195599A1 (en) 2001-06-20 2002-12-26 Motorola, Inc. Low-defect semiconductor structure, device including the structure and method for fabricating structure and device
US6933566B2 (en) 2001-07-05 2005-08-23 International Business Machines Corporation Method of forming lattice-matched structure on silicon and structure formed thereby
US20030020070A1 (en) * 2001-07-25 2003-01-30 Motorola, Inc. Semiconductor structure for isolating high frequency circuitry and method for fabricating
US6589856B2 (en) 2001-08-06 2003-07-08 Motorola, Inc. Method and apparatus for controlling anti-phase domains in semiconductor structures and devices
JP4090716B2 (ja) 2001-09-10 2008-05-28 雅司 川崎 薄膜トランジスタおよびマトリクス表示装置
JP4034627B2 (ja) * 2001-09-28 2008-01-16 テキサス インスツルメンツ インコーポレイテツド 集積回路及びその製造方法
JP2003303971A (ja) * 2002-04-09 2003-10-24 Matsushita Electric Ind Co Ltd 半導体基板及び半導体装置
US6717216B1 (en) * 2002-12-12 2004-04-06 International Business Machines Corporation SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device
US6730576B1 (en) 2002-12-31 2004-05-04 Advanced Micro Devices, Inc. Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer
US6803631B2 (en) 2003-01-23 2004-10-12 Advanced Micro Devices, Inc. Strained channel finfet

Also Published As

Publication number Publication date
CN1998088A (zh) 2007-07-11
US20060138542A1 (en) 2006-06-29
GB2429114B (en) 2009-04-01
CN1998088B (zh) 2010-08-25
JP2007533137A (ja) 2007-11-15
US20050224879A1 (en) 2005-10-13
WO2005101521A1 (en) 2005-10-27
TW200539278A (en) 2005-12-01
KR20070012458A (ko) 2007-01-25
GB2429114A (en) 2007-02-14
US7005302B2 (en) 2006-02-28
KR101093785B1 (ko) 2011-12-19
DE112005000775B4 (de) 2012-10-31
DE112005000775T5 (de) 2007-05-31
US7221025B2 (en) 2007-05-22
GB0619840D0 (en) 2006-11-29

Similar Documents

Publication Publication Date Title
TWI360833B (en) Semiconductor on insulator substrate and devices f
TWI269441B (en) Multiple gate MOSFET structure with strained Si Fin body
TWI253716B (en) Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
TWI275137B (en) Semiconductor device fabrication method
US6492216B1 (en) Method of forming a transistor with a strained channel
TWI249852B (en) Double-gate transistor with enhanced carrier mobility
Preinesberger et al. Formation of dysprosium silicide wires on Si (001)
CN100429788C (zh) 用于提高mos性能的引入栅极的应变
US7902058B2 (en) Inducing strain in the channels of metal gate transistors
US7355253B2 (en) Strained-channel Fin field effect transistor (FET) with a uniform channel thickness and separate gates
TWI338350B (en) Methods of forming a semiconductor structure
TW200845388A (en) Structure and method for mobility enhanced MOSFETs with unalloyed silicide
US20150041858A1 (en) 3d transistor channel mobility enhancement
TWI254355B (en) Strained transistor with hybrid-strain inducing layer
US20100187503A1 (en) Semiconductor device and manufacturing method thereof
TW201114039A (en) FinFETs and methods for forming the same
US10755937B2 (en) Vertical transistor having a silicided bottom and method for fabricating thereof
TW201222645A (en) Superior integrity of a high-K gate stack by forming a controlled undercut on the basis of a wet chemistry
TWI523112B (zh) 雙軸應變場效電晶體元件
DE102020107566A1 (de) Interconnect- und Metallisierungsstrukturen für Logik- und Speichervorrichtungen und Fertigungsverfahren
US7791112B2 (en) Channel stress engineering using localized ion implantation induced gate electrode volumetric change
DE102020113099A1 (de) Ferroelektrische direktzugriffsspeichervorrichtung mit einem dreidimensionalen ferroelektrischen kondensator
US10304831B2 (en) Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins
US9831254B1 (en) Multiple breakdown point low resistance anti-fuse structure
TWI287295B (en) Method of forming a raised source/drain and a semiconductor device employing the same

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees