TWI358806B - Semiconductor image device package with die receiv - Google Patents

Semiconductor image device package with die receiv Download PDF

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Publication number
TWI358806B
TWI358806B TW096150805A TW96150805A TWI358806B TW I358806 B TWI358806 B TW I358806B TW 096150805 A TW096150805 A TW 096150805A TW 96150805 A TW96150805 A TW 96150805A TW I358806 B TWI358806 B TW I358806B
Authority
TW
Taiwan
Prior art keywords
layer
substrate
semiconductor device
die
device package
Prior art date
Application number
TW096150805A
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English (en)
Other versions
TW200834840A (en
Inventor
Wen Kun Yang
Jui Hsien Chang
Tung Chuan Wang
Original Assignee
Advanced Chip Eng Tech Inc
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Publication date
Application filed by Advanced Chip Eng Tech Inc filed Critical Advanced Chip Eng Tech Inc
Publication of TW200834840A publication Critical patent/TW200834840A/zh
Application granted granted Critical
Publication of TWI358806B publication Critical patent/TWI358806B/zh

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    • H01L27/144—Devices controlled by radiation
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    • H01L2924/1517—Multilayer substrate

Description

1358806 九、發明說明： 【發明所屬之技術領域】 、 本發明係有關於晶圓級封裝(WLp)之結構，特定而古 係有關於具有形成於基板内之晶粒接收通孔及互連通孔： 擴散型晶圓級封裝，以改善可靠度及減少幻牛尺寸。 【先前技術】 於半導體7L件之領域中，元件之密度持續增加且元料 之尺寸持續縮小。為配合上述情況，如此高密度元件中索 二或互連技術之需求亦曰益增加。傳統上，覆晶㈣ (f—ρ)附著方法中焊錫凸塊陣列係形成於晶粒之表 面。焊錫凸塊之形成可利用焊錫複合材料透過防焊層 (广_k)而予以施行，以用於產生期望之焊錫凸塊开; L。阳片封震之功能包含功率分配、信號分配、散執、 二。當半導體變為更加複雜，傳統封裝技術例如 導線木封裝、軟性封裝、剛性封料術已無法滿^欲產生 具杈向密度元件之較小晶片之需求。 =，因傳統封裝技術必須將晶圓上之晶粒分割成各 曰曰粒·0*接著各別封裝該晶粒，故此類技術對於製造程 ::::為：：。因晶片封裝技術係大為受到積體電“ 1虽電子裝置之尺寸變為高要求時，封裳技術 ’、’、。由於上述之理由，封裝技術之趨勢係朝向現今 =錫球陣列（BGA)、t晶封裝（覆晶錫球陣列（FC_BGA))、 晶片尺寸封裝（csp)、日曰日圓級封裝（WLP)。「晶圓級封 (WLP)係被瞭解為晶圓上整體封裝、所有互連及其他程序 5 1358806 結合極佳之電子特性 晶圓級封襞（WLP)技術係為高級封裝技術，藉其 上早W制；去» «丨丨. Q从从^ 步驟係於單—化成晶粒之前施行…般而言，於完成 2程序或封裝程序之後，獨立之半導體封㈣與具數個 +導體晶粒之晶圓分開。該晶圓級封裝具有極小之尺寸並 粒 α '人…符丹日日独 係於曰曰圓上予以製造及測試，且接著藉切割而單一化以用 於在表面黏著生產線中組裝。因晶圓級封裝技術利用整個 ^作為目標’而非利用單—晶片或晶粒，因此於進行刻 里1J私序之别’封裝及測試皆已完成。此外，晶圓級封裝（机 係如此之高級技術’因此線接合、晶粒黏著及底部填充之 ^可予以忽略。藉制晶圓級封裝技術，可減少成本及 製造時間且晶圓級封裝之結果結構可相當於晶粒，故 術可滿足電子裝置之微型化需求。 雖晶圓級封裝技術具有上述優點，然而仍存在一些馬 響晶圓級封裝技術之接受度之問題。例如，晶圓級封裝Ζ 構與主機板（PCB)之材料間之熱膨脹係數（CTE)差異（不^ 配）變為另一造成結構之機械不穩定之關鍵因素。美國第 6’271’469號專利所揭露之封裝結構係受困於熱膨腸係數 ')不匹配之問題。其乃因先前技術利用以塑模材料封 裝之石夕晶粒。如此領域之技藝者所熟知，石夕材料之熱膨脹 係數為2.3，但塑模材料之熱膨脹係數約為4()至⑽。由於 ，模材料及介電層材料之固化溫度（euHng卿咖叫較 π ’此配置會造成程序期間晶片位置被偏移，因此互連焊 墊將會偏移’而產生產量及效能問題。於溫度循環期間欲 6 jj〇〇u〇 2復至原本位置係相當困難（乃因固化溫度接近或超過玻 T化轉變溫度(Tg)時環氧樹脂之特性）。意指先前之結構封 、不月b以較大尺寸加工，且會造成較高製造成本。 再者，關於利用直接形成於基板上表面之晶粒之技 :二：此領域之技藝者所熟知’半導體晶粒上之焊墊係透 到重分佈層（RDL)之重分佈程序予以重分佈進入數 °°域陣咖之金屬墊。積層將會增加封裝尺寸。因此， #于裝之厚度會增加。此可能與減少晶片尺寸之需求相牴觸。 。此外，先前技術受困於用以形成「.面板型」封裝之複 序其茜要塑模工具以用於封裝及注入塑模材料。由 •於材料熱固化後形成之變形，故無法控制晶粒與材料之表 ^同平面上，因此可能需要利用化學機械研磨（CMp) -程序以创光不平坦之表面，而成本遂增加。 々、甘因此，本發明提供具有良好熱膨脹係數（CTE)表現及 兄'^尺寸之擴散型晶圓級封裝（FG_WLP)結構以克服上 • f問題，且亦提供較佳之電路板級溫 【發明内容】 #没 本U之目的為提供具絕佳熱膨脹係數表現及銳減 尺寸之擴散型晶圓級封裝。 I月之另目的為提供具有内含晶粒接收通孔之基 板之擴散型晶圓級料，以改善可#度及減小元件尺寸。 本發月揭路-封裝結構，包含基板，其具有晶粒接收 連接通孔結構及第—接觸墊；晶粒，其具有微透鏡 配置於晶粒接收通孔内；透明蓋，其覆蓋微透鏡區 1358806 .. » 域；周圍材料，其形成於晶粒下方且填充於晶粒與晶粒接 收通孔側壁間之間隔内；介電層，其形成於晶粒及基板上； 重/刀佈層（RDL)，其形成於介電層上且耦合至第一接觸 墊；保護層，其形成於重分佈層上；以及第二接觸墊其 形成於基板之下表面且於連接通孔結構之下方。 基板之材料包含耐尚溫玻璃纖維板（Frs)、玻璃纖維板 (FR4)、雙馬來醯亞胺三氮雜苯樹脂（BT)、矽、印刷電路板 # (PCB)材料、玻璃或陶莞。另則’基板之材料包含合金或 金屬。基板之熱膨脹係數（CTE)最好接近主機板（pcB)之熱 膨脹係數，約為16至20。介電層之材料包含彈性介電^ .料、感光材料、含石夕型介電材料、石夕氧烧聚合物（sinr)、 聚亞醯胺（PI)或石夕樹脂。 【實施方式】 本發明將以較佳實施例及所附圖式加以詳細敘述。然 而此7員域之技藝者將得以領會，本發明之較佳實施例係 •為說明而敘述，而非用以限制本發明之申請專利範圍。除 此處明確敘述之較佳實施例之外，本發明可廣泛實行於其 他實施例，且本發明之範圍除後附申請專利範圍所明定之 外係不特別受限。 本發明揭露擴散型晶圓級封裝結構，其利用具有形成 其上之預定終端接觸金屬塾3及形成其内之預形成通孔4 之基板2。晶粒係配置於基板之晶粒接收通孔内且附著於 ，心點膠材料。例如，彈性核心黏膠材料係充填入晶粒邊 緣與基板之晶粒接收通孔側壁間之間隔内或於晶粒下方。 8 1358806 . 感光材料係塗佈於晶粒及預形成基板上（包含核心黏膠區 域）。感光材料最好以彈性材料形成。 第一圖係根據本發明之-實施例說明擴散型晶圓級封 裝(FO-WLP)之橫切面示意圖。如第一圖所示，擴散型晶圓 級封裝（FO-WLP)結構包含基板2，其具有第一終端接觸導 電墊3(用於有機基板)及形成其内之晶粒接收通孔4以接 收晶粒6。晶粒接收通孔4係從基板之上表面形成穿透基 板至其下表面。通孔4係預先形成於基板2内。核心黏膠 材料2!係印刷或塗佈於晶粒6之下表面下方，藉此密封晶 粒6。核心、黏膠材料21亦充填人晶粒邊緣6與通孔4側壁 間之間隔（空隙）内。導電（金屬）層24係塗佈於晶粒接收通 孔4之側壁上。 - 日日日粒6係配置於基板2内之晶粒接收通孔4内。如此 領域之技藝者所熟知，接觸塾（接合塾）1〇係形成於晶粒6 上。感光層或介電層12係形成於晶粒6及基板2之上表面 φ上。數個開孔係透過光微影飯刻程序或曝光及顯影程序形 成於介電層12内。數個開孔係各別對準於接觸塾（或輸出 入焊墊）10及基板上表面上之第一終端接觸導電墊3。重分 佈層(RDL)14’亦稱為導線14，係藉由移除形成於介電層 12上之選定部分金屬層而予以形成於介電層丨2上，其中 重分佈層（RDL)14係透過輸出人焊塾1()及[終端接觸 導電墊3與晶粒6保持電性連接。基板2還包含形成於基 板2内之連接通孔22。第—終端接觸金屬墊3係形成於連 接通孔22上。導電材料係充填人連接通孔22以用於電性 9 1358806 連接第一、.，；鳊接觸導電墊 於連接通孔22下》" 基板2之下表面且 卜方，稭此透過連接通孔22連 第一終端接觸導電塾3。切割線28係定義於封=基板之 以用於分離每一單开.、封裝早兀之間 达A 兀切割線28上可選擇性沒有介雷厗 保護層26係用以覆蓋重分佈層14。 丨電層。 此項域之技藝者應注意，晶粒6包含形成於 透鏡區域60。請參昭第一 /、上之微
於其上之_層62 圖微透鏡區域⑼具有形成 由於”電層12具有彈性特性，故介電層12及核 膠材料21彳作用為緩衝區域，其吸收溫度循環期間晶粒6 與基板2間之熱機械應力。上述結構係構成平面閘 (LGA)型封裝。 力 一替代性實施例可參閱第二圖，導電球20係形成於第 二終端接觸導電墊18上。此類型稱為錫球陣列（Bga)型。 其他部分類似於第一圖，故省略詳細敘述。終端墊丨8可作 用為此實施例中錫球陣列（BGA)結構下之球底層金屬 (UBM)。數個接觸導電墊3係形成於基板2之上表面且於 重分佈層14下方。 基板2之材料最好為有機基板，例如具已定義通孔之 環氧型耐高溫玻璃纖維板（FR5)、雙馬來醯亞胺三氮雜笨樹 脂（BT)、印刷電路板（PCB)或具預蝕刻電路之銅金屬。其熱 膨脹係數最好與主機板（PCB)之熱膨脹係數相同。具高玻 璃化轉變溫度（Tg)之有機基板最好為環氧型耐高溫玻璃纖^ 維板（FR5)或雙馬來醯亞胺三氮雜苯樹脂（BT)型基板。亦可 1358806 利用銅金屬（熱膨脹係數約為16)。玻璃、陶瓷或矽亦可用 作為基板。彈性核心黏膠材料係由矽膠彈性材料所形成。 因環氧型有機基板（耐高溫玻璃纖維板（FR5)z雙馬來 醯亞胺三氮雜苯樹脂（BT))之熱膨脹係數（χ/γ方向）約為 16，而利用玻璃材料作為晶片f分佈之工具其熱膨服係數 約為5至8,故耐高溫玻璃纖維板（FR5)/雙馬來醯亞胺三氮 雜笨樹脂（BT)於溫度循環（該溫度接近玻璃化轉變溫度 _ (Tg))後無法回復至原本位置，而於需要數個高溫程序例如 介電層及核心黏膠固化等程序之晶圓級封裝（WLp)程序期 間造成板型中晶粒之偏移。
基板可為圓形例如晶圓型，其半徑可為2〇〇毫米、3〇〇 耄米或以上。基板亦可為矩形例如面板型。基板2係預先 形成晶粒接收通孔4。切割線28係定義於封装單元之間以 用於分離每一單元。請參照第三圖，其顯示基板2包含數 個預形成之晶粒接收通子L 4及連接通孔22。導電材料係充 填入連接通孔22，藉此構成連接通孔結構。 本發明之-實施例中，介電層12最好為彈性介電材 料，其係以含石夕介電型材料組成，包含石夕氧燒聚合物 (SINR )、道康寧（D〇w c〇rning)WL5〇〇〇系列及其結合。 另一實施例中’介電層係由包含聚亞醯胺（ρι )或石夕樹脂 之材料所組成。其最好為感光層以簡化製程。 本發明之一實施例中，彈性介電層為一種具有大於 100 (ppm/c)之熱膨脹係數、約4〇%之伸長率（最好川％至 5〇%)及介於塑膠及橡膠之間之硬度之材料。彈性介電層12 1358806 之厚度係取決於在溫度循環測試㈣⑽於重分佈層/介 電層介面内之應力。 第四圖係說明工具40例如玻璃載板及基板2。黏膠材 =42例如紫外光（uv)固化型材料係形成於工具4〇之周圍 區域上:-實％例卜工具4〇可由面板形玻璃構成。如第 四圖所示，連接通孔結構將不會形成於基板之邊緣 四圖之下部部分係說明該工具與基板之結合。面板型封裝 將與玻璃載板黏結，而該玻璃載板將會於㈣期間黏附^ 支撑面板型封裝。 第五圖係說明具有晶粒接收通孔4之基板之頂視圖。 基板之邊緣區域50沒有晶粒接收通孔，其係用以於晶 封裝（WLP)程序期間黏附至玻璃载板。於晶i級封裝（WLp 程序完成之後’基板2將沿著虛線從玻璃載板上切割開， 意指虛線以内之内部區域將經過切割程序之處理 裝分離。 於封 請參照第六圖，上述元件封裝可整合入互補型 化物半導體影像感測器（CIS)模組，其於具導線Μ之= 電路板（PCB)72上方具有透鏡支架7〇。連接器％係 於印刷電路板72 H印刷電路板72最好包含可= 印刷電路板(FPC)。元件封t 1〇〇係利用表面 ： (SMT)程序透過經焊錫接合（糊狀或球狀）於可撓 : 路板（FPC)上及透鏡支架7G内之接觸金心75@ 刷電路板72上。透鏡78係形成於支架7〇 、 心』貝％»，且纟工外 線慮鏡（IR filter)82係設置於透鏡支架7 一 円且於元件1〇〇 12 1358806 • .
» I 與透鏡78之間。至少一被動元件8〇可形成於可挽性印刷 電路板（FPC)上且於透鏡支架7〇之内或之外。 矽晶粒（熱膨脹係數（CTE)約為23)係封裝於元件封裝 内。耐高溫玻璃纖維板（FR5)或雙馬來醯亞胺三氮雜苯樹脂 (BT)等有機環氧型材料（熱膨脹係數（CTE)約為μ)係用^ 為基板，且其熱膨脹係數係與印刷電路板（pcB)或主機板 (Mother Board)相同。晶粒與基板間之間隔（空隙）係以填充 材料（最好為彈性核心黏膠）充填，以吸收熱膨服係數不匹 配(/¾粒與環氧型耐高溫玻璃纖維板（FR5)/雙馬來醯亞胺 三氮雜苯樹脂（BT)之間）所造成之熱機械應力。再者，介電 層12包含彈性材料以吸收晶粒墊與印刷電路板（pcB)間之 •應力。重分佈層（RDL)之金屬為銅或金材料且其熱膨脹係 數約為16，與印刷電路板（PCB)及有機基板相同，而接觸 凸塊之凸塊底層金屬（UBM)係設置於基板之終端接觸金屬 墊18下方。印刷電路板（pCB)之金屬焊墊係為銅組成金 鲁屬，銅之熱膨脹係數約為16，與印刷電路板（pcB)之熱膨 脹係數相匹配。從以上所述，本發明可提供絕佳之熱膨脹 係數（於X/Y方向充分匹配）解決方案以用於晶圓級封裝 (WLP)。 積層下方（印刷電路板（PCB)及基板）熱膨脹係數匹配 問題可明顯由本發明所解決，亦可提供較佳可靠度（電路板 級測試期間基板上之終端墊（焊錫球/凸塊）得於χ/γ方向上 無熱應力）’且彈性介電層係用以吸收Ζ方向之應力。晶片 邊緣與基板之通孔側壁間之間隔（空隙）可用以填充彈性介 13 I358806 電材料以吸收機械/熱應力。 本發明之-實施例中’重分佈層之材料包含欽/銅/金 合金或鈦/銅/鎳/金合金，其厚度係於2微米至15微米之 間。鈦/銅合金係藉由濺鍍技術形成作為種子金屬層，且銅 /金或銅/鎳/金合金係藉由電鍍技術形成。利用電^程序形 成重分佈廣可使重分佈層具有足夠之厚度及較佳之機械特 性以抵抗溫度循環期間之熱膨脹係數不匹配。金屬墊可為 鲁鋁或銅或其結合。若擴散型晶圓級封裝（F〇·WLp)結構利用 石夕氧烧聚合物（SINR)作為彈性介電層且利用銅作為重分 佈層之金屬，根據未圖示於此之應力分析，累積於重分佈 層/介電層介面内之應力則會降低。 如第一圖及第二圖所示，重分佈層（RDL)係從晶粒擴 散出且朝第二終端墊向下連通。與先前技術不同，晶粒’6 係由基板内預形成之晶粒接收通孔所接收，藉此減少封裝 厚度。先前技術違反減少晶粒封裝厚度之規則。本發明之 φ封裝將較先前技術為薄。此外，基板係於封裝之前預先備 女。晶粒接收通孔4係預先定義。因此，生產率將較以前 得到大幅改善。本發明揭露具有減小之厚度及良好之熱膨 脹係數匹配表現之擴散型晶圓級封裝。 本發明包含預備一基板（最好為有機基板如玻璃纖維 板（FR4)/耐高溫玻璃纖維板（FR5)/雙馬來醯亞胺三氮雜笨 樹脂（BT))，且接觸金屬塾係形成於其頂部表面上。晶粒接 收通孔係以每一側約大於晶粒尺寸1〇〇微米之尺寸形成。 其深度係與晶粒厚度約相同（或約大於晶粒厚度25微米）。 14 比8806 .* · · “具保護層之微透鏡係形成於經處理之⑦晶圓上，其可 ^由避免粒子汙染而改善純型晶圓級封裝（fq w奶程 4間之產里。接續之步驟為藉由晶背薄化將晶圓磨薄至 』望厚度。晶圓接著引至切割程序以分離晶粒。 其後，本發明之程序包含提供晶粒重分佈（對準）工 具、，其具有形成其上之對準圖型。接著，圖樣化黏著劑係 予以印刷於工具上(用以黏附晶粒之表面），接續為利用且 籲覆晶功能之取放精密對準系統以重分佈期望晶粒於工具^ 使其具期望之間距。圖樣化黏著劑將黏著晶片（於主動面側） 於工具上。之後，基板（具晶粒接收通孔）係結合於工具上 且接著印刷彈性核心點膠材料於晶粒與基板（耐高溫玻璃 •纖維板（FR5)/雙馬來醯亞胺三氮雜苯樹脂（BT))内通孔側 壁間之間隔（空隙）内以及於晶粒背側。最好保持核心黏膠 材料及基板之表面於同一平面上。接著，利用固化程序以 固化核心黏膠材料以及利用紫外光固化程序結合玻璃載 #板。板結合劑係用以結合基座至基板及晶粒背側上。亦可 施行真空結合，接著從面板型晶圓分離該工具。 一旦晶粒重分佈於基板（板型）上，則施行潔淨程序以 濕式清洗及/或乾式清洗清潔晶粒表面。其後步驟為塗佈介 電材料於板型之表面上。接著，施行光微影蝕刻程序以開 啟接觸金屬通孔、鋁接合墊及微透鏡區域或切割線（選& 性）。之後，執行等離子清洗（plasma clean)步驟以清洗通孔 及鋁接合墊之表面。下一步驟為濺鍍鈦/銅作為種子金屬 層，及接著塗佈光阻（PR)於介電層及種子金屬層上以用於 15 1358806 • . 形成重分佈金屬層圖形。接續，進行電㈣細形成銅/ 金或銅續/金作為重分佈層金屬，隨後剝除光阻（pR)及進 行金屬濕蝕刻以形成重分佈層金屬導線。其後，塗佈或印 刷頂部介電層及開啟接觸金屬通孔（選擇性用於最終測試） 或開啟切割線（選擇性）。 於介電層形成之後或於保護層形成之後，微透鏡區域 可予以暴露出。 # ☆設置球或㈣焊㈣雛’施行熱迴融程序以迴焊 錫球處（用於錫球陣列）。利用垂直式或懸壁標式（ep〇xydng) 探針卡（probe card)接觸該接觸金屬通孔而施 最㈣試。^試之後，切割基板以分離封裝成獨立單^；。 接著，封裝單70係各別取放至托盤或捲帶及捲轴上。 本發明之優點為： 製程步驟易於形成面板晶圓類型且易於控制面板表面 之粗糖度。面板之厚度係易於控制且於程序期間將排除晶 φ拉偏移之問題。可省略注入塑模工具且亦將不會導致引入 化學機械研磨（CMP)所引發之创光變形。面板晶圓易於以 晶圓級封裴程序加工。 基板係預先備妥預形成通孔、互連通孔及終端接觸金 屬塾（用於有機基板）。通孔尺寸係等於晶粒尺寸於每一側 約加100微米。藉由填充彈性核心黏膠材料可用作為應力 緩衝釋放區域，以吸收石夕晶粒與基板（耐高溫破璃纖_ 卿)、雙馬來醯亞胺三氮雜苯樹脂(Βτ))間熱膨脹係數不 匹配所造成之熱應力。由於應用簡化之積層於晶粒表面上 16 1358806 方’故封裝生產率將會增加（劁 係形成於晶粒主動面之相反側。I間減少）°終端塾 置程序與現行程序相同。彈性核心黏膠材料（樹 ;之=化合物、W)係充填於晶粒邊緣與通孔側壁 ==，以用作本發明之熱應力釋放緩衝，接著即應 固化程序。熱膨脹係數匹配問題於板型製程期間
服。唯獨==近石夕晶粒之熱膨脹係數之玻璃載板而克 3石^介電材料（最好為石夕氧院聚合物（SINR)) 晶粒主動面及基板（最好為玻璃纖維板（FR4)、耐 ^玻璃纖維⑽R5)或雙馬來醯亞胺三氮雜苯樹脂（BT)) 妨，上。由於介電層（石夕氧烧聚合物（sinr))為感光層， 二利用光遮罩程序即得以開啟接觸塾用通孔。晶粒及基 ==玻璃載板結合。封裝及電路板級二者之可靠度係較 月J術為佳，特別於電路板級溫度循環測試，乃因基板 2刷電路主機板之熱膨脹係數為相同，故無熱機械應力 於焊錫凸塊/球上。先前技術中於電路板級測試之溫度 j %期間之失敗模式（焊錫球損毀）於本發明下係變得不明 =成本得降低且程序步驟簡化。亦易於形成多重晶粒封 才蓺雖本發明之較佳實施例已敘述如上，然而，此領域之 支κ者將得以瞭解，本發明不應受限於所述之較佳實施 戶〜更確切言之，此領域之技藝者可於後附申請專利範圍 疋義之本發明之精神及範圍内做若干改變或修改。 【圖式簡單說明】 17 1358806 第一圖係根據本發明說明擴散型晶圓級封裝結構 面閘格陣列（LGA)型）之橫切面示意圖。 第一 A圖係根據本發明說明微透鏡結構之橫切面示音 圖 〇 第二圖係根據本發明說明擴散型晶圓級封裴結 球陣列（BGA)型）之橫切面示意圖。 第二圖係根據本發明說明基板之橫切面示意圖。 第四圖係根據本發明說明基板及玻璃載板之結人 切面示意圖。 〇 cr十尹、 第五圖係為根據本發明之基板之頂視圖。 第六圖係根據本發明說明互漏金屬氧化物半導體$ 像感測器（CIS)模組之橫切面示意圖。 〜 【主要元件符號說明】 2基板 3第一終端接觸導電墊 4晶粒接收通孔 6晶粒 10接觸墊（接合墊） 12感光層或介電層 14重分佈層 18第一終端接觸導電墊 20導電球 21核心黏膠材料 22連接通孔 18 1358806 24導電（金屬）層 26 ^蒦層 28切割線 40工具 42黏膠材料 50邊緣區域 60微透鏡區域 621呆護層 70透鏡支架 72印刷電路板 74導線 75接觸金屬墊 76連接器 78透鏡 80被動元件 82紅外線濾鏡 100元件

Claims (1)

1358806 、申請專利範圍： —半導體元件封裝結構，包含： 基板’其具有—晶粒接收通孔、—連接通孔結構及一 第一接觸墊； 一晶粒，其具有一微透鏡區域且配置於該晶粒接收通孔 内； :周圍材料，其形成於該晶粒下方且填充於該晶粒與該 晶粒接收通孔之側壁間之間隔内； |電層其形成於该晶粒及該基板上以暴露該微透鏡 區域； 一重分佈層，其形成於該介電 墊； 層上且耦合至該第一接觸 一保護層，其形成於該重分佈層上；以及 一第二接觸墊，其形成於該基板之下表面且於該 孔結構之下方。 2. »月求項1所述之半導體元件封裝結構，還包含導電凸 塊’其耦合至該第二接觸墊。 如叫求項1所述之半導體元件封裝結構，其中該重分佈 層包含鈦/銅/金合金或鈦/銅/鎳/金合金。 汝二求項1所述之半導體元件封裝結構，其中該基板之 材料包含環氧型耐高溫玻璃纖維板（FR5)或玻璃纖維板 20 (FR4) ο 5.如明求項1所述之半 _ ；M•料勺人 凡件封裳結構’其中該Λ相夕 材枓包含雙馬來醯亞 -基板之 踗拓rpr^ 妝—乳雜本樹脂（BT)、矽、印刷雪 路板(PCB)材料、玻璃或陶^ P^，jt 之 & 導體元件封裝結構，其中該基板 7二===:元件封裝結構’其中該周圍材 8. Ϊ明求項1所述之半導體元件封裝結構，還包含—保護 9，其形成於該微透鏡區域上。 ，、° 9. 項1所述之半導體^件封裝結構，其中該介電層 13彈性介電層、感光層、含矽 物（嶋）層、聚亞酿胺（ΡΙ)層或石夕樹脂層m °月求項1所述之半導體元件封裝結構，4中該半導體 元件封袈係形成於具導線之一印刷電路板上，一透鏡支 架係設置於該印刷電路板上且覆蓋該半導體元件封 裝，一透鏡係設置於該透鏡支架之頂端以及一濾鏡係設 置於該透鏡與該半導體元件封裝之間。 21 I3588U6 14: =項12所述之用於形成半導體元件封裝之方法， =〜介電詹包含彈性介電層、感光層、切介電 科層、聚亞醯胺⑻層或矽樹脂層。 15. 如請求項14所述之用於形成半導體元件封裝之方法， Φ 切介電型材料包切氧炫聚合物（_R)、道 康丁（D〇w Corning) WL5〇〇〇系列或其結合。 16. ==項12所述之用於形成半導體元件封裝之方法， i金Γ至少一導電積層&含欽/銅/金合金或鈦/銅/鎳/金 17_如請求項12所述之用於形成半導體元件封裝之方法， 基板之材料包含環氧型耐高溫玻璃纖維板 或玻璃纖維板（FR4)。 18.如請求項12所述之用於形成半導體it件封裂之方法， :中該基板之材料包含雙馬來醯亞胺三氮雜苯樹脂 矽、印刷電路板（pCB)材料、玻璃或陶瓷。 19_如請求項12所述之用於形成半導體元件封裝之方法， 其中該基板之材料包含合金或金屬。 23 1358806 20.如請求項12所述之用於形成半導體元件封裝之方法， 還包含形成一保護層於該晶粒之該微透鏡區域上。
24
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