TWI356451B - Wet etch suitable for creating square cuts in si a - Google Patents
Wet etch suitable for creating square cuts in si a Download PDFInfo
- Publication number
- TWI356451B TWI356451B TW096119774A TW96119774A TWI356451B TW I356451 B TWI356451 B TW I356451B TW 096119774 A TW096119774 A TW 096119774A TW 96119774 A TW96119774 A TW 96119774A TW I356451 B TWI356451 B TW I356451B
- Authority
- TW
- Taiwan
- Prior art keywords
- single crystal
- fluoride
- acid
- solution
- trench
- Prior art date
Links
- 239000013078 crystal Substances 0.000 claims description 71
- 238000000034 method Methods 0.000 claims description 40
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims description 39
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 28
- 238000005530 etching Methods 0.000 claims description 27
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 18
- 229910052732 germanium Inorganic materials 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 13
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 11
- 239000007800 oxidant agent Substances 0.000 claims description 11
- 229910052707 ruthenium Inorganic materials 0.000 claims description 11
- 239000004575 stone Substances 0.000 claims description 10
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 9
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 claims description 8
- 239000008367 deionised water Substances 0.000 claims description 7
- 229910021641 deionized water Inorganic materials 0.000 claims description 7
- 229910052500 inorganic mineral Inorganic materials 0.000 claims description 6
- 239000011707 mineral Substances 0.000 claims description 6
- 150000007522 mineralic acids Chemical class 0.000 claims description 5
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 239000000908 ammonium hydroxide Substances 0.000 claims description 3
- MOVBJUGHBJJKOW-UHFFFAOYSA-N methyl 2-amino-5-methoxybenzoate Chemical compound COC(=O)C1=CC(OC)=CC=C1N MOVBJUGHBJJKOW-UHFFFAOYSA-N 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 claims description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 2
- BVKZGUZCCUSVTD-UHFFFAOYSA-N carbonic acid Chemical compound OC(O)=O BVKZGUZCCUSVTD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 2
- 238000012876 topography Methods 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910000078 germane Inorganic materials 0.000 claims 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims 1
- ARYKTOJCZLAFIS-UHFFFAOYSA-N hydrogen peroxide;ozone Chemical compound OO.[O-][O+]=O ARYKTOJCZLAFIS-UHFFFAOYSA-N 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- SAVMTTISRBULOZ-UHFFFAOYSA-N tetradecan-1-amine;hydrofluoride Chemical compound F.CCCCCCCCCCCCCCN SAVMTTISRBULOZ-UHFFFAOYSA-N 0.000 claims 1
- 239000000243 solution Substances 0.000 description 42
- 239000000203 mixture Substances 0.000 description 27
- 239000000758 substrate Substances 0.000 description 20
- 235000012431 wafers Nutrition 0.000 description 20
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 14
- 238000004519 manufacturing process Methods 0.000 description 13
- 230000008569 process Effects 0.000 description 11
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 10
- 150000004767 nitrides Chemical class 0.000 description 7
- 229910001868 water Inorganic materials 0.000 description 6
- LDDQLRUQCUTJBB-UHFFFAOYSA-N ammonium fluoride Chemical compound [NH4+].[F-] LDDQLRUQCUTJBB-UHFFFAOYSA-N 0.000 description 5
- 239000000872 buffer Substances 0.000 description 5
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 5
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 3
- -1 HF2_ Chemical compound 0.000 description 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 3
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 description 3
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- 238000004630 atomic force microscopy Methods 0.000 description 2
- QVQLCTNNEUAWMS-UHFFFAOYSA-N barium oxide Chemical compound [Ba]=O QVQLCTNNEUAWMS-UHFFFAOYSA-N 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000012895 dilution Substances 0.000 description 2
- 238000010790 dilution Methods 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium dioxide Chemical compound O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 238000009834 vaporization Methods 0.000 description 2
- 230000008016 vaporization Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000008366 buffered solution Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 230000009881 electrostatic interaction Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229940119177 germanium dioxide Drugs 0.000 description 1
- 239000004519 grease Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000001000 micrograph Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000006722 reduction reaction Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000013169 thromboelastometry Methods 0.000 description 1
- 238000004627 transmission electron microscopy Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00555—Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
- B81C1/00626—Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30608—Anisotropic liquid etching
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/08—Etching
- C30B33/10—Etching in solutions or melts
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/03—Static structures
- B81B2203/0323—Grooves
- B81B2203/033—Trenches
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/03—Static structures
- B81B2203/0323—Grooves
- B81B2203/0338—Channels
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Weting (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Description
九、發明說明： 【發明所屬之技術領域】 本發明概言之係關於用於使用濕式蝕刻劑來底切單晶矽 之方法。更特定而言，本發明係關於用於在單晶矽中產生 方形底切之方法及所獲得之結構。 【先前技術】 最新技術發展水平：半導體組件之更高效能、更低成 :、增加之小型化及積體電路之更大封裝密度正成為電脂 仃業之目標。一種減小半導體組件總成本之方法係減小彼 ，’且件之製造成本。降低製造成本可藉由加快生產速度以及 減少製作半導體組件中所用材料量來達成。近年來，半導 體行業已明顯地將其重點擴展到開發及生產光電組件，例 如電荷輕合裝置（CCD))及更近的CMOS成像儀。如同其他 半導體組件-樣’存在-種旨在以不斷降低之成本獲得更 高效能參數及更大良率之持續努力。 微機電系統（"MEMS")係另一種在諸多行業（包括電子行 業）中受到廣泛注意之技術。MEMS使用微製作技術將超小 型電及機械組件整合於同一基板上（例如，一石夕基板）以形 成極小之設備。電組件可使用積體電路製作（，,IC")過程來 製作，而频組件可使用與積體電路製作過程相容之微機 此方法之組合使得使用 完整超小型系統成為可 加工過程來製作》在諸多示例中， 習用製造過程在一晶片上製作一 能。然而’現有製作技術中仍存在諸多缺點，而此限制可 製作的MEMS組件及總成之類型及尺寸。 121153.doc 1356451 當前對（100)矽實施用於dram、微處理器等之習用1(：處 理。氫氧化鉀及TMAH可用於藉由下述方式在（11〇)矽中產 生重直钱刻.使用（110)基板晶圓或使基板晶圓之表面再結 晶以具有一（110)晶體定向。然而，所獲得之結構並非始終 合意且可將增加成本的附加處理步驟及程序引入至製作過 程並產生一低效能裝置。 各種習用化學品已用來蝕刻矽。舉例而言，單晶矽及多 晶矽二者通常係在硝酸（HN〇3)與氫氟酸（HF)之混合物中進 行濕式蝕刻。在使用此等蝕刻劑之情況下，蝕刻通常為各 向同I"生。該反應係由hn〇3起始，從而在發上形成一二氧 化矽層，而HF將氧化矽溶解掉。在某些情形中，使用水來 • 稀釋蝕刻劑，其中乙酸（CHsCOOH)係一較佳緩衝劑。 於某些應用中，相對於其他晶面沿一個或多個晶面更快 地蝕刻矽係有用。舉例而言，在矽之鑽石晶格中，（ιιι)平 面通常比（1〇〇)平面壓縮的更密實’且因此（111)定向表面 φ 之蝕刻速率預期低於具有（1〇〇)定向之彼等。不同平面之鍵 合又向亦有助於蝕刻劑對暴露平面之選擇性。一種具有此 等定向相依性蝕刻特性之蝕刻劑係由K〇H與異丙醇之混合 物、、且成舉例而s ’此種混合物沿（⑽）平面比沿（⑴）平 面蝕刻得快一百（100)倍。 可使用氫氧化物蝕刻劑及TMAH在（1〇〇)矽中產生一垂直 底切。圖1及2顯示-藉助不同之㈣劑溶液以標準梦定向 (圖1A及圖2A)及45。旋韓（圖阁013、 々疋得（圖1B及圖2B)二者實施之矽蝕 刻。於標準定向中’―遮罩係沿<11〇>方向對準。⑴1}平 121153.doc 1356451 面界定自（⑽）表面平面傾斜之側壁。藉助45。旋轉，遮罩 沿<1〇〇>方向對準。在圖1中，蝕刻劑係在下施用之稀 釋ΝΗ4ΟΗ Αή在圖2中，姓刻劑係在^下施用之稀釋 TMAH。儘管兩種钱刻劑顯示不同之選擇性，但二者皆可 底切石夕10並產生斜切邊緣或切角12。斜切邊緣對於某些應 用並非合意且可限制組件在積體電路上之間隔。 因此’合意之情形係在(100)矽中產生無斜切邊緣或切 角之方形底切及/或可操縱底切之形狀。此外，合意之情 形係使用濕姓刻化學品在⑽）石夕中產生一橫向承架。月 【實施方式】 下文將參照附圖對本發明加以詳細說明，料附圖形成 本發明之-部分且其中以圖解方式示出了可實施本發明之 具體實施例。在附圖中，類似之編號皆代表各附圖中大致 相似之組件。該等實施例之說明極其詳細以使熟悉此項 技術者能夠實施本發明。㈣此項技術者亦可利用其它實 施例並可在不背離本發明範，之前提下對本發明作、出結 構、邏輯及電方面之改動。 下文說明中所使用之措詞"晶圓，，及，，基板"包括任何具有 一藉以形成本發明之積體電路（IC)結構之暴露表面之結 構。措詞基板應理解為包括半導體晶圓。措詞基板亦用Z 指代處理期間之半導體結構，並可包括已製作於其上之其 他層。晶圓及基板二者包括經摻雜及未摻雜之半導體、由 基礎半導體或絕緣體支撐之磊晶半導體層、以及為熟習此 項技術者所習知之其他半導體結構，措詞"導體"應理'解為 121153.doc 1356451 包括半導體，且措詞"絕綾俨， 緣體疋義為包括導電性差稱作
導體之材料之任何材料…μ T 此’下文之詳細說明不應視為 具有限定性意義，本發明 之範可僅由隨附申請專利範圍及 歸屬於該等隨附申請專利範 ⑴乾圍之等效形式之全部範疇界 定。 本申明案_所使用之措詞"水平"玄荔也 佰°』水十定義為一平行於一晶圓 或基板之習用平面#类^ 次表面之千面，而無論該晶圓或基板之 定向如何。措詞"番吉，,技4t
借.η』笙直係指一垂直於以上所定義之水平方 向之方向。諸如，'在…上（οη)"、"侧（Side)(如在"側壁 (sidewaH)中，，、”更高（higher)"、"更低（i〇wer)"、"在上面 (over)及纟·’·下面（undei>)’’之前置詞皆係相對於位於該晶 圓或基板之頂表面上的習用平面或表面所定義而無論該 晶圓或基板之定向如何。
如本文中發明者所認識到，業内需要使用濕式蝕刻化學 品來底切（100)矽。當初始圖案沿<1〇〇>方向定向時，可使 用一緩衝氟化物蝕刻溶液在（100)矽中產生方形拐角及橫向 承架’而無需藉助氫氧化物蝕刻經受典型之斜切。可使用 本發明之濕式蝕刻化學品來製作先前認為過於昂貴、複雜 及/或良率不佳之裝置。 本發明之一實施例進一步包括採用蝕刻劑溶液以操縱一 在單晶矽下面的溝槽之空腔形狀之方法。蝕刻化學品對晶 體定向具有高選擇性，當使用（100)晶面定向及沿一 <1〇〇> 方向圖案化時’可達成一缺乏斜切拐角且包括一橫向承架 之空腔形狀。 121153.doc 1356451 本發明之一實施例句杯 j匕括—種蝕刻（100)晶體矽平面比 1〇〇)及⑴⑽平面慢2_3倍之方法^在低溫下之稀釋姓刻 !中（1GG)梦之钱刻速率可約為5]~咖A/min且較佳為 A/min該方法可包括將矽暴露至本發明之一緩衝 . 氟化物㈣溶液。該方法可進-步包括-相對於⑽)石夕對 氧化物及/或氮化物之同步較慢蝕刻。 . 在本發明之_實施例中，可藉由下述方式在單晶石夕中產 纟一方形底切：提供其中包括至少一個溝槽之單晶矽；沿 <100〉方向圖案化單晶矽並將單晶矽暴露至一包括氟化物 組份、氧化劑及無機酸之溶液。 在本發日月之-實施例巾，可藉由將單晶㈣露至一各向 劑及隨後之-緩衝I化物餘刻溶液產生—橫向承 架。或者，可藉由將單晶石夕暴露至一第一各向同性姓刻劑 以產生一溝槽來產生一橫向承架。可施用一各向異性触刻 劑來底切矽並可施用一緩衝氟化物蝕刻溶液以修正底切空 Φ 腔之拐角。應瞭解，在不具有第一各向異性餘刻劑之情形 下’可在溝槽中使用緩衝氟化物钱刻溶液，其可在不同之 暴露平面中以不同之速率餘刻石夕。 . 本發明之一實施例包括一半導體裝置，該半導體裝置包 括具有一方形底切形貌之單晶矽。該底切形貌包括平滑表 面。本發明之一實施例包括一半導體裝置，該半導體裝置 包括具有一橫向承架之單晶石夕。 下文將大體闡述根據本發明用於使矽氧化並姓刻二氧化 矽以形成所期望之結構之蝕刻組合物。根據下文所提供之 121153.doc -10· 說明’熟習此項技術者將易於明瞭本文中所述之緩衝氟化 物蝕刻組合物可用於各種應用中。換言之，可在實施矽蝕 刻且其中需要方形底切或橫向承架時，使用該緩衝氟化物 蝕刻組合物。舉例而言，本發明可在形成用於製作積體電 路之隔離結構中使用。此外，舉例而言，本發明可有益於 製作電晶體結構，例如假絕緣體上矽裝置（包括DRAM、 SRAM、快閃、成像儀、PCRAM、MRAM、CAM 等）、 FinFet(鰭式場效應電晶體）' 環繞閘極電晶體、以及微機 電系統（"MEMS")及光電組件。 在一實施例中，一用於底切單晶矽以形成橫向承架之緩 衝氟化物蝕刻組合物通常包括一氟化物組份、一無機酸及 一氧化劑。氟化物組份可係（但不限於）HF、HF2_、NH4F、 或氟化四甲基銨（TMAF)。氟化銨可由氫氧化銨與]^!^之混 合物形成。氟化物組份或溶液係如此以致當蝕刻組合物與 矽反應形成二氧化矽時，氟化物組份或溶液溶解掉由此形 成之二氧化矽。氟化物組份可以0.5-50重量。/。之量存在。 緩衝氟化物蝕刻組合物之氧化劑可係任一氧化劑，例如 (舉例而言）過氧化氫或臭氧.一種當前較佳之氧化劑係過 氧化氫。 無機酸組份可包括至少一種選自氫氟酸（HF)、磷酸 (Η：(Ρ〇4)、硫酸（H2S〇4)、硝酸（HN〇3)、鹽酸（HC1)、碳酸 (Η^〇3)中之酸，或任何其他合適之無機酸。當前較佳之 無機I為Η3Ρ〇4或H2C〇3。可在市場購得之無機酸通常呈 濃縮溶液（X)形式，可隨後將其稀釋至一所期望之濃度 121153.doc 1356451 (H2〇:x)。舉例而言，市售濃縮酸係以如下形式存在：HC1 以37重量％存於去離子水中；HN〇3W7〇重量％存於去離子 水中，H2S〇4以96重量％存於去離子水中；且Η3ρ〇4以85重 量％存於去離子水中。本文所述钱刻組合物之濃度係根據 市售溶液而給出。舉例而言，若蝕刻組合物具有一為30% HC1之濃度，則該溶液包括3〇重量％之市售Hci溶液。過氧 化氫（Η"2)亦係以一以約29重量％存於去離子水中之濃縮 溶液形式市售。此外，氟化銨亦係以一以約4〇重量％存於 去離子水中之濃縮溶液形式市售。此外，應認識到，該溶 液之多種組份可由市售溶液提供。舉例而言，可自〇Un
Microelectronics Materials (Newalk，Conn.)購得之 QEII提 供NH4F(〜39.4 w%)及一無機酸（亦即H3p〇4〜〇 6 w%)二者， 還無機酸可用於調整溶液之pH。 其他適合之實例性钱刻劑揭示於美國專利第7,丨66,539號 及美國專利第6,391，793號中。緩衝氟化物姓刻劑溶液較佳 具有一介於約5.0至約9.0範圍内之pH。更佳地，緩衝氟化 物姓刻組合物具有一約7·8之pH。較佳地，緩衝氟化物姓 刻組合物包括：一氟物化組份，其介於緩衝氟化物蝕刻組 合物之約0.5重量％至約50重量％之範圍内；一氧化劑，其 介於緩衝氟化物蝕刻組合物之約〇·5重量％至約3〇重量％之 範圍内；及一無機酸，其介於約^。重量％之範圍内。舉 例而言’缓衝氟化物蝕刻組合物較佳可包括NH4F:qEII: H2〇2約為4:2:3之體積比。 此外，緩衝氟化物蝕刻組合物之離子強度大於丨；更佳 121153.doc -12· 1356451 地，該離子強度介於約5至約20之範圍内。如本文中所使 用，離子強度係指組合物中離子之間平均靜電交作之一量 度，其等於藉由將每一離子之重量莫耳濃度乘以其化合階 平方所獲得各項之和的一半。再進一步，較佳地，蝕刻組 CJ物之氧化還原電勢介於約·〇5至約+〇7之範圍内或更高 (與‘準氫電極（SHE)相比）。如本文中所使用，氧化還原 . 電勢係蝕刻組合物作為氧化劑之有效性之一量度，亦即， 蝕刻組合物使矽氧化以供蝕刻組合物之HF組份移除之能 • 力。 緩衝氟化物蝕刻溶液之上述範圍特別適用於使用氟化銨 • 及過氧化氫，但似乎同樣適用於具有上述組份之其他組合 之緩衝氟化物蝕刻組合物，例如當氟化銨係由氫氧化銨及 氫氟酸提供時。換言之，可混合適合量之氫氧化銨與氫氟 酸以提供一充足量之氟化銨。當將臭氧用作氧化劑時，臭 氧較佳以一約百萬分之一（PPm)至約50 ppm之範圍存在。 • 緩衝氟化物蝕刻溶液可呈現一較暴露至同一蝕刻組合物 之氧化物之餘刻速率大3倍之矽蝕刻速率，亦即，石夕與氧 化物之間的選擇性大於3 ^更佳地，與<1〇〇>矽蝕刻速率相 比，使用該蝕刻組合物時，矽與氧化物之間的選擇性大於 6 〇 ; 此外，為了達成所期望之晶圓通量，使用蝕刻組合物之 矽蝕刻速率較佳大於約5 A/min。更佳地，矽蝕刻速率大 於18 A/mir^甚至更佳地，矽蝕刻速率大於每分鐘“ Μ A 〇 121153.doc 13- 1356451 較佳地，該㈣組合物係如此以致在使用該㈣組合物 移除石夕之後，石夕表面具m供隨後進行處理之合意表 面粗糙度。較佳地，矽表面在蝕刻後之粗糙度介於約125 A RMS至約uo a RMS之範圍内。合意地在移除多於 180 A之矽後，該矽表面即可屬於此一粗糙度範圍内。通 常，舉例而言，粗糙度可由原子力顯微鏡檢查法（afm)來 確定，原子力顯微鏡檢查法可掃描一約為2 μιη2之表面積 並給出一跨越此1 μιη2表面積之平均峰穀量測值rms。 較佳地’如上所述對氧化物之高選擇性係一對熱氧化物 之高選擇性。舉例而言，此熱氧化物可藉由熱氧化（例如 使用濕或乾爐氧化）來形成。然而，此選擇性亦可適用 於藉由化學氣相沈積（CVD)形成之氧化物，例如通常在隔 離絕緣過程（例如，淺溝槽隔離）中使用之高密度電漿氧化 物0 一般而言’可使用任何已知之方法使矽暴露至緩衝氟化 物餘刻溶液。舉例而言，可將矽浸入一緩衝氟化物蝕刻溶 液罐中。亦可將溶液噴灑於欲蝕刻之晶圓上或可以任何其 他方式（例如滴注、噴麗、氣化等）來引入溶液以與晶圓接 觸。蝕刻過程可在一介於約10。(：至約90°C範圍内之溫度下 實施。較佳地，蝕刻過程發生在一介於21°C至約30°C之間 且更佳地介於約22°C與25。(：之間的溫度下。 如本文先前所述，圖1及2顯示當使用NH4〇H或TMAH來 底切矽時，實質上未形成橫向承架。當以一45。旋轉（亦 即，沿<100>方向圖案化）實施時，底切結構之拐角具有切 121153.doc • 14· 1356451 角u。（圖1B及圖2B)。此等所獲得之結構對於許多製造過 程而:並非合意。參見圖3,根據本發明，—㈣底切係 6〇下之緩衝氟化物钱刻溶液（1〇升NH4f+5升 QEII+7.5升112〇2)在（100)石夕中以標準石夕定向（亦即沿 方向圖案化）及45。旋轉來實施。圖3中所用緩衝氟化 物钱刻溶液表明_)料面係慢敍刻平面#圖案係沿 <1〇〇>方向對準，則其允許方形底切之產生。於一典型的 基於氫氧化物之㈣中，⑴υ平面係—慢㈣；因此，令 人驚奇地發現一濕式蝕刻包括(100)矽中之慢平面蝕刻。
緩衝氟化物蝕刻溶液可對（丨〇 〇)矽提供極有用之選擇 性、平滑表面及可控制蝕刻。參見圖33，橫向承架14及缺 乏斜切之拐角使得在其上容易形成電裝置，例如，製造於 (100)石夕上之標準CMOS晶®中之FinFET、假s〇I或RAD 缽。使用緩衝氟化物蝕刻溶液亦產生不包括一橫向間隔物 之方形凹肖，而此對於薄片之矽指狀件(其具有與材料尚 未蝕刻之毗鄰材料迥然不同之特性）中之電子特性係合 意。圖3B中所繪示之方形凹角亦用於在製作MEMs時裝置 機械及光學特性之分立變化。（1〇〇)矽中之凹角亦允許 CMOS裝置令之簡單整合並使副奶機械及《學結構更容 易地與CMOS處理整合在一起。 緩衝氟化物蝕刻溶液之蝕刻速率及選擇性取決於兩種競 爭機制-矽之氧化及氧化物之蝕刻速率。此可繪示於以下 簡化反應中：
Si+2 H202=H2Si〇3+H2〇=Si02+2 H2〇 121153.doc 1356451 半電池還原/氧化反應： H.2O2+2 H++2e-㈠ 2 H20 E0'=+i 77 V Sis+2 OH. w=Si(OH)2+2e· H2Si03+6 HF^H2SiF6+3 H20 (100)石夕晶體定向與熱氧化物之間的典型選擇性 (2)(3)(4) 約為6。 (110)方向鞋刻約高於（1 〇〇)矽姓刻兩倍半。
雖然緩衝氟化物蝕刻溶液可用於各種應用中，但圖! 繪不根據本發明之一方法用於產生假s〇I結構之部分過 程。在圖4-11之每一者令，A部分顯示該結構之一平面圖 而B部分顯示一沿-·Β·_截取之對應結構之剖視圖。圖4八及 Β繪示-單晶梦基板⑽。—氮化妙襯i 12形成於該基板 上。如此項技術中所習知，一遮罩層128(例如，光阻劑）形 成於氮化矽襯112上。遮罩層128可經圖案化以形成至少一 個溝槽遮罩開口 132。本發明亦涵蓋習用光微影或其他微 影或非微影方法，而無論是否存在遮罩層128。
麥見圖5A及 - ..« 丄·^蝕刻氮化矽襯 單晶石夕基板刚，以在單晶⑪基板刚中形成至少―個溝槽 116。該㈣可利用—例如包括氨及至少-㈣IL化合物 之乾式各向異性蝕刻化學品(其包括或不包括電幻來實 施在银刻至單B曰石夕基板1〇〇中時，遮罩層⑶可能殘留或 經移除。雖然已揭示了 —種形成溝槽116之具體方法，但 熟習此項技術者應睁解，f n,, m , 嚟解亦可利用任何形成溝槽116之方 法0
參見圖6A及6B 氮化物層可沈積於氮化矽襯112及溝 121153.doc -16- 1356451 槽116上，後跟一自溝槽Π6之底部126移除氮化物之蝕 刻’從而在溝槽116之側壁130上產生氮化物間隔物118。 Si3N4襯之產生可藉由習用技術來實施。 然後’可施用本發明之缓衝氟化物触刻溶液來底切單晶 矽基板10 〇較佳地，該緩衝氟化物蝕刻溶液可在約23°C下 施用約5分鐘’此取決於橫向承架114之合意尺寸。如圖7A 及7B中所示’該緩衝氟化物触刻溶液沿一平行於單晶石夕基 板100之方向蝕刻得快於穿過溝槽116之底部126之垂直蝕 刻。如圖7B中所示，可形成一具有約450 A至550 A之厚度 之橫向承架114。 若需要’如圖8A及B中所示’可在溝槽116之底部126及 侧壁1 30上沈積一氮化物襯120並隨後以一氧化物材料 122(例如，一旋塗介電質（s〇D)來填充溝槽116。 在氮化矽襯112及氧化物材料122上沈積並圖案化一遮罩 124。可如圖9A、B及10A、B、C中所示來實施一對氧化 物具有某一選擇性之習用石夕钱刻。 如圖11A、B、C及D中所示，可沈積一任選氮化物襯136 及實施一 SOD充填。在圖11中所繪示之s〇D充填後，結構 150可經受進一步處理以在其上形成（例如）電晶體、電容器 及數位線來完成假SOI結構。結構150包括一具有約5〇〇 A (+/- 10%)之厚度之橫向承架114。 包括任何電晶體（例如，陣列電晶體或存取電晶體）、疊 加結構150的所獲得之結構因矽下面存在氧化物材料122而 具有明顯降低之洩漏。（參見，例如，圖丨丨B)。應瞭解， 121153.doc 17 1356451 400下面的矽支腿或支柱45〇隨著蝕刻進程而變得越來越 窄。因此’應瞭解，結合本發明之蝕刻劑溶液使用適宜之 圖案角度’可製造具有各種特徵之裝置。藉由操縱姓刻時 間及姓刻劑組合，可達成不同之底切輪廓。舉例而言，該 緩衝氟化物蝕刻溶液可結合氫氧化物、NH4OH、NH4F、 TM AH或其、组合。 本發明可藉由以下非限制性實例來加以進一步瞭解。 實例1 圖14A及B繪示一積體ps〇I DRAM存取結構的兩個 TEM。該輪廓係藉由在25。〇下4分36秒之TMAH(100 : 1) 钱刻之組合而產生。一使用該緩衝氟化物蝕刻溶液（以 4:2:3之比率提供之NH4F、QEII及H2〇2)之第二触刻係在25 C下進行6分鐘。一習用氧化物間隔物用於兩種濕式蝕刻 並在空腔產生後被移除。在將存取電晶體及位元線連同多 晶矽引腳整合於電晶體閘極之間後，沿 < 丨00>方向顯示影 像。 所有引用之文獻作為整體併入本文中，仿佛每一文獻單 獨地併入本文中一樣。本發明已參照示例性實施例加以了 闡述’但並“意欲視為具有限定意義。如先前所述，熟習 此項技術者將認識到’各種其他示例性應用可利用本文中 所述之蝕刻組合物。參考本說明，熟習此項技術者將易知 對本發明之示例性實施例以及附加實施例之各種修改。雖 然本文中闡述了本發明之較佳實施例，但由本文中之申請 專利範圍所界定之本發明不受上文說明中所闡明之具體細 I21153.doc •19- 1356451 節之限制，因為本發明亦可具有諸多顯而易見之變化形 式，而此並不背離本發明之精神或範 【圖式簡單說明】 以下圖式圖解說明當前視為實施本發明之最佳模式，圖 式中： 圖1A係一沿<ιι〇>方向遮掩並藉助以26<>c施用之 底切之單晶矽之剖視圖。圖⑺顯示沿<1〇〇>方向遮掩並藉 助以26°C施用之ΝΗβΗ底切之單晶梦。 圖2A係一沿<ιι〇>方向遮掩並藉助以26。〇施用之稀釋 TMAH底切之單晶矽之剖視圖。圖2B顯示沿<1〇〇>方向遮 掩並藉助以26°C施用之稀釋TMAH底切之單晶石夕。 圖3A係一沿<ιι〇>方向遮掩並藉助以23。〇施用之本發明 緩衝氟化物姓刻溶液底切之單晶矽之剖視圖。圖3B顯示沿 <100>方向遮掩並藉助以23 °C施用之本發明緩衝氟化物蝕 刻溶液底切之單晶石夕。 圖4-11顯示一根據本發明一實施例處於一製作過程中各 種階段之單晶矽晶圓。圖4 A係一根據本發明一實施例之單 晶矽晶圓之平面圖。圖4B係一沿圖4A之線4B截取之同— 早晶妙晶圓之剖視圖。 圖5 A係一根據本發明一實施例之單晶矽晶圓之平面圖。 圖5B係一沿圖5A之線5B截取之同一單晶矽晶圓之剖視 圖。 圖6 A係一根據本發明之一實施例之單晶石夕晶圓之平面 圖。圖6B係一沿圖6A之線6B截取之同一單晶矽晶圓之剖 121153.doc -20· 1356451 視圖。 圖7A係一根據本發明一實施例之單晶矽晶圓之平面圖。 圖7B係一沿圖7A之線巧截取之同一單晶矽晶圓之剖視 圖。 圖8 A係一根據本發明一實施例之單晶矽晶圓之平面圖。 圖8B係一沿圖8 A之線8B截取之同一單晶矽晶圓之剖視 圖。 圖9A係根據本發明一實施例之單晶石夕晶圓之平面圖。 圖9B係一沿圖9 A之線9B截取之同一單晶矽晶圓之剖視 圖。 圖10 A係一根據本發明一實施例之單晶矽晶圓之平面 圖。圖10B係一沿圖1〇A之線1〇B截取之同一單晶矽晶圓之 剖視圖。圖i〇c係一沿圖10A之線10C截取之圖1〇A之單晶 石夕晶圓之刮視圖。 圖11A係一根據本發明一實施例之單晶矽晶圓之平面 圖。圖11B係一沿圖11A之線UB截取之同一單晶矽晶圓之 剖視圖。圖10<:係一沿圖11A之線11C截取之圖11A之單晶 石夕晶圓之剖視圖。圖11D係一沿圖11A之線11D截取之圖 11A之單晶矽晶圓之剖視圖。 圖12A-E顯示使用本發明之一緩衝氟化物蝕刻溶液對單 晶石夕之一逐步底切蝕刻。（1〇〇)矽上之溝槽係沿<1〇〇>方 向。 圖13A-D顯示在暴露至NH4〇h後使用本發明之―緩衝氣 化物蝕刻溶液對單晶矽之一逐步底切蝕刻。（1〇〇)矽上之溝 121153.doc 21 1356451 槽係沿<100>方向。 圖14A-B顯示積體PSOI DRAM存取結構之穿透式電子顯 微照片（TEM)。 【主要元件符號說明】
10 早晶碎基板 12 斜切邊緣或切角 14 橫向承架 100 早晶碎基板 112 氮化矽襯 114 橫向承架 116 溝槽 118 氮化物間隔物 120 氮化物襯 122 氧化物材料 124 遮罩 126 底部 128 遮罩層 130 側壁 132 溝槽遮罩開口 136 任選氣化物概 150 結構 300 單晶矽 310 溝槽 312 頂表面 121153.doc -22- 1356451 314 橫向承架 320 氮化物襯 350 支腿或支柱 400 單晶矽 410 溝槽 412 頂表面 450 支腿或支柱 121153.doc ·23 -
Claims (1)
1356451 第096119774號專利申請案 • 中文申請專利範圍替換本(1〇〇年3月）卩文过 ‘ 十、申請專利範圍： 1 _ 一種在單晶石夕中產生一 沿<100>方向圖案化 槽； 方形底切之方法，該方法包括： 單晶石夕以於其中形成至少一個溝 2. 3. 4. 5. 6. 該單S曰石夕之上表面之未凹陷部分及該至少—個溝槽 二側壁上形成結構，同時在該至少—個溝槽内部暴露該 早晶硬之一部份；及 將㈣至少-個溝槽内部之單晶石夕之該暴露部分與一 。包括氟化物組份、氧化劑及無機酸之溶液接觸，以在該 單晶石夕内部形成至少-個藉方形凹角所界定之底切。 如請求項1之方法’其進-步包括將該氟化物組份選擇 為由錢及氫氟酸形成之氟化銨。 如。。月求項1之方法’其進—步包括將該暴露單晶石夕在約 10C至約90t之溫度下與一溶液接觸。 如明求項1之方法，其進一步包括將該暴露單晶矽與一 包括氧化物組份、氧化劑及無機酸之溶液接觸其中該 溶液包括一約5.8至約9.8之pH。 求項1之方法’其中圖案化之單晶矽包括將該單晶 矽暴露至一各向異性蝕刻劑以在其中形成至少一個溝 槽。 如咕求項5之方法’其進一步包括自由氟化四甲基銨、 氟化銨及氫氧化銨組成之群組中選擇該各向異性蝕刻 劑。 如-月求項1之方法’其進一步包括自由氟化氫、氟化銨 121153-1000315.doc 丄妁6451 及氟化四曱基銨組成之群組中選擇該氟化物組份。 8.如明求項1之方法，其進一步包括自由氫氟酸、磷酸、 硫酸、硝酸、鹽酸及碳酸組成之群組中選擇該無機酸。 9·如請求項丨之方法，其進一步包括自由過氧化氫臭氧 及全氟化銨組成之群組中選擇該氧化劑。 10.如吻求項1之方法，其中該暴露單晶矽之接觸包括將該 單晶矽浸入包括體積比約為4:2:3之NH4f、H2〇2&H3p〇4 之浴液中。 11 ·如叫求項1之方法，其中該暴露單晶矽之接觸包括將該 單晶矽浸入至包括約1〇 w〇/〇_35 w% NH4f、約3 w% 2〇 w% H2〇2、約（u w%_2 w% H3p〇4或其他酸及約u w%-86.9w%去離子水之浴液中。 12. 如請求項丨之方法，其中將該暴露單晶矽與一溶液接觸 係包括，比蝕刻以該單晶矽之（11〇)或（111)平面為方向之 表面之材料更慢地蝕刻以該單晶矽之（1〇〇)平面為方向之 表面之材料。 13. —種半導體裝置結構，其包括： 至；一個溝槽，其在單晶矽之表面中形成且包括具有至 少一區域在該單晶矽一部份之下延伸的一方形底切形 貌；及 至少一個結構，其置於該至少一個溝槽之側壁之上且至 少部分延伸進入該方形底切形貌。 14. 如請求項13之半導體裝置結構，其令該至少一個結構包 括一氮化物材料。 121153-1000315.doc -2- 1356451 15.如請求項13之半導體裝置結構，其中該單晶矽之該表面 包括（100)矽。
121153-1000315.doc
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Families Citing this family (51)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007251095A (ja) * | 2006-03-20 | 2007-09-27 | Toshiba Corp | 半導体製造方法 |
| US7625776B2 (en) * | 2006-06-02 | 2009-12-01 | Micron Technology, Inc. | Methods of fabricating intermediate semiconductor structures by selectively etching pockets of implanted silicon |
| US7628932B2 (en) | 2006-06-02 | 2009-12-08 | Micron Technology, Inc. | Wet etch suitable for creating square cuts in si |
| US7709341B2 (en) * | 2006-06-02 | 2010-05-04 | Micron Technology, Inc. | Methods of shaping vertical single crystal silicon walls and resulting structures |
| US8852851B2 (en) | 2006-07-10 | 2014-10-07 | Micron Technology, Inc. | Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same |
| US7557002B2 (en) * | 2006-08-18 | 2009-07-07 | Micron Technology, Inc. | Methods of forming transistor devices |
| US7989322B2 (en) * | 2007-02-07 | 2011-08-02 | Micron Technology, Inc. | Methods of forming transistors |
| US7816216B2 (en) | 2007-07-09 | 2010-10-19 | Micron Technology, Inc. | Semiconductor device comprising transistor structures and methods for forming same |
| US8226840B2 (en) | 2008-05-02 | 2012-07-24 | Micron Technology, Inc. | Methods of removing silicon dioxide |
| US7989307B2 (en) | 2008-05-05 | 2011-08-02 | Micron Technology, Inc. | Methods of forming isolated active areas, trenches, and conductive lines in semiconductor structures and semiconductor structures including the same |
| US10151981B2 (en) * | 2008-05-22 | 2018-12-11 | Micron Technology, Inc. | Methods of forming structures supported by semiconductor substrates |
| DE102008040597A1 (de) * | 2008-07-22 | 2010-01-28 | Robert Bosch Gmbh | Mikromechanisches Bauelement mit Rückvolumen |
| US8796155B2 (en) | 2008-12-04 | 2014-08-05 | Micron Technology, Inc. | Methods of fabricating substrates |
| US8273634B2 (en) | 2008-12-04 | 2012-09-25 | Micron Technology, Inc. | Methods of fabricating substrates |
| US8247302B2 (en) | 2008-12-04 | 2012-08-21 | Micron Technology, Inc. | Methods of fabricating substrates |
| US8329046B2 (en) * | 2009-02-05 | 2012-12-11 | Asia Union Electronic Chemical Corporation | Methods for damage etch and texturing of silicon single crystal substrates |
| US8268543B2 (en) | 2009-03-23 | 2012-09-18 | Micron Technology, Inc. | Methods of forming patterns on substrates |
| US9330934B2 (en) | 2009-05-18 | 2016-05-03 | Micron Technology, Inc. | Methods of forming patterns on substrates |
| US7994062B2 (en) * | 2009-10-30 | 2011-08-09 | Sachem, Inc. | Selective silicon etch process |
| GB201005979D0 (en) * | 2010-04-09 | 2010-05-26 | Nexeon Ltd | A method of fabricating structured particles composed of silicon or a silicon-based material and their use in lithium rechargeable batteries |
| TWI404136B (zh) * | 2010-04-13 | 2013-08-01 | Univ Nat Taipei Technology | 製作底切蝕刻微結構的製程方法 |
| US8518788B2 (en) | 2010-08-11 | 2013-08-27 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US8512588B2 (en) * | 2010-08-13 | 2013-08-20 | Lawrence Livermore National Security, Llc | Method of fabricating a scalable nanoporous membrane filter |
| US8455341B2 (en) | 2010-09-02 | 2013-06-04 | Micron Technology, Inc. | Methods of forming features of integrated circuitry |
| US8575032B2 (en) | 2011-05-05 | 2013-11-05 | Micron Technology, Inc. | Methods of forming a pattern on a substrate |
| CN103035709B (zh) * | 2011-09-30 | 2015-11-25 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
| US9076680B2 (en) | 2011-10-18 | 2015-07-07 | Micron Technology, Inc. | Integrated circuitry, methods of forming capacitors, and methods of forming integrated circuitry comprising an array of capacitors and circuitry peripheral to the array |
| GB2497120A (en) * | 2011-12-01 | 2013-06-05 | Rec Wafer Norway As | Production of mono-crystalline silicon |
| US9323010B2 (en) * | 2012-01-10 | 2016-04-26 | Invensas Corporation | Structures formed using monocrystalline silicon and/or other materials for optical and other applications |
| US9177794B2 (en) | 2012-01-13 | 2015-11-03 | Micron Technology, Inc. | Methods of patterning substrates |
| US8772902B2 (en) | 2012-04-19 | 2014-07-08 | International Business Machines Corporation | Fabrication of a localized thick box with planar oxide/SOI interface on bulk silicon substrate for silicon photonics integration |
| WO2013166481A1 (en) * | 2012-05-04 | 2013-11-07 | Akrion Systems Llc | Method for consistently texturizing silicon wafers during solar cell wet chemical processing |
| US8629048B1 (en) | 2012-07-06 | 2014-01-14 | Micron Technology, Inc. | Methods of forming a pattern on a substrate |
| WO2014039034A1 (en) * | 2012-09-05 | 2014-03-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method for fabricating microelectronic devices with isolation trenches partially formed under active regions |
| US9396984B2 (en) * | 2012-09-05 | 2016-07-19 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method of producing a microelectronic device in a monocrystalline semiconductor substrate with isolation trenches partially formed under an active region |
| US9287178B2 (en) | 2012-10-01 | 2016-03-15 | Globalfoundries Inc. | Multi-gate field effect transistor (FET) including isolated fin body |
| US9005458B2 (en) * | 2013-02-26 | 2015-04-14 | Micron Technology, Inc. | Photonic device structure and method of manufacture |
| US9006066B2 (en) | 2013-04-26 | 2015-04-14 | Globalfoundries Inc. | FinFET with active region shaped structures and channel separation |
| FR3009887B1 (fr) * | 2013-08-20 | 2015-09-25 | Commissariat Energie Atomique | Procede ameliore de separation entre une zone active d'un substrat et sa face arriere ou une portion de sa face arriere |
| CN103730487B (zh) * | 2013-12-16 | 2017-07-18 | 启东吉莱电子有限公司 | 一种提高正向耐压的可控硅台面结构及其制造工艺 |
| TWI694770B (zh) | 2014-09-15 | 2020-06-01 | 美商陶氏農業科學公司 | 包含吡啶羧酸除草劑之安全的除草組成物（二） |
| CN105274626B (zh) * | 2015-10-10 | 2017-12-01 | 浙江晶科能源有限公司 | 一种用于优化黑硅表面结构的处理液及处理方法 |
| CN106990461B (zh) * | 2016-01-20 | 2020-05-15 | 安徽中科米微电子技术有限公司 | 一种直角顶角硅阶梯光栅及其制造方法 |
| US10325779B2 (en) | 2016-03-30 | 2019-06-18 | Tokyo Electron Limited | Colloidal silica growth inhibitor and associated method and system |
| US10515820B2 (en) | 2016-03-30 | 2019-12-24 | Tokyo Electron Limited | Process and apparatus for processing a nitride structure without silica deposition |
| CN106531683B (zh) * | 2016-12-29 | 2019-05-31 | 中国科学院微电子研究所 | 一种绝缘体上半导体材料衬底结构及其制备方法 |
| DE102017217713B4 (de) | 2017-10-05 | 2022-12-01 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Herstellung elektrischer Kontakte auf einer Solarzelle und Solarzelle |
| EP3916760A1 (en) * | 2020-05-28 | 2021-12-01 | Imec VZW | A method for producing an undercut in a 300 mm silicon-on-insulator platform |
| US11712766B2 (en) * | 2020-05-28 | 2023-08-01 | Toyota Motor Engineering And Manufacturing North America, Inc. | Method of fabricating a microscale canopy wick structure having enhanced capillary pressure and permeability |
| DE102021206956A1 (de) | 2021-07-02 | 2023-01-05 | Q.ant GmbH | Verfahren zum Bilden von freistehenden Mikrostrukturen an einem Diamant-Kristall und Diamant-Kristall |
| WO2023119230A1 (en) | 2021-12-22 | 2023-06-29 | L'oreal | Coagulation pathway and nicotinamide-adenine dinucleotide pathway modulating compositions and methods of their use |
Family Cites Families (66)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
| US4407058A (en) * | 1981-05-22 | 1983-10-04 | International Business Machines Corporation | Method of making dense vertical FET's |
| US4891255A (en) * | 1988-09-29 | 1990-01-02 | The United States Of America As Represented By The United States Department Of Energy | (110) Oriented silicon wafer latch accelerometer and process for forming the same |
| JPH0414868A (ja) * | 1990-05-09 | 1992-01-20 | Hitachi Ltd | 半導体記憶装置とその製造方法 |
| KR970000533B1 (ko) | 1990-12-20 | 1997-01-13 | 후지쓰 가부시끼가이샤 | Eprom 및 그 제조방법 |
| US5427975A (en) * | 1993-05-10 | 1995-06-27 | Delco Electronics Corporation | Method of micromachining an integrated sensor on the surface of a silicon wafer |
| US5536675A (en) * | 1993-12-30 | 1996-07-16 | Intel Corporation | Isolation structure formation for semiconductor circuit fabrication |
| US6465865B1 (en) * | 1996-01-05 | 2002-10-15 | Micron Technology, Inc. | Isolated structure and method of fabricating such a structure on a substrate |
| US6211039B1 (en) * | 1996-11-12 | 2001-04-03 | Micron Technology, Inc. | Silicon-on-insulator islands and method for their formation |
| JP3919921B2 (ja) | 1997-09-26 | 2007-05-30 | 三菱電機株式会社 | 半導体装置 |
| US6066869A (en) | 1997-10-06 | 2000-05-23 | Micron Technology, Inc. | Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor |
| US6528837B2 (en) | 1997-10-06 | 2003-03-04 | Micron Technology, Inc. | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor |
| US5972758A (en) * | 1997-12-04 | 1999-10-26 | Intel Corporation | Pedestal isolated junction structure and method of manufacture |
| US6297531B2 (en) * | 1998-01-05 | 2001-10-02 | International Business Machines Corporation | High performance, low power vertical integrated CMOS devices |
| US6242775B1 (en) | 1998-02-24 | 2001-06-05 | Micron Technology, Inc. | Circuits and methods using vertical complementary transistors |
| US6104068A (en) * | 1998-09-01 | 2000-08-15 | Micron Technology, Inc. | Structure and method for improved signal processing |
| WO2000042641A1 (fr) * | 1999-01-13 | 2000-07-20 | Mitsubishi Denki Kabushiki Kaisha | Procede de fabrication d'un dispositif de silicium |
| US7045468B2 (en) * | 1999-04-09 | 2006-05-16 | Intel Corporation | Isolated junction structure and method of manufacture |
| US6100162A (en) * | 1999-05-14 | 2000-08-08 | Micron Technology, Inc. | Method of forming a circuitry isolation region within a semiconductive wafer |
| US6426254B2 (en) * | 1999-06-09 | 2002-07-30 | Infineon Technologies Ag | Method for expanding trenches by an anisotropic wet etch |
| US6290863B1 (en) * | 1999-07-31 | 2001-09-18 | Micron Technology, Inc. | Method and apparatus for etch of a specific subarea of a semiconductor work object |
| US6391793B2 (en) * | 1999-08-30 | 2002-05-21 | Micron Technology, Inc. | Compositions for etching silicon with high selectivity to oxides and methods of using same |
| US6245615B1 (en) * | 1999-08-31 | 2001-06-12 | Micron Technology, Inc. | Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction |
| US6376286B1 (en) * | 1999-10-20 | 2002-04-23 | Advanced Micro Devices, Inc. | Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer |
| JP2001173734A (ja) * | 1999-12-15 | 2001-06-26 | Honda Motor Co Ltd | 車両用自動変速装置 |
| US6737356B1 (en) * | 2000-02-07 | 2004-05-18 | Micron Technology, Inc. | Method of fabricating a semiconductor work object |
| US6339241B1 (en) * | 2000-06-23 | 2002-01-15 | International Business Machines Corporation | Structure and process for 6F2 trench capacitor DRAM cell with vertical MOSFET and 3F bitline pitch |
| US6422969B1 (en) * | 2000-08-14 | 2002-07-23 | General Motors Corporation | Powertrain with a six speed planetary transmission having three planetary gear sets |
| US6425841B1 (en) * | 2000-08-28 | 2002-07-30 | General Motors Corporation | Multi-speed power transmission |
| WO2002023624A2 (en) * | 2000-09-14 | 2002-03-21 | Infineon Technologies North America Corp. | Field effect transistor and method of fabrication |
| GB2369928A (en) * | 2000-12-08 | 2002-06-12 | Mitel Corp | A method of aligning a mask to a specific crystal plane in a wafer |
| US6767614B1 (en) * | 2000-12-19 | 2004-07-27 | Wolfgang M. J. Hofmann | Multiple-level actuators and clamping devices |
| TW499729B (en) * | 2001-03-16 | 2002-08-21 | Nanya Technology Corp | Method of improving uniformity of oxide layer around trench sidewall and manufacture method of deep trench capacitor |
| JP4438247B2 (ja) * | 2001-03-29 | 2010-03-24 | アイシン・エィ・ダブリュ株式会社 | 車両用自動変速機 |
| US6566273B2 (en) * | 2001-06-27 | 2003-05-20 | Infineon Technologies Ag | Etch selectivity inversion for etching along crystallographic directions in silicon |
| US6825127B2 (en) * | 2001-07-24 | 2004-11-30 | Zarlink Semiconductor Inc. | Micro-fluidic devices |
| US20030057438A1 (en) * | 2001-09-24 | 2003-03-27 | Motorola, Inc. | Structure and method for fabricating semiconductor structures and devices utilizing lateral epitaxial overgrowth |
| TWI291736B (en) * | 2002-02-05 | 2007-12-21 | Nanya Technology Corp | Method for forming bottle-shaped trench in semiconductor substrate |
| US6784076B2 (en) * | 2002-04-08 | 2004-08-31 | Micron Technology, Inc. | Process for making a silicon-on-insulator ledge by implanting ions from silicon source |
| US6623397B1 (en) * | 2002-04-17 | 2003-09-23 | General Motors Corporation | Family of multi-speed transmission mechanisms with three non-continuously interconnected planetary gear sets |
| US6881622B2 (en) * | 2002-05-30 | 2005-04-19 | Taiwan Semiconductor Manufacturing Co., Ltd | Aqueous ammonium hydroxide amorphous silicon etch method for forming microelectronic capacitor structure |
| US6841825B2 (en) | 2002-06-05 | 2005-01-11 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
| KR100444068B1 (ko) * | 2002-06-27 | 2004-08-12 | 현대자동차주식회사 | 차량용 6속 자동 변속기의 유압 제어 시스템 |
| US6734063B2 (en) | 2002-07-22 | 2004-05-11 | Infineon Technologies Ag | Non-volatile memory cell and fabrication method |
| JP4158453B2 (ja) * | 2002-08-22 | 2008-10-01 | 株式会社デンソー | 半導体装置及びその製造方法 |
| US6774000B2 (en) * | 2002-11-20 | 2004-08-10 | International Business Machines Corporation | Method of manufacture of MOSFET device with in-situ doped, raised source and drain structures |
| US7045073B2 (en) * | 2002-12-18 | 2006-05-16 | Intel Corporation | Pre-etch implantation damage for the removal of thin film layers |
| US6902962B2 (en) * | 2003-04-04 | 2005-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon-on-insulator chip with multiple crystal orientations |
| CA2520972C (en) * | 2003-04-21 | 2010-01-26 | Sioptical, Inc. | Cmos-compatible integration of silicon-based optical devices with electronic devices |
| US6909147B2 (en) * | 2003-05-05 | 2005-06-21 | International Business Machines Corporation | Multi-height FinFETS |
| US6808994B1 (en) * | 2003-06-17 | 2004-10-26 | Micron Technology, Inc. | Transistor structures and processes for forming same |
| US6969648B2 (en) * | 2003-06-25 | 2005-11-29 | International Business Machines Corporation | Method for forming buried plate of trench capacitor |
| US7166539B2 (en) * | 2003-07-22 | 2007-01-23 | Micron Technology, Inc. | Wet etching method of removing silicon from a substrate |
| KR100568858B1 (ko) * | 2003-07-24 | 2006-04-10 | 삼성전자주식회사 | 수직 이중 채널을 갖는 ｓｏｉ 트랜지스터의 제조 방법 및그에 따른 구조 |
| US6927104B2 (en) * | 2003-09-15 | 2005-08-09 | Chartered Semiconductor Manufacturing Ltd. | Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding |
| US6963114B2 (en) * | 2003-12-29 | 2005-11-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | SOI MOSFET with multi-sided source/drain silicide |
| US7045407B2 (en) * | 2003-12-30 | 2006-05-16 | Intel Corporation | Amorphous etch stop for the anisotropic etching of substrates |
| TWI248169B (en) * | 2004-03-18 | 2006-01-21 | Nanya Technology Corp | A method for forming bottle trench and fabricating capacitor having the same |
| US7081397B2 (en) | 2004-08-30 | 2006-07-25 | International Business Machines Corporation | Trench sidewall passivation for lateral RIE in a selective silicon-on-insulator process flow |
| US7466539B2 (en) * | 2005-09-30 | 2008-12-16 | Wisconsin Alumni Research Foundation | Electrochemical double-layer capacitor using organosilicon electrolytes |
| KR100689514B1 (ko) * | 2006-01-23 | 2007-03-02 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조 방법 |
| US7628932B2 (en) | 2006-06-02 | 2009-12-08 | Micron Technology, Inc. | Wet etch suitable for creating square cuts in si |
| US7709341B2 (en) * | 2006-06-02 | 2010-05-04 | Micron Technology, Inc. | Methods of shaping vertical single crystal silicon walls and resulting structures |
| US7625776B2 (en) * | 2006-06-02 | 2009-12-01 | Micron Technology, Inc. | Methods of fabricating intermediate semiconductor structures by selectively etching pockets of implanted silicon |
| US8299341B2 (en) | 2009-05-13 | 2012-10-30 | The California Institute Of Technology | Fabrication of vertically aligned metallic nanopillars |
| JP2021011180A (ja) | 2019-07-05 | 2021-02-04 | ヤマハ発動機株式会社 | 船外機 |
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- 2007-05-31 EP EP07795580A patent/EP2030225A2/en not_active Withdrawn
- 2007-05-31 CN CN201410209104.3A patent/CN103956321A/zh active Pending
- 2007-05-31 WO PCT/US2007/012904 patent/WO2007143072A2/en active Application Filing
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| WO2007143072A3 (en) | 2008-02-14 |
| US20100013061A1 (en) | 2010-01-21 |
| US7973388B2 (en) | 2011-07-05 |
| US8294246B2 (en) | 2012-10-23 |
| EP2030225A2 (en) | 2009-03-04 |
| WO2007143072A2 (en) | 2007-12-13 |
| US7628932B2 (en) | 2009-12-08 |
| CN103956321A (zh) | 2014-07-30 |
| JP2009540539A (ja) | 2009-11-19 |
| US20070278183A1 (en) | 2007-12-06 |
| US20110260298A1 (en) | 2011-10-27 |
| US20120322263A1 (en) | 2012-12-20 |
| KR101072760B1 (ko) | 2011-10-11 |
| CN101461040A (zh) | 2009-06-17 |
| US8450214B2 (en) | 2013-05-28 |
| WO2007143072B1 (en) | 2008-04-10 |
| TW200809952A (en) | 2008-02-16 |
| JP5278768B2 (ja) | 2013-09-04 |
| KR20090015133A (ko) | 2009-02-11 |
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