TWI350657B - Clock generator with variable delay clock and method thereof - Google Patents

Clock generator with variable delay clock and method thereof

Info

Publication number
TWI350657B
TWI350657B TW096113651A TW96113651A TWI350657B TW I350657 B TWI350657 B TW I350657B TW 096113651 A TW096113651 A TW 096113651A TW 96113651 A TW96113651 A TW 96113651A TW I350657 B TWI350657 B TW I350657B
Authority
TW
Taiwan
Prior art keywords
clock
variable delay
generator
clock generator
delay clock
Prior art date
Application number
TW096113651A
Other languages
English (en)
Other versions
TW200746644A (en
Inventor
Chia Liang Lin
Gerchih Chou
Original Assignee
Realtek Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Realtek Semiconductor Corp filed Critical Realtek Semiconductor Corp
Publication of TW200746644A publication Critical patent/TW200746644A/zh
Application granted granted Critical
Publication of TWI350657B publication Critical patent/TWI350657B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
TW096113651A 2006-04-20 2007-04-18 Clock generator with variable delay clock and method thereof TWI350657B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74518806P 2006-04-20 2006-04-20

Publications (2)

Publication Number Publication Date
TW200746644A TW200746644A (en) 2007-12-16
TWI350657B true TWI350657B (en) 2011-10-11

Family

ID=39085633

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096113651A TWI350657B (en) 2006-04-20 2007-04-18 Clock generator with variable delay clock and method thereof

Country Status (3)

Country Link
US (2) US7583117B2 (zh)
CN (2) CN101183867B (zh)
TW (1) TWI350657B (zh)

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TWI462483B (zh) * 2011-06-07 2014-11-21 Himax Imaging Inc 用來產生輸出時脈訊號的時脈產生電路及相關方法
US8384456B1 (en) * 2011-11-18 2013-02-26 Texas Instruments Incorporated Integrated phase-locked and multiplying delay-locked loop with spur cancellation
US8791737B2 (en) * 2012-08-20 2014-07-29 Nanya Technology Corporation Phase-locked loop and method for clock delay adjustment
US9413394B1 (en) 2014-04-01 2016-08-09 Microsemi Storage Solutions (U.S.), Inc. Digital to-analog converter system and method
US9729157B2 (en) * 2015-02-13 2017-08-08 Macom Technology Solutions Holdings, Inc. Variable clock phase generation method and system
US11309901B2 (en) 2015-06-11 2022-04-19 Telefonaktiebolaget Lm Ericsson (Publ) Phase locked loop arrangement, transmitter and receiver and method for adjusting the phase between oscillator signals
US9503067B1 (en) * 2015-06-22 2016-11-22 Realtek Semiconductor Corporation Time shifter and method thereof
CN105024806A (zh) * 2015-08-14 2015-11-04 安徽师范大学 一种基于可逆逻辑门的加密系统的模逆电路
CN106549664B (zh) * 2015-09-22 2019-11-22 澜起科技股份有限公司 一种数字延迟锁相环及其锁定方法
CN106130543A (zh) * 2016-06-21 2016-11-16 中国电子科技集团公司第五十八研究所 一种高分辨率时钟相移架构与算法的实现方法
US10164649B2 (en) * 2016-11-30 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Hybrid phase lock loop
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DE102018130452A1 (de) * 2018-11-30 2020-06-04 Intel Corporation Ein Konzept zum Umwandeln eines thermometer-codierten Eingangssignals
CN111431524B (zh) * 2020-04-15 2022-11-11 中国科学院微电子研究所 延迟锁相环、锁相方法、多相位时钟生成电路及电子设备
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US10979059B1 (en) * 2020-10-26 2021-04-13 Ciena Corporation Successive approximation register analog to digital converter based phase-locked loop with programmable range

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Also Published As

Publication number Publication date
CN101183867B (zh) 2011-02-09
TW200746644A (en) 2007-12-16
US20070247202A1 (en) 2007-10-25
CN101183867A (zh) 2008-05-21
US7583117B2 (en) 2009-09-01
US20070247201A1 (en) 2007-10-25
US7405604B2 (en) 2008-07-29
CN101123432B (zh) 2011-11-09
CN101123432A (zh) 2008-02-13

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