TWI341548B - Methods of base formation in a bicmos process - Google Patents
Methods of base formation in a bicmos processInfo
- Publication number
- TWI341548B TWI341548B TW094106955A TW94106955A TWI341548B TW I341548 B TWI341548 B TW I341548B TW 094106955 A TW094106955 A TW 094106955A TW 94106955 A TW94106955 A TW 94106955A TW I341548 B TWI341548 B TW I341548B
- Authority
- TW
- Taiwan
- Prior art keywords
- methods
- base formation
- bicmos process
- bicmos
- formation
- Prior art date
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/708,598 US6965133B2 (en) | 2004-03-13 | 2004-03-13 | Method of base formation in a BiCMOS process |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200539262A TW200539262A (en) | 2005-12-01 |
TWI341548B true TWI341548B (en) | 2011-05-01 |
Family
ID=34919650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094106955A TWI341548B (en) | 2004-03-13 | 2005-03-08 | Methods of base formation in a bicmos process |
Country Status (4)
Country | Link |
---|---|
US (3) | US6965133B2 (zh) |
JP (1) | JP4398394B2 (zh) |
CN (1) | CN100411190C (zh) |
TW (1) | TWI341548B (zh) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102004013478B4 (de) * | 2004-03-18 | 2010-04-01 | Austriamicrosystems Ag | Verfahren zur Herstellung eines Bipolartransistors mit verbessertem Basisanschluss |
DE102004017166B4 (de) * | 2004-04-01 | 2007-10-11 | Atmel Germany Gmbh | Verfahren zur Herstellung von Bipolar-Transistoren |
US7087940B2 (en) * | 2004-04-22 | 2006-08-08 | International Business Machines Corporation | Structure and method of forming bipolar transistor having a self-aligned raised extrinsic base using self-aligned etch stop layer |
US7446007B2 (en) | 2006-11-17 | 2008-11-04 | International Business Machines Corporation | Multi-layer spacer with inhibited recess/undercut and method for fabrication thereof |
US7709338B2 (en) * | 2006-12-21 | 2010-05-04 | International Business Machines Corporation | BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices |
US7888742B2 (en) * | 2007-01-10 | 2011-02-15 | International Business Machines Corporation | Self-aligned metal-semiconductor alloy and metallization for sub-lithographic source and drain contacts |
US7952165B2 (en) * | 2007-01-10 | 2011-05-31 | International Business Machines Corporation | Heterojunction bipolar transistor (HBT) with self-aligned sub-lithographic metal-semiconductor alloy base contacts |
US7892910B2 (en) | 2007-02-28 | 2011-02-22 | International Business Machines Corporation | Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration |
US7645666B2 (en) * | 2007-07-23 | 2010-01-12 | Infineon Technologies Ag | Method of making a semiconductor device |
WO2009141753A1 (en) * | 2008-05-21 | 2009-11-26 | Nxp B.V. | A method of manufacturing a bipolar transistor semiconductor device and semiconductor devices obtained thereby |
KR101448172B1 (ko) * | 2008-07-02 | 2014-10-08 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
CN102110606B (zh) * | 2011-01-17 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | 异质结双极晶体管的形成方法及其异质结双极晶体管 |
US20120313146A1 (en) | 2011-06-08 | 2012-12-13 | International Business Machines Corporation | Transistor and method of forming the transistor so as to have reduced base resistance |
US20130277804A1 (en) * | 2012-04-20 | 2013-10-24 | International Business Machines Corporation | Bipolar junction transistors with reduced base-collector junction capacitance |
CN102790081B (zh) * | 2012-05-22 | 2015-05-06 | 清华大学 | 金属硅化物自对准锗硅异质结双极晶体管及其制备方法 |
CN102790079B (zh) * | 2012-05-22 | 2015-04-15 | 清华大学 | 金属硅化物自对准锗硅异质结双极晶体管及其制备方法 |
CN102790080B (zh) * | 2012-05-22 | 2015-04-15 | 清华大学 | 自对准抬升外基区锗硅异质结双极晶体管及其制备方法 |
CN102683395B (zh) * | 2012-05-22 | 2014-10-15 | 清华大学 | 自对准抬升外基区锗硅异质结双极晶体管及其制备方法 |
US20140073106A1 (en) | 2012-09-12 | 2014-03-13 | International Business Machines Corporation | Lateral bipolar transistor and cmos hybrid technology |
CN103035686B (zh) * | 2012-12-20 | 2015-02-18 | 清华大学 | 隐埋硅化物抬升外基区全自对准双极晶体管及其制备方法 |
US9202869B2 (en) | 2013-05-09 | 2015-12-01 | Globalfoundries Inc. | Self-aligned bipolar junction transistor having self-planarizing isolation raised base structures |
US9653477B2 (en) | 2014-01-03 | 2017-05-16 | International Business Machines Corporation | Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming |
US10032876B2 (en) | 2014-03-13 | 2018-07-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact silicide having a non-angular profile |
US9312370B2 (en) | 2014-06-10 | 2016-04-12 | Globalfoundries Inc. | Bipolar transistor with extrinsic base region and methods of fabrication |
US20150372099A1 (en) * | 2014-06-19 | 2015-12-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact silicide formation using a spike annealing process |
US10431654B2 (en) * | 2015-06-25 | 2019-10-01 | International Business Machines Corporation | Extrinsic base doping for bipolar junction transistors |
CN107731730B (zh) * | 2016-08-12 | 2020-03-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
US9761608B1 (en) * | 2016-08-15 | 2017-09-12 | International Business Machines Corporation | Lateral bipolar junction transistor with multiple base lengths |
US10818772B2 (en) | 2018-04-24 | 2020-10-27 | Globalfoundries Inc. | Heterojunction bipolar transistors with an inverted crystalline boundary in the base layer |
CN109065452A (zh) * | 2018-07-25 | 2018-12-21 | 深圳市南硕明泰科技有限公司 | 一种晶体管及其制作方法 |
CN109817522B (zh) * | 2019-01-31 | 2022-06-21 | 上海华虹宏力半导体制造有限公司 | 锗硅异质结双极型三极管器件的制造方法 |
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US4808548A (en) * | 1985-09-18 | 1989-02-28 | Advanced Micro Devices, Inc. | Method of making bipolar and MOS devices on same integrated circuit substrate |
US4935797A (en) * | 1988-10-31 | 1990-06-19 | International Business Machines Corporation | Heterojunction bipolar transistors |
US5144403A (en) * | 1989-02-07 | 1992-09-01 | Hewlett-Packard Company | Bipolar transistor with trench-isolated emitter |
US5017990A (en) * | 1989-12-01 | 1991-05-21 | International Business Machines Corporation | Raised base bipolar transistor structure and its method of fabrication |
EP0452720A3 (en) * | 1990-04-02 | 1994-10-26 | Nat Semiconductor Corp | A semiconductor structure and method of its manufacture |
US5106767A (en) * | 1990-12-07 | 1992-04-21 | International Business Machines Corporation | Process for fabricating low capacitance bipolar junction transistor |
JP2630237B2 (ja) * | 1993-12-22 | 1997-07-16 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US5455189A (en) * | 1994-02-28 | 1995-10-03 | National Semiconductor Corporation | Method of forming BICMOS structures |
US5439833A (en) * | 1994-03-15 | 1995-08-08 | National Semiconductor Corp. | Method of making truly complementary and self-aligned bipolar and CMOS transistor structures with minimized base and gate resistances and parasitic capacitance |
JPH07335773A (ja) * | 1994-06-10 | 1995-12-22 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
EP0709894B1 (en) * | 1994-10-28 | 2001-08-08 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno | High-frequency bipolar transistor structure, and related manufacturing process |
US5541121A (en) * | 1995-01-30 | 1996-07-30 | Texas Instruments Incorporated | Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer |
JPH08306700A (ja) * | 1995-04-27 | 1996-11-22 | Nec Corp | 半導体装置及びその製造方法 |
EP0766295A1 (en) * | 1995-09-29 | 1997-04-02 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Process for forming a high frequency bipolar transistor structure comprising an oblique implantation step |
KR100258436B1 (ko) * | 1996-10-11 | 2000-06-01 | 김덕중 | 상보형 쌍극성 트랜지스터 및 그 제조 방법 |
FR2756104B1 (fr) * | 1996-11-19 | 1999-01-29 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos |
JP3366919B2 (ja) * | 1997-06-27 | 2003-01-14 | エヌイーシー化合物デバイス株式会社 | 半導体装置 |
FR2779573B1 (fr) * | 1998-06-05 | 2001-10-26 | St Microelectronics Sa | Transistor bipolaire vertical comportant une base extrinseque de rugosite reduite, et procede de fabrication |
WO2000013227A2 (en) * | 1998-08-31 | 2000-03-09 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device with a bipolar transistor |
DE19845789A1 (de) * | 1998-09-21 | 2000-03-23 | Inst Halbleiterphysik Gmbh | Bipolartransistor und Verfahren zu seiner Herstellung |
FR2804247B1 (fr) * | 2000-01-21 | 2002-04-12 | St Microelectronics Sa | Procede de realisation d'un transistor bipolaire a emetteur et base extrinseque auto-alignes |
US6492238B1 (en) * | 2001-06-22 | 2002-12-10 | International Business Machines Corporation | Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit |
FR2854494A1 (fr) * | 2003-05-02 | 2004-11-05 | St Microelectronics Sa | Procede de fabrication d'un transistor bipolaire |
US7087940B2 (en) * | 2004-04-22 | 2006-08-08 | International Business Machines Corporation | Structure and method of forming bipolar transistor having a self-aligned raised extrinsic base using self-aligned etch stop layer |
-
2004
- 2004-03-13 US US10/708,598 patent/US6965133B2/en not_active Expired - Fee Related
-
2005
- 2005-03-08 TW TW094106955A patent/TWI341548B/zh not_active IP Right Cessation
- 2005-03-10 JP JP2005066770A patent/JP4398394B2/ja not_active Expired - Fee Related
- 2005-03-11 CN CNB2005100537898A patent/CN100411190C/zh not_active Expired - Fee Related
- 2005-09-21 US US11/231,385 patent/US7390721B2/en not_active Expired - Fee Related
-
2008
- 2008-05-28 US US12/128,077 patent/US7696034B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP4398394B2 (ja) | 2010-01-13 |
TW200539262A (en) | 2005-12-01 |
US20050199908A1 (en) | 2005-09-15 |
US7390721B2 (en) | 2008-06-24 |
US6965133B2 (en) | 2005-11-15 |
JP2005260239A (ja) | 2005-09-22 |
US7696034B2 (en) | 2010-04-13 |
US20080268604A1 (en) | 2008-10-30 |
US20060017066A1 (en) | 2006-01-26 |
CN100411190C (zh) | 2008-08-13 |
CN1667834A (zh) | 2005-09-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |