TWI313502B - Nano-sized metals and alloys, and methods of assembling packages containing same - Google Patents

Nano-sized metals and alloys, and methods of assembling packages containing same Download PDF

Info

Publication number
TWI313502B
TWI313502B TW094134002A TW94134002A TWI313502B TW I313502 B TWI313502 B TW I313502B TW 094134002 A TW094134002 A TW 094134002A TW 94134002 A TW94134002 A TW 94134002A TW I313502 B TWI313502 B TW I313502B
Authority
TW
Taiwan
Prior art keywords
metal
melting temperature
particle component
substantially disposed
metal particle
Prior art date
Application number
TW094134002A
Other languages
English (en)
Other versions
TW200629496A (en
Inventor
Fay Hua
C Michael Garner
Original Assignee
Intel Corporatio
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporatio filed Critical Intel Corporatio
Publication of TW200629496A publication Critical patent/TW200629496A/zh
Application granted granted Critical
Publication of TWI313502B publication Critical patent/TWI313502B/zh

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C5/00—Alloys based on noble metals
    • C22C5/02—Alloys based on gold
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F1/00—Metallic powder; Treatment of metallic powder, e.g. to facilitate working or to improve properties
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F1/00—Metallic powder; Treatment of metallic powder, e.g. to facilitate working or to improve properties
    • B22F1/17—Metallic particles coated with metal
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244—Powders, particles or spheres; Preforms made therefrom
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/1147—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1433—Application-specific integrated circuit [ASIC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0242—Shape of an individual particle
    • H05K2201/0257—Nanoparticles
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/773—Nanoparticle, i.e. structure having three dimensions of 100 nm or less
    • Y10S977/775—Nanosized powder or flake, e.g. nanosized catalyst
    • Y10S977/777—Metallic powder or flake
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12014—All metal or with adjacent metals having metal particles
    • Y10T428/12028—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12014—All metal or with adjacent metals having metal particles
    • Y10T428/12028—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • Y10T428/12049—Nonmetal component

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)
  • Powder Metallurgy (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Manufacture Of Alloys Or Alloy Compounds (AREA)

Description

.1313502 , (1) 九、發明說明 【發明所屬之技術領域】 所揭露的實施例係有關於用於微電子裝置封裝中之奈 米尺寸的金屬以及合金。 【先前技術】 積體電路（1C )晶粒通常製造成用於各種工作之處理 φ 器。1C操作總是於晶粒封裝中導致熱的產生以及熱膨脹應 力。較高融化溫度之金屬以及合金互連，雖然能承受晶粒 上密集包裝之電路所導致之高操作溫度，卻無法與經封裝 的低K層間介電質層晶粒整合，其可能具有高密度電流相 ，容性的問題。此外，較高融化溫度之金屬合金以及互連對 於製造過程中熱預算而言代價很高。
I 【發明內容及實施方式】 # 下列的說明包含諸如上、下、第一、第二等等之用語 ’其使用之目的僅爲例示性而非限制性。可以多種位置以 及方位製造、使用以及運送在此描述之裝置或物件之實施 例。“晶粒”以及“處理器”之用語通常係指經由各種程 序操作轉變成期望之積體電路裝置之基本工件的物理物體 。晶粒通常是從晶圓上單切而得，且晶圓可由半導電性材 料、非半導電性材料或半導電性以及非半導電性材料之結 合所製成。一塊板子通常係作爲晶粒用之安裝基板的浸樹 脂之纖維玻璃結構。 -4- (2) 1313502 兹將參考圖示，其中類似的結構將具有類似的參考指 定。爲了最清楚地顯示結構與方法實施例’在此包含之圖 示爲實施例的圖式代表。因此’製造出來的結構之實際外 觀，例如於顯微照片中，可能會有所不同’但仍含有實施 例之主要結構。此外，這些圖示僅顯示了解實施例所需之 結構。並未包含將此技藝中額外的結構以維持圖示之明晰 〇 第1圖爲根據一實施例包含金屬粒子成分100之顯微照 片的電腦影像的剖面圖。金屬粒子成分1 00包含少於約20 奈米（nm)範圍內之總粒子尺寸。於一實施例中，金屬粒 子成分1〇〇包含介於約5 nm至20 nm的範圍內之總粒子尺寸 。於一實施例中，金屬粒子成分1〇〇包含約98 %少於或等於 約2 0 nm的範圍內之總粒子尺寸。於一實施例中，金屬粒 子成分1〇〇包含可以這些尺寸範圍製造之任何金屬粒子或 合金粒子。 於一實施例中，金屬粒子成分包含等於或低於約 40 〇°C之融化溫度。取決於金屬種類與粒子尺寸，金屬粒 子成分之融化溫度可具有數百度的改變。例如，金具有約 1 0 64 °c之融化溫度。當將金以此處提出之奈米尺寸形成時 ，融化溫度可約爲3 00 t。 於一實施例中，金屬粒子成分包含具有小於或等於約 20 nm的範圍內之粒子尺寸的第一金屬110，以及第—金屬 110以純金屬單獨或以肉眼可見的單相合金方式存在。於 —實施例中，金屬粒子成分包含銀（Ag)。於一實施例中 (3) .1313502 ，金屬粒子成分包含銅（Cu)。於一實施例中，金屬粒子 成分金（Au)。於一實施例中，金屬粒子成分包含金錫合 金（Au80Sn2 0)。於一實施例中，金屬粒子成分包含錫（ Sn)。於一實施例中，金屬粒子成分包含上述金屬粒子成 分之至少兩個的結合。於一實施例中，金屬粒子成分述金 屬粒子成分之至少三個的結合。 第1圖描述另一實施例，諸如Au80Sn20金屬粒子成分 • ，其包含作爲核心結構包含金之第一金屬110以及作爲殼 結構包含錫之第二金屬112。於一實施例中，第一金屬110 包含銀且第二金屬11 2係選自銅、金、鉛以及錫。於一實 施例中，第一金屬110包含金且第二金屬11 2係選自銅、銀 、鉛以及錫。於一實施例中，第一金屬Π 0包含錫且第二 金屬η 2係選自銅、銀、金以及鉛。於一實施例中，上述 第一金屬110、第二金屬11 2金屬粒子成分之任一包含第一 金屬比第二金屬以較大的量存在。 # 於一實施例中，第一金屬110具有第一融化溫度，以 及第二金屬112具有小於第一融化溫度之第二融化溫度。 於此實施例中，第一金屬Π0可爲金，以及第二金屬]12可 爲錫。 第2圖爲根據一實施例包含金屬粒子成分200之顯微照 片的電腦影像的剖面圖。於一實施例中，金屬粒子成分 200包含第一金屬210、第二金屬內殻212以及第三金屬外 殼2 1 4。於此實施例中，第一金屬2 1 0組態成實質的核心結 構、第二金屬內殻2〗2組態成與核心結構210相連之實質的 -1313502 • (4) 內殼結構以及第三金屬外殼214組態成與內殼結構212相連 之外殼結構2 1 4。 於一實施例中，核心2 1 0包含第一融化溫度，以及實 ，質的外殻2 1 4具有比第一融化溫度更高的第三融化溫度。 , 於一實施例中’核心2 1 0具有第一融化溫度，以及實質的 外殼2 1 4具有比第一融化溫度更小的第三融化溫度。於一 實施例中’核心210可爲諸如金之第一金屬210，以及外殼 • 214可爲諸如錫之第三金屬214。 第3圖爲根據一實施例包含金屬粒子成分3 〇〇之顯微照 片的電腦影像的剖面圖。金屬粒子成分3 00包含實質上組 態於第一部分中之第一金屬3 1 0以及實質上組態於第二部 .分中之第二金屬312。於一實施例中，第一部分310與第二 > 部分312相連’但一部分並未包含另一部分或被另一部分 包含。於一實施例中，第一部分310以及第二部分31 2包含 集塊，以及第一部分310與第二部分312的至少之一具有從 • 約0.5··〗，包含約1:1，至約1:2的範圍內的孔徑比。因此， 第一或第二部分310、312之一的最小尺寸可爲約5 nm般地 小，且第一或第二部分310、312之一的最大尺寸可爲約20 nm般地大。惟，於一實施例中，第一或第二部分310、312 之一的有效最小尺寸可爲20 nm般地大，以及一或第二部 分310、312之一的最小尺寸可藉由選擇自於此揭露中提出 的孔徑比實施例之一而予以確定。 於一實施例中，於此揭露中提出的第一金屬與第二金 屬粒子成分之一可用於第3圖所示之金屬粒子成分300。 (5) 1313502 第4圖爲根據一實施例之包含晶粒連接金屬粒子成分 的封裝的剖面。封裝400包含第一晶粒410以及將第一晶粒 410黏至安裝基板414的晶粒連接金屬粒子成分4〗2。於一 實施例中，金屬粒子成分4 1 2爲於此揭露中提出的任何金 屬粒子成分。 第一晶粒4 1 0經由晶片接合墊4 1 6、接合線4 1 8以及安 裝基板接合指狀物4 2 0電性耦接安裝基板4 1 4。此外，封裝 φ 400可進一步包含諸如一系列的凸塊之電性連結，其中之 —係以參考符號422標不’以進一步裝置於例如母板上。 於一實施例中，安裝基板4 1 4爲諸如主機板之印刷電 線板（PWB )之一部分。於一實施例中，安裝基板4 1 4爲 中介物（interposer )的一部分。於一實施例中，安裝基 板414爲中層PWB之一部分於一實施例中，安裝基板414爲 擴充板PWB之一部分。於一實施例中，安裝基板414爲諸 如例如爲手機或個人行動助理（PDA )的手持裝置用之小 Φ 型PWB之一部分。 第5 A圖爲根據一實施例之微電子裝置封裝5 00的剖面 。微電子裝置封裝5 00包含含有主動表面512以及後側表面 5 1 4之晶粒5 1 0。於一實施例中，晶粒5 1 0爲處理器，如由 英特爾公司製造之處理器。於一實施例中’熔焊粒子成分 膏516係提供至主動表面512上。嵌入式接合墊518設於主 動表面512上以及嵌入式接合墊518與熔焊粒子成分膏516 接觸。於一實施例中，晶粒係設置於積體散熱器（IHS )520以及安裝基板5 22之間。熔焊粒子成分膏51 6係位在 .1313502 • (6) 安裝基板接合墊5 24之上。熔焊粒子成分膏5 1 6接觸晶粒 510的主動表面512。於一實施例中，熔焊粒子成分膏516 可爲此揭露中提出的任何金屬粒子成分。 安裝基板522可爲此技藝中任何已知的安裝基板，如 印刷電路板（PCB )、主機板、母板、中層板、擴充卡或 另一安裝基板。於一實施例中，熱介面材料（TIM ) 5 26設 置於晶粒510的後側表面514與IHS 5 20之間。於一實施例 Φ 中，TIM 5 2 6爲根據此揭露中提出任何實施例的金屬粒子 成分。於一實施例中，TIM 526爲銲料。於一實施例中， TIM 5 26爲在回焊過程中化學接合後側表面514之反應性金 屬粒子成分。於一實施例中，TIM 526爲金屬粒子成分，
, 如鑽石充塡銲料或碳纖維充塡銲料。於一實施例中，TIM 爲包含小於或等於約2 Ομιη的顆粒尺寸之回焊金屬粒子成分 〇 於一實施例中，IHS 520連接有接合材料528，以將 鲁 IHS 520之唇部53 0固定至接合材料5 2 8。可做出微電子裝 置封裝500的變異以適應數種金屬粒子成分實施例之一的 使用。 第5Β圖爲第5Α圖中所示之微電子裝置封裝501經進一 步處理後之剖面。可藉由熱處理將金屬粒子成分膏516回 焊成焊凸塊517以及金屬粒子成分TIM 52 6或與晶粒510連 結之它們之一。於一實施例中，提供熱量以達到接近或達 到特定焊凸塊517或TIM 526之固相線（solidus)溫度。於 一實施例中，焊凸塊517或TIM 5 2 6描述成加熱至從約 J313502 , (7) 15 0°C到約200°C的範圍。於一實施例中，焊凸塊517或TIM 52 6加熱至從約170 °C到約2 00 °C的範圍。於一實施例中，焊 凸塊517或TIM 526加熱至從約180 t。於一實施例中，平 . 均顆粒尺寸在小於或等於約2 0 μηι之範圍內。 ，第6Α圖爲根據一實施例於處理過程中微電子裝置600 之剖面。諸如可爲處理器之晶粒的基板610包含用於使基 板610與其外界電性通訊之接合墊612。微電子裝置600描 Φ 述成藉由將接合墊612暴露的圖案化之遮罩處理。於一實 施例中，接合墊612爲可與數個金屬化層之任一接觸之銅 上金屬化層。例如，於簡單的微電子裝置中諸如金屬一（ Ml，未圖示）的金屬化層與接合墊612電性接觸。於另一 . 範例中，諸如金屬二（M2，未圖示）的金屬化層與接合墊 _ 6 1 2電性接觸。M2與Μ 1電性接觸。於另一範例中，諸如金 屬三（M3’未圖示）的金屬化層與接合墊612電性接觸。 M3與M2電性接觸。於另一範例中，諸如金屬四（Μ4，未 Φ 圖示）的金屬化層與接合墊6 1 2電性接觸。Μ 4與Μ 3電性接 觸。M3與M2電性接觸，而其又與Ml電性接觸。於另一範 例中’諸如金屬五（M5，未圖示）的金屬化層與接合墊 612電性接觸。M5與M4電性接觸。M4與M3電性接觸。M3 與M2電性接觸，而其又與Μ 1電性接觸。於另一範例中， 諸如金屬六（Μ6，未圖示）的金屬化層與接合墊612電性 接觸。Μ6與Μ5電性接觸。Μ5與Μ4電性接觸。Μ4與M3電 性接觸。M3與M2電性接觸，而其又與Ml電性接觸。於另 —範例中，諸如金屬七（M7，未圖示）的金屬化層與接合 -10- (8) 1313502 墊612電性接觸。：^7與1^6電性接觸。1^6與厘5電性接觸。 Μ 5與Μ 4電性接觸。M4與M3電性接觸。Μ 3與M2電性接觸 ，而其又與Μ 1電性接觸。藉由此揭露，很明顯地各種半導 體基板可用於各種實施例中。 .第6Β圖爲第6Α圖中所示之微電子裝置601經進一步處 理後之剖面。圖案化的遮罩612，其於一實施例中爲圖案 化的光阻，已塡充有根據此揭露中提出的各種實施例之金 # 屬粒子成分先質616，如經熔金屬粒子成分粉末616，亦稱 爲焊粒子成分霄616。 於一實施例中，金屬粒子成分膏616包含於處理過程 中之助熔工具，作爲金屬粒子成分膏616之短效黏結劑（ fugitive binder)。於一實施例中，並未執行圖案化本身 ，而是形成覆蓋式的經熔金屬粒子成分，且於回焊期間， 使助熔工具流體化並較佳地弄濕接合墊612，且較佳地使 經熔金屬粒子成分排斥基板610，其可爲半導電性、介電 #性以及其之結合。 第6C圖爲第6B圖中所示之微電子裝置6 02經進一步處 理後之剖面。於一實施例中，已移除圖案化的遮罩614。 可藉由簡單地將圖案化的遮罩614自基板610撥離而予以移 除，藉此留下金屬粒子成分616直接形成分離之島狀物於 接合墊6 1 2上。 第7圖爲第6C圖中所示之微電子裝置的一部分的放大 。第7圖取自第6C圖中所示的虛線內的面積。第7圖描繪於 黏塗及熔化矩陣720 (第7圖）中作爲金屬粒子成分71 8之 -11 - J313502 » (9) 金屬粒子成分先質。金屬粒子成分718包含於此揭露中提 出之粒子成分實施例之一。由於黏塗及熔化矩陣720實質 上保護金屬粒子成分718不受腐蝕及/或氧化的影響，金屬 粒子成分7 1 8於回焊期間可抵抗實質的顆粒生長。於一實 施例中，金屬粒子成分718於回焊後具有小於或等於約20 微米（μηι)範圍內的顆粒尺寸。由於粒子尺寸實施例，可 在約4 0 0 °C或更低開始粒子之成核，以從固體轉變至固相 # 線。例如，金可在約3 00°C經歷固體至固相線轉變。 第6D圖爲第6C圖中所示之微電子裝置6 03經進一步處 理後之剖面。已開始一回焊程序，於該程序過程中，已使 黏塗及熔化矩陣720揮發，且金屬粒子成分718回焊成焊凸 塊617 (第6D圖），其具有小於或等於約20μηι的範圍內的 顆粒尺寸。微電子裝置603所描繪之回焊程序可在組裝微 電子裝置封裝之方法前進行，亦可與微電子裝置封裝的其 他熱處理同時進行，或可在包含金屬粒子成分晶粒連接實 • 施例之形成的微電子裝置封裝的一些元件之組裝後進行。 這些以及其他實施例稍後討論。 第8Α圖爲根據一實施例於處理過程中微電子裝置800 的剖面。此裝置800包含含有複數個晶粒接合墊812之晶粒 8 10。裝置800亦包含根據於此揭露中提出之金屬粒子成分 實施例的任一之金屬粒子成分8 1 4。晶粒8 1 0透過金屬粒子 成分814耦合安裝基板816，而金屬粒子成分814作爲其兩 者間之電性凸塊。晶粒8 1 0至安裝基板8 1 6之電性耦合係藉 由與複數個晶粒接合墊8 I 2對齊之安裝基板接合墊8 1 8完成 -12- J313502 - (10) 。藉由複數個板子凸塊進行微電子裝置800進一步的通訊 ’複數個板子凸塊其中之一以參考符號820標示。 桌8B圖爲桌8A圖中所不之微電子裝置800經進一步處 .理後的剖面。微電子裝置8 0 1包含晶粒8 1 0於已裝置於一板 • 子822上之安裝基板816上。於一實施例中，板子822已經 由板子凸塊822接合至安裝基板816。於一實施例中，板子 凸塊8 2 2包含於此揭露中提出之任何金屬粒子成分實施例 •。 於此揭露中提出之電子凸塊實施例亦可應用至線接合 技術。當融化溫度在約400°或更低的範圍內開始時，線 接合之程序可在節省線接合裝置之熱預算的條件下進行。 第9圖爲根據各種實施例之程序流程圖900。在形成晶 粒連結以及/或焊凸塊之程序期間，以及在組裝封裝晶粒 之方法期間分別執行經熔金屬粒子成分之處理。於9 1 0， 在晶粒上圖案化經熔金屬粒子成分實施例。譬如於第4圖 φ 中，晶粒連接金屬粒子成分412用於將晶粒410連接至安裝 基板414。又譬如於第6B圖中，圖案化之遮罩614已塡充有 經熔金屬粒子成分6 1 6。 於920，於晶粒上回焊熔焊粒子成分實施例。譬如於 第5B圖中，回焊的金屬粒子凸塊517以及回焊的TIM 5 26係 描述成在比如肉眼可見的塊狀材料般的個別金屬之融化溫 度顯著地更低之溫度形成金屬成分。於92 1中，程序流程 可從經熔金屬粒子成分之回焊程序進至將晶粒組裝成封裝 之方法。於922，完成一程序實施例。 -13- Ί313502 , (11) 選擇性地’於線接合技術中，在將線接合焊凸塊置於 晶粒上的期間’逐次地執行經熔金屬粒子成分粉末的圖案 化程序。 .於930 ’包含焊料或經熔金屬粒子成分之晶粒係組裝 . 成封裝。譬如’第5A與5B圖描繪具有至少一個安裝基板 5 2 2之晶粒5 1 2的組裝。於—實施例中，J η S 5 2 〇或其他散 熱基板亦可以經熔金屬粒子成分組裝或晶粒5 1 0以焊凸塊 # 5 1 7組裝。於9 3 1 ’程序流程可從將晶粒組裝成封裝的方法 進至將金屬粒子成分回焊成晶粒連接以及/或焊凸塊之程 序。於932，完成一方法實施例。 第1 0圖爲描繪根據一實施例之計算系統】〇 〇 〇的剖視正 . 視圖。金屬粒子成分、晶粒連接成份以及/或焊凸塊成份 . 的上述實施例之一或更多可利用於計算系統中，諸如第1〇 圖之計算系統。此後，任何實施例單獨或結合任何其他實 施例係稱爲金屬粒子成分實施例。 # 計算系統1000包含例如包圍於封裝1010中之至少一處 理器（未圖示）、資料儲存系統ιοί2'如鍵盤1014之至少 —輸入裝置以及諸如監視器1016之至少一輸出裝置。計算 系統1 000包含處理器，以處理資料訊號，且可包含例如可 由英特爾公司取得之微處理器。除了鍵盤1014之外，計算 系統1000可包含另一使用者輸入裝置’如滑鼠。計算系統 1 000可對應裝置400、501以及801之任一者，其包含晶粒 、安裝基板以及板子。因此’封裝〗〇 1 〇 (包含晶粒）以及 板子1 02 0可對應這些結構。 -14- •1313502 • (12) 爲了此揭露之目的，體現根據欲請求專利保護的標的 之構件的計算系統1 00可包含利用微電子裝置系統的任何 系統’其可包含例如耦合至資料儲存之（諸）金屬粒子成 • 分實施例之至少之一，資料儲存例如爲隨機存取記憶體（ - DRAM )、聚合體記憶體、快閃記憶體以及相位變化（ phase _ change )記憶體。於此實施例中，（諸）金屬粒子 成分實施例藉由耦合至處理器而耦合至這些功能的任何結 # 合。惟’於—實施例中，於此揭露中提出的（諸）金屬粒 子成分實施例係耦合至這些功能的任一。對於一範例實施 例’資料儲存包含於晶粒上之嵌入式dram快取。此外， 於一實施例中，耦合至處理器（未圖示）之（諸）金屬粒 _ 子成分實施例係具有耦合至DRAM快取之資料儲存的（諸 )金屬粒子成分實施例的系統之一部分。此外，於一實施 例中’（諸）金屬粒子成分實施例係耦合至資料儲存1〇12 〇 ^ 於一實施例中’計算系統亦可包含晶粒，其含由數位 訊號處理器（DSP )、微控制器、專門應用積體電路（ ASIC)或微處理器。於此實施例中，（諸）金屬粒子成分 實施例藉由耦合至處理器而耦合至這些功能的任何結合。 對於一範例實施例，DSP (未圖示）爲晶片組的一部分， 該晶片組包含獨立處理器（於封裝1 〇 1 〇 )以及D S P作爲板 子1 0 2 0上之晶片組的個別的部分。於此實施例中，（諸） 金屬粒子成分實施例耦合至DSP，且可存在耦合至封裝 1 〇 1 〇中之處理器的個別的（諸）金屬粒子成分實施例。此 -15- •1313502 . (13) 外’於一實施例中’（諸）金屬粒子成分實施例耦合至裝 置於與封裝】010相同的板子1020上的DSP。茲可清楚了解 到（諸）金屬粒子成分實施例可與有關計算系統1 〇〇〇所提 出者結合，與藉由此揭露之各種實施例所提出之（諸）金 .屬粒子成分實施例及其等效者結合。 於此揭露中所提出的金屬粒子成分實施例可應用於傳 統電腦以外的裝置或設備。例如，可以（諸）金屬粒子成 φ 分實施例封裝晶粒，並置於行動裝置中，如無線通訊器或 手持裝置，如個人資料助理之類者。另一範例係晶粒可以 (諸）金屬粒子成分實施例封裝並置於運載工具中，如汽 車、機車、船、飛機或太空船》 提出[摘要]以符合37C.F.R § 1.72 ( b )要求一摘要能 允許讀者迅速地確定技術揭露之性質與主旨。此摘要不應 用於解釋或限制申請專利範圍之範圍與涵義。 於上述[實施方式]中，爲了使揭露流暢而將各種特徵 # 聚集於單一個實施例中。此揭露之方法不應被視爲表現欲 申請專利保護之本發明的實施例需要比申請專利範圍的每 一項中明確描述的更多的特徵之意圖。更確切地來說，如 同下列申請專利範圍所表現，具發明性之標地係比單一揭 露實施例所有特徵更少。因此，下列申請專利範圍在此包 含於[實施方式]中，其中每一項申請專利範圍可單獨成立 作爲單獨的較佳實施例。 對於熟悉該項技藝者可迅速了解到可對已描述用來解 釋本發明性質之部件以及方法階段的細節、材料以及配置 -16- J313502 ， (14) 做出各種的其他改變而不悖離於所附申請專利範圍中明確 提出之本發明的原理與範疇。 【圖式簡單說明】 .爲了 了解獲得實施例之方式’藉由參考附圖提供各種 實施例的更特定之說明。應了解到這些圖僅顯示並非絕對 按照實際尺寸描繪之典型的實施例，並因此不該被視爲實 • 施例範圍之限制，某些實施例將使用附圖以額外的明確性 與細節加以描述與解釋，附圖中： 第1圖爲根據一實施例包含焊料粒子成分之顯微照片 的電腦影像的剖面； 第2圖爲根據一實施例包含焊料粒子成分之顯微照片 的電腦影像的剖面； 第3圖爲根據一實施例包含焊料粒子成分之顯微照片 的電腦影像的剖面； • 第4圖爲根據一實施例之微電子裝置封裝的剖面正視 圖， 第5 A圖爲根據一實施例之微電子裝置封裝的剖面； 第5B圖爲第5A圖中所示之微電子裝置封裝經進一步處 理後之剖面； 第6A圖爲根據一實施例於處理過程中微電子裝置之剖 面； 第6B圖爲第6A圖中所示之微電子裝置經進一步處理後 之剖面； -17- (15) J313502 第6C圖爲第6B圖中所示之微電子裝置經進一步處理後 之剖面； 第6D圖爲第6C圖中所示之微電子裝置經進一步處理後 之剖面； 第7圖爲第6C圖中所示之微電子裝置的一部分的放大 > 第8 A圖爲根據一實施例於處理過程中微電子裝置的 φ面； 第8B圖爲第8A圖中所示之微電子裝置經進一步處理@ 的剖面； 第9圖爲根據各種實施例之程序流程圖；以及 第1 〇圖爲根據一實施例之計算系統之描繪。 【主要元件符號說明】 1〇〇 :金屬粒子成分 • 1 10 :第-金屬 1 12 :第二金屬 200 :金屬粒子成分 2 1 〇 :核心結構 212 :第二金屬內殼 2 1 4 ··第三金屬外殻 3 00 :金屬粒子成分 310 :第一金屬 312 :第二金屬 -18- (16) (16)•1313502 400 :封裝 4 1 0 :第一晶粒 412:金屬粒子成分 4 1 4 :安裝基板 4 1 6 :晶片接合墊 4 1 8 ·接合線 4 2 0 :安裝基板接合指狀物 422 :凸塊 5 00 :微電子裝置封裝 501 :微電子裝置封裝 5 1 0 :晶粒 5 1 2 :主動表面 5 1 4 :後側表面 5 1 6 :焊粒子成分膏 5 1 7 :焊凸塊 518:嵌入式接合墊 5 2 0 :積體散熱器 522 :安裝基板 5 24 :安裝基板接合墊 526:熱介面材料 5 2 8 :接合材料 5 3 0 :唇部 600 :微電子裝置 601 :微電子裝置 -19- (17) (17)•1313502 602 :微電子裝置 603 :微電子裝置 6 1 0 :基板 6 1 2 :接合墊 6 1 4 :遮罩 616:金屬粒子成分 7 1 8 :金屬粒子成分 720 :黏塗及熔化矩陣 800 :微電子裝置 801 :微電子裝置 8 1 0 :晶粒 8 1 2 :晶粒接合墊 8 1 4 :金屬粒子成分 8 1 6 :安裝基板 8 1 8 :安裝基板接合墊 820 :板子凸塊 822 :板子 9 0 0 :流程圖 1 000 :計算系統 1 0 1 0 :封裝 1 0 1 2 :資料儲存系統 1014 :鍵盤 1 0 1 6 :監視器 1 0 2 0 ·•板子 -20

Claims (1)

  1. 131^502 十、申請專利範圍 附件功： 第094 1 3 4〇02號專利申請案 中文申請專利範圍替換本 . 民國96年12月21日修正 _ 1. 一種金屬粒子成分，包含： 第一金屬，包含在少於或等於約20奈米（nm)範圍中 之粒子尺寸；及 # 第二金屬， 其中該第一金屬選自銅、銀、金、鉛以及錫，其中該 第二金屬選自銅、銀、金、鉛以及錫，且其中該金屬成分 包含等於或低於約3 00 °C之融化溫度。 / 2.如申請專利範圍第1項之金屬粒子成分，其中該第 • 一金屬選自銀、金、鉛以及錫，其中該第二金屬選自銅、 銀、金、鉛以及錫，其中該第一金屬以較該第二金屬爲大 的量存在。 • 3 .如申請專利範圍第1項之金屬粒子成分，其中該第 一金屬包含金，其中該第二金屬包含錫，且其中該錫包含 該第一金屬以及該第二金'屬之約2 0 %。 4. 如申請專利範圍第1項之金屬粒子成分，進一步包 含有機矩陣，其含有焊料成分作爲複數個粒子。 5. 如申請專利範圍第1項之金屬粒子成分，進一步包 含有機矩陣，其含有焊料成分作爲複數個粒子，且其中該 有機矩陣進一步包含焊料焊劑。 6.如申請專利範圍第1項之金屬粒子成分，其中該第 1313502 c * 一金屬實質上配置於核心中，且其中該第二金屬實質上配 置於殼中。 7.如申請專利範圍第1項之金屬粒子成分，其中該第 一金屬實質上配置於核心中，其中該第二金屬實質上配置 於殼中，其中該第一金屬包含第一融化溫度，其中該第二 金屬包含第二融化溫度，且其中該第一融化溫度比該第二 融化溫度低。 8 .如申請專利範圍第1項之金屬粒子成分，其中該第 一金屬實質上配置於核心中，其中該第二金屬實質上配置 於殼中，其中該第一金屬包含第一融化溫度，其中該第二 金屬包含第二融化溫度，且其中該第二融化溫度比該第一 融化溫度低。 9.如申請專利範圍第1項之金屬粒子成分，進一步包 含第三金屬，其中該第一金屬實質上配置於內殼中，其中 該第三金屬實質上配置於外殼中，其中該第一金屬包含第 一融化溫度，其中該第三金屬包含第三融化溫度，且其中 該第一融化溫度比該第三融化溫度低。 1 〇 .如申請專利範圍第1項之金屬粒子成分，進一步包 含第三金屬，其中該第一金屬實質上配置於內殼中，其中 該第三金屬實質上配置於外殼中，其中該第一金屬包含第 一融化溫度，其中該第三金屬包含第三融化溫度，且其中 該第三融化溫度比該第一融化溫度低。 1 1 .如申請專利範圍第1項之金屬粒子成分，其中該第 一金屬實質上配置於核心中，其中該第二金屬實質上配置 -2- 1313502 於殼中，且其中該核心包含比該殼更大的體積。 1 2.如申請專利範圍第1項之金屬粒子成分，進一步包 含第三金屬，其中該第一金屬實質上配置於核心中’其中 該第二金屬實質上配置於與該核心相連之第一殻中’且其 中該第三金屬實質上配置於與該第一殼相連之第二殼中。 13.如申請專利範圍第1項之金屬粒子成分’其中該第 一金屬實質上配置於第一部分中，且其中該第二金屬實質 0 _h@S®於'第二部分中，且其中該實質上的第一部分以及該 實質上的第二部分之每一個具有在從ο·5:1至約1:2範圍內 之寬高比。 1 4 . 一種方法’包含： ' 回焊包含第一金屬核心及第二金屬殼之金屬粒子成分 • ，該第一金屬包含在少於或等於約20奈米（nm )範圍內之 粒子尺寸，其中該第一金屬核心選自銅、銀、金、鉛以及 錫，且其中該第二金屬殼選自銅、銀、金、鉛以及錫。 # 15.如申請專利範圍第14項之方法，其中該回焊係在 條件下執行以達成回焊狀態，且其中於回焊狀態中之金屬 粒子成分包含在少於或等於約20微米（μηι )之範圍中的顆 粒尺寸。 1 6 ·如申請專利範圍第1 4項之方法，其中該回焊包含 低於400 t之回焊溫度。 1 7 ·如申請專利範圍第1 4項之方法，其中該回焊於選 自由微電子晶粒、第二級安裝基板、第一級板以及散熱器 組成之群組的至少一結構中發生。
TW094134002A 2004-09-30 2005-09-29 Nano-sized metals and alloys, and methods of assembling packages containing same TWI313502B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/957,196 US7524351B2 (en) 2004-09-30 2004-09-30 Nano-sized metals and alloys, and methods of assembling packages containing same

Publications (2)

Publication Number Publication Date
TW200629496A TW200629496A (en) 2006-08-16
TWI313502B true TWI313502B (en) 2009-08-11

Family

ID=36099546

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094134002A TWI313502B (en) 2004-09-30 2005-09-29 Nano-sized metals and alloys, and methods of assembling packages containing same

Country Status (10)

Country Link
US (1) US7524351B2 (zh)
EP (1) EP1793949B1 (zh)
JP (1) JP2008515635A (zh)
KR (2) KR101060405B1 (zh)
CN (2) CN101084079B (zh)
AT (1) ATE471780T1 (zh)
DE (1) DE602005021974D1 (zh)
HK (2) HK1111123A1 (zh)
TW (1) TWI313502B (zh)
WO (1) WO2006132663A2 (zh)

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7524351B2 (en) 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US8637127B2 (en) 2005-06-27 2014-01-28 Kennametal Inc. Composite article with coolant channels and tool fabrication method
US7615476B2 (en) 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US7687156B2 (en) 2005-08-18 2010-03-30 Tdy Industries, Inc. Composite cutting inserts and methods of making the same
US8312941B2 (en) 2006-04-27 2012-11-20 TDY Industries, LLC Modular fixed cutter earth-boring bits, modular fixed cutter earth-boring bit bodies, and related methods
KR20070115660A (ko) * 2006-05-30 2007-12-06 마쯔시다덴기산교 가부시키가이샤 솔더 페이스트
WO2008051588A2 (en) 2006-10-25 2008-05-02 Tdy Industries, Inc. Articles having improved resistance to thermal cracking
EP1918063A1 (de) * 2006-11-02 2008-05-07 Siemens Aktiengesellschaft Komposit-Lötpulver aus Kern und metallischer Hülle, zum Löten von Turbinenbauteilen
US7758916B2 (en) * 2006-11-13 2010-07-20 Sulzer Metco (Us), Inc. Material and method of manufacture of a solder joint with high thermal conductivity and high electrical conductivity
WO2009090748A1 (ja) * 2008-01-17 2009-07-23 Applied Nanoparticle Laboratory Corporation 複合銀ナノ粒子、その製法及び製造装置
US8790439B2 (en) 2008-06-02 2014-07-29 Kennametal Inc. Composite sintered powder metal articles
US8322465B2 (en) * 2008-08-22 2012-12-04 TDY Industries, LLC Earth-boring bit parts including hybrid cemented carbides and methods of making the same
US8025112B2 (en) 2008-08-22 2011-09-27 Tdy Industries, Inc. Earth-boring bits and other parts including cemented carbide
US9095898B2 (en) 2008-09-15 2015-08-04 Lockheed Martin Corporation Stabilized metal nanoparticles and methods for production thereof
US8105414B2 (en) * 2008-09-15 2012-01-31 Lockheed Martin Corporation Lead solder-free electronics
US8486305B2 (en) 2009-11-30 2013-07-16 Lockheed Martin Corporation Nanoparticle composition and methods of making the same
US8272816B2 (en) 2009-05-12 2012-09-25 TDY Industries, LLC Composite cemented carbide rotary cutting tools and rotary cutting tool blanks
US8308096B2 (en) * 2009-07-14 2012-11-13 TDY Industries, LLC Reinforced roll and method of making same
US9072185B2 (en) 2009-07-30 2015-06-30 Lockheed Martin Corporation Copper nanoparticle application processes for low temperature printable, flexible/conformal electronics and antennas
US9011570B2 (en) 2009-07-30 2015-04-21 Lockheed Martin Corporation Articles containing copper nanoparticles and methods for production and use thereof
US9643236B2 (en) 2009-11-11 2017-05-09 Landis Solutions Llc Thread rolling die and method of making same
US8834747B2 (en) * 2010-03-04 2014-09-16 Lockheed Martin Corporation Compositions containing tin nanoparticles and methods for use thereof
US10544483B2 (en) 2010-03-04 2020-01-28 Lockheed Martin Corporation Scalable processes for forming tin nanoparticles, compositions containing tin nanoparticles, and applications utilizing same
TWI380869B (zh) * 2010-03-08 2013-01-01 Ying Tung Chen Welding materials containing diamond particles
WO2011140829A1 (en) * 2010-05-14 2011-11-17 The University Of Hong Kong Solid supported gold nanoparticles, methods of use thereof, and methods for making same
NL2005112C2 (en) * 2010-07-19 2012-01-23 Univ Leiden Process to prepare metal nanoparticles or metal oxide nanoparticles.
FR2965719B1 (fr) * 2010-10-07 2014-05-23 Oreal Particule comportant deux metaux plasmoniques
JP2012209148A (ja) * 2011-03-30 2012-10-25 Sony Corp 導電性粒子、導電性ペースト、及び、回路基板
KR20120126364A (ko) * 2011-05-11 2012-11-21 에스케이하이닉스 주식회사 반도체 칩 모듈 및 이를 갖는 플래나 스택 패키지
US8800848B2 (en) 2011-08-31 2014-08-12 Kennametal Inc. Methods of forming wear resistant layers on metallic surfaces
CN103619529B (zh) * 2011-09-02 2015-05-06 三菱综合材料株式会社 焊料粉末以及使用该粉末的焊料用浆料
US9016406B2 (en) 2011-09-22 2015-04-28 Kennametal Inc. Cutting inserts for earth-boring bits
JP2013081966A (ja) * 2011-10-06 2013-05-09 Fujitsu Ltd 導電性接合材料、並びに導体の接合方法、及び半導体装置の製造方法
CN103358047B (zh) * 2011-11-02 2016-04-20 兰州大学 用于微/纳米尺度焊接的一维锡银铜三元纳米焊料
WO2013120109A2 (en) 2012-02-10 2013-08-15 Lockheed Martin Corporation Photovoltaic cells having electrical contacts formed from metal nanoparticles and methods for production thereof
US9005483B2 (en) 2012-02-10 2015-04-14 Lockheed Martin Corporation Nanoparticle paste formulations and methods for production and use thereof
JP6079375B2 (ja) * 2013-03-29 2017-02-15 三菱マテリアル株式会社 ハンダ粉末及びその製造方法並びにこの粉末を用いたハンダ用ペースト
JP6079374B2 (ja) * 2013-03-29 2017-02-15 三菱マテリアル株式会社 ハンダ粉末の製造方法及びこの粉末を用いたハンダ用ペースト
CN103753049B (zh) * 2013-12-27 2017-02-01 哈尔滨工业大学深圳研究生院 一种Cu@Sn核壳结构高温钎料及其制备方法
US9463532B2 (en) * 2014-03-20 2016-10-11 Sandia Corporation Low-temperature nanosolders
KR20170013927A (ko) * 2014-06-12 2017-02-07 알파 어?블리 솔루션 인크. 재료들의 소결 및 그를 이용하는 부착 방법들
US9812545B2 (en) * 2014-10-30 2017-11-07 City University Of Hong Kong Electronic device for data storage and a method of producing an electronic device for data storage
JP6516465B2 (ja) * 2014-12-17 2019-05-22 日鉄ケミカル＆マテリアル株式会社 半導体装置用ボンディングワイヤ
JP6607006B2 (ja) * 2015-12-01 2019-11-20 三菱マテリアル株式会社 ハンダ粉末及びこの粉末を用いたハンダ用ペーストの調製方法
FR3055813B1 (fr) * 2016-09-09 2020-06-26 H.E.F Poudre multimateriaux a grains composites pour la synthese additive
JP6897237B2 (ja) * 2017-03-31 2021-06-30 三菱マテリアル株式会社 接合用成形体及びその製造方法
US10553555B2 (en) 2017-08-25 2020-02-04 International Business Machines Corporation Non-porous copper to copper interconnect
CN107877030B (zh) * 2017-11-07 2020-01-14 深圳市汉尔信电子科技有限公司 一种纳米锡铋复合焊膏及制备方法
CN112171045B (zh) * 2020-09-17 2022-01-18 中国科学院电工研究所 一种电力电子用复合梯度叠层预成型焊片及其制造方法
CN112157371B (zh) * 2020-09-23 2022-05-10 哈尔滨工业大学（深圳） 一种亚微米Cu@Ag焊膏及其制备方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086966A (en) * 1990-11-05 1992-02-11 Motorola Inc. Palladium-coated solder ball
US5964963A (en) * 1994-08-25 1999-10-12 Turchan; Manuel C. Brazing paste
US5573602A (en) * 1994-12-19 1996-11-12 Motorola, Inc. Solder paste
US5542602A (en) * 1994-12-30 1996-08-06 International Business Machines Corporation Stabilization of conductive adhesive by metallurgical bonding
US5958590A (en) * 1995-03-31 1999-09-28 International Business Machines Corporation Dendritic powder materials for high conductivity paste applications
US5770126A (en) 1995-09-07 1998-06-23 The Penn State Research Foundation High producing rate of nano particles by laser liquid interaction
US5730932A (en) * 1996-03-06 1998-03-24 International Business Machines Corporation Lead-free, tin-based multi-component solder alloys
US5828031A (en) * 1996-06-27 1998-10-27 International Business Machines Corporation Head transducer to suspension lead termination by solder ball place/reflow
JP3205793B2 (ja) 1996-12-19 2001-09-04 株式会社巴製作所 超微粒子及びその製造方法
JP3074649B1 (ja) 1999-02-23 2000-08-07 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 無鉛半田粉末、無鉛半田ペースト、およびそれらの製造方法
TW476073B (en) 1999-12-09 2002-02-11 Ebara Corp Solution containing metal component, method of and apparatus for forming thin metal film
GB2360007A (en) 2000-03-10 2001-09-12 Chen Yang Shiau Welded heat sink/heat pipe for CPU
US6281046B1 (en) 2000-04-25 2001-08-28 Atmel Corporation Method of forming an integrated circuit package at a wafer level
US7147687B2 (en) * 2001-05-25 2006-12-12 Nanosphere, Inc. Non-alloying core shell nanoparticles
KR100438408B1 (ko) * 2001-08-16 2004-07-02 한국과학기술원 금속간의 치환 반응을 이용한 코어-쉘 구조 및 혼합된합금 구조의 금속 나노 입자의 제조 방법과 그 응용
US6680128B2 (en) * 2001-09-27 2004-01-20 Agilent Technologies, Inc. Method of making lead-free solder and solder paste with improved wetting and shelf life
US20030146019A1 (en) * 2001-11-22 2003-08-07 Hiroyuki Hirai Board and ink used for forming conductive pattern, and method using thereof
JP3757881B2 (ja) * 2002-03-08 2006-03-22 株式会社日立製作所 はんだ
TWI242478B (en) * 2002-08-01 2005-11-01 Masami Nakamoto Metal nanoparticle and process for producing the same
US6964881B2 (en) 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
JP2004107728A (ja) * 2002-09-18 2004-04-08 Ebara Corp 接合材料及び接合方法
JP2004174538A (ja) * 2002-11-26 2004-06-24 Ricoh Co Ltd はんだ合金材料の製造方法、及びはんだ合金を含むインク組成物
AU2003298904A1 (en) * 2002-12-05 2004-06-30 Surfect Technologies, Inc. Coated and magnetic particles and applications thereof
WO2005095040A1 (ja) * 2004-03-31 2005-10-13 Ebara Corporation 接合方法及び接合体
US7524351B2 (en) 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US7615476B2 (en) 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages

Also Published As

Publication number Publication date
ATE471780T1 (de) 2010-07-15
CN101084079A (zh) 2007-12-05
US7524351B2 (en) 2009-04-28
DE602005021974D1 (de) 2010-08-05
KR20070073759A (ko) 2007-07-10
KR20110052751A (ko) 2011-05-18
CN102646659B (zh) 2015-07-29
HK1111123A1 (en) 2008-08-01
CN102646659A (zh) 2012-08-22
TW200629496A (en) 2006-08-16
WO2006132663A2 (en) 2006-12-14
WO2006132663A3 (en) 2007-04-05
HK1175025A1 (zh) 2013-06-21
US20060068216A1 (en) 2006-03-30
JP2008515635A (ja) 2008-05-15
EP1793949A2 (en) 2007-06-13
EP1793949B1 (en) 2010-06-23
CN101084079B (zh) 2012-07-18
KR101060405B1 (ko) 2011-08-29

Similar Documents

Publication Publication Date Title
TWI313502B (en) Nano-sized metals and alloys, and methods of assembling packages containing same
JP4918088B2 (ja) エレクトロマイグレーション耐性を有し柔軟性のあるワイヤ相互接続、ナノサイズのはんだ組成、それらを形成するシステム、およびはんだ付けされたパッケージの組み立て方法
US7268438B2 (en) Semiconductor element including a wet prevention film
TWI223427B (en) Interconnections to copper ICS
TW469592B (en) Wire bonding method for copper interconnects in semiconductor devices
TWI287264B (en) Under bump metallization layer to enable use of high tin content solder bumps
TW200816423A (en) Semiconductor device and method for manufacturing the same
JP2006294650A (ja) 電子部品の実装方法
TW200843064A (en) Surface structure of a packaging substrate and a fabricating method thereof
US20080036079A1 (en) Conductive connection structure formed on the surface of circuit board and manufacturing method thereof
US20110122592A1 (en) First-level interconnects with slender columns, and processes of forming same
TWI351749B (en) Packaging substrate and method for menufacturing t
TWI237369B (en) Bump structure
TWI336514B (en) Packaging substrate surface structure and method for fabricating the same

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees