CN102646659A - 计算系统、封装以及组装微电子器件封装的方法 - Google Patents

计算系统、封装以及组装微电子器件封装的方法 Download PDF

Info

Publication number
CN102646659A
CN102646659A CN2012101153772A CN201210115377A CN102646659A CN 102646659 A CN102646659 A CN 102646659A CN 2012101153772 A CN2012101153772 A CN 2012101153772A CN 201210115377 A CN201210115377 A CN 201210115377A CN 102646659 A CN102646659 A CN 102646659A
Authority
CN
China
Prior art keywords
metal
particle composition
metal particle
tube core
tin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012101153772A
Other languages
English (en)
Other versions
CN102646659B (zh
Inventor
F·华
M·加纳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of CN102646659A publication Critical patent/CN102646659A/zh
Application granted granted Critical
Publication of CN102646659B publication Critical patent/CN102646659B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C5/00Alloys based on noble metals
    • C22C5/02Alloys based on gold
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F1/00Metallic powder; Treatment of metallic powder, e.g. to facilitate working or to improve properties
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F1/00Metallic powder; Treatment of metallic powder, e.g. to facilitate working or to improve properties
    • B22F1/17Metallic particles coated with metal
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244Powders, particles or spheres; Preforms made therefrom
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/02Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3485Applying solder paste, slurry or powder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/0557Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/1147Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201Structure
    • H01L2224/32012Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1433Application-specific integrated circuit [ASIC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0242Shape of an individual particle
    • H05K2201/0257Nanoparticles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00Nanotechnology
    • Y10S977/70Nanostructure
    • Y10S977/773Nanoparticle, i.e. structure having three dimensions of 100 nm or less
    • Y10S977/775Nanosized powder or flake, e.g. nanosized catalyst
    • Y10S977/777Metallic powder or flake
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12014All metal or with adjacent metals having metal particles
    • Y10T428/12028Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12014All metal or with adjacent metals having metal particles
    • Y10T428/12028Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]
    • Y10T428/12049Nonmetal component

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)
  • Powder Metallurgy (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Manufacture Of Alloys Or Alloy Compounds (AREA)

Abstract

本发明涉及计算系统、封装以及组装微电子器件封装的方法。其中,纳米尺寸的金属微粒组合物包括第一金属,第一金属具有大约20纳米或更小的微粒尺寸。纳米尺寸的金属微粒可以包括第二金属,第二金属形成了在第一金属周围的壳。也披露了使用了纳米尺寸的金属微粒组合物的微电子封装。也披露了组装微电子封装的方法。也披露了包括纳米尺寸的金属微粒组合物的计算系统。

Description

计算系统、封装以及组装微电子器件封装的方法
本申请是申请号为200580033055.1、申请日为2005年9月30日、发明名称为“纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法”的发明专利申请的分案申请。
技术领域
披露的实施例涉及用于微电子器件封装的纳米尺寸的金属和合金。
背景技术
经常在处理器内为多种任务制造集成电路(IC)管芯。IC运行总是在管芯封装内导致生热和热膨胀应力。较高熔点的金属和合金的互连件虽然抵抗了由管芯上密集地封装的电路导致的高运行温度,但它们不能与可能具有高密度电流兼容性问题的已封装的低K层间电介质层管芯集成。另外,较高熔点的金属合金和互连件可能在制造期间在热预算上是昂贵的。
发明内容
依据本发明的一个方面,提供了一种封装,其包括:基片;和,在基片上的已回流的金属微粒组合物。其中,已回流的金属微粒组合物包括在小于或等于大约20微米的范围内的颗粒尺寸。
依据本发明的另一个方面,提供了一种组装微电子器件封装的方法,其包括:在管芯上形成金属微粒前体,其中,金属微粒包括第一金属,第一金属包括在小于或等于大约20纳米的范围内的微粒尺寸,且金属微粒组合物包括等于或低于大约400摄氏度的熔化温度;和,将管芯联接到安装基片和散热器之一。
依据本发明的另一个方面,提供了一种计算系统,其包括:布置在安装基片上的微电子管芯;接触管芯的金属微粒组合物,金属微粒包括第一金属,第一金属包括在小于或等于大约20微米的范围内的颗粒尺寸,且金属微粒组合物包括等于或低于大约400摄氏度的熔化温度;联接到管芯接附焊料隆起焊盘的输入设备和输出设备的至少一个;和,联接到微电子管芯的动态随机存取数据存储器。
附图说明
为理解获得实施例的方式,将通过参考附图给出对多种实施例的更特定的描述。应理解的是这些附图仅描绘了典型的实施例,不必需地按比例绘制且因此不被考虑为限制其范围,通过使用附图将结合附加的特征和细节描述和解释一些实施例,各图为:
图1是包括根据实施例的焊料微粒组合物的显微照片的计算机图像截面;
图2是包括根据实施例的焊料微粒组合物的显微照片的计算机图像截面;
图3是包括根据实施例的焊料微粒组合物的显微照片的计算机图像截面;
图4是根据实施例的微电子器件封装的截面正视图;
图5A是根据实施例的微电子器件封装的截面;
图5B是进一步处理后的图5A中描绘的微电子器件封装的截面;
图6A是根据实施例在处理期间的微电子器件的截面;
图6B是进一步处理后的图6A中描述的微电子器件的截面;
图6C是进一步处理后的图6B中描述的微电子器件的截面;
图6D是进一步处理后的图6C中描述的微电子器件的截面;
图7是图6C中描绘的微电子器件的部分的放大;
图8A是在根据实施例的处理期间的微电子器件的截面;
图8B是进一步处理后的图8A中描述的微电子器件的截面;
图9是根据多种实施例的处理流程图;和
图10是根据实施例的计算系统的描绘。
具体实施方式
如下的描述包括例如上、下、第一、第二等的术语,这些术语仅用于描述的目的且不解释为限制性的。在此描述的器件或物品的实施例可以以多个位置和取向制造、使用或运输。术语“管芯”和“处理器”一般地指作为通过多种处理操作被转化为希望的集成电路器件的基本工件的物理对象。管芯通常从晶片中切分,且晶片可以由半导体材料、非半导体材料或半导体材料和非半导体材料的组合制成。板典型地为树脂浸渍玻璃纤维结构,它用作管芯的安装基片。
现在将参考附图,其中为类似的结构提供类似的参考标示。为最清晰地示出结构和处理实施例,在此包括的附图是实施例的示意表示。因此,例如在显微照片中的制造后的结构的实际外观可能呈现得不同,而仍合并了实施例的基本结构。此外,附图仅示出了理解实施例所必需的结构。未包括在本领域中已知的另外的结构,以维持附图的清晰。
图1是包括根据实施例的金属微粒组合物100的显微照片的计算机图像截面。金属微粒组合物100包括在小于大约20纳米(nm)的范围内的总微粒尺寸。在实施例中,金属微粒组合物100包括在从大约5nm到20nm的范围内的总微粒尺寸。在实施例中,金属微粒组合物100包括在从大于或等于大约15nm到大约20nm的范围内的总微粒尺寸。在实施例中,金属微粒组合物100包括在大约98%小于或等于大约20nm的范围内的总微粒尺寸。在实施例中,金属微粒组合物100包括任何可以在这些尺寸范围内制造的金属微粒或合金微粒。
在实施例中,金属微粒组合物包括等于或低于大约400摄氏度的熔化温度。取决于金属的类型和微粒的尺寸,金属微粒组合物可以具有数百度的熔化温度改变。例如,金的熔化温度为大约1064摄氏度。当金形成为此处所阐述的纳米尺寸的微粒时,其熔化温度可以是大约300摄氏度。
在实施例中,金属微粒组合物包括带有小于或等于大约20nm的范围内的微粒尺寸的第一金属110,且第一金属110独自地呈现为纯金属,或呈现为宏观的单相合金。在实施例中,金属微粒组合物包括银(Ag)。在实施例中,金属微粒组合物包括铜(Cu)。在实施例中,金属微粒组合物包括金(Au)。在实施例中,金属微粒组合物包括金锡合金(Au80Sn20)。在实施例中,金属微粒组合物包括锡(Sn)。在实施例中,金属微粒组合物包括以上金属微粒组合物的至少两个的组合。在实施例中,金属微粒组合物包括以上金属微粒组合物的至少三个的组合。
图1图示了另一个实施例,例如Au80Sn20金属微粒组合物,它包括第一金属110作为核结构,核结构包括金,它还包括第二金属112作为壳结构,壳结构112包括锡。在实施例中,第一金属110包括银且第二金属112从铜、金、铅和锡中选择。在实施例中,第一金属110包括金且第二金属112从铜、银、铅和锡中选择。在实施例中,第一金属110包括铅且第二金属112从铜、银、金和锡中选择。在实施例中,第一金属110包括锡且第二金属112从铜、银、金和铅中选择。在实施例中,以上第一金属110、第二金属112金属微粒组合物的任何金属微粒组合物包括其量呈现为大于第二金属的第一金属。
在实施例中,第一金属110具有第一熔化温度,且第二金属112具有小于第一熔化温度的第二熔化温度。在此实施例中,第一金属110可以是金且第二金属112可以是锡。
图2是根据实施例的包括金属微粒组合物200的显微照片200的计算机图像截面。在实施例中,金属微粒组合物200包括第一金属210、第二金属内壳212和第三金属外壳214。在此实施例中,第一金属210构造为大体上的核结构,第二金属212构造为大体上的内壳结构,内壳结构邻接核结构210,且第三金属214构造为外壳结构214,外壳结构邻接内壳结构212。
在实施例中,核210包括第一熔化温度且大体上的外壳214具有大于第一熔化温度的第三熔化温度。在实施例中,核210具有第一熔化温度且大体上的外壳214具有小于第一熔化温度的第三熔化温度。在此实施例中,核210可以是例如金的第一金属210,且外壳214可以是例如锡的第三金属214。
图3是包括根据实施例的金属微粒组合物的显微照片300的计算机图像截面。金属微粒组合物300包括大体上构成为第一部分的第一金属310,和大体上构造为第二部分的第二金属312。在实施例中,第一部分310邻接第二部分312,但两个部分都不大体上包围另一个部分或被另一个部分包围。在实施例中,第一部分310和第二部分312包括聚集物,且第一部分310和第二部分312的至少一个具有从大约0.5∶1,包括大约1∶1,直至大约1∶2的纵横比。因此,第一部分310或第二部分312的一个的最小尺寸可以小到大约5nm,且第一部分310或第二部分312的一个的最大尺寸可以大到大约20nm。然而,在实施例中,第一部分310或第二部分312的一个的有效最小尺寸可以大到为20nm,且第一部分310或第二部分312的一个的最大尺寸可以通过选择在此披露中阐述的纵横比实施例的一个来确定。
在实施例中,在此披露中阐述的第一金属微粒组合物和第二金属微粒组合物的任何金属微粒组合物可以用作在图3中描绘的金属微粒组合物300。
图4是根据实施例的包括管芯接附金属微粒组合物的封装的截面。封装400包括第一管芯410和管芯接附金属微粒组合物412,其将第一管芯410粘附到安装基片414。在实施例中,金属微粒组合物412是在此披露中阐述的任何金属微粒组合物。
第一管芯410通过管芯结合盘416、结合线418和安装基片结合指420电气地联接到安装基片414。另外,封装400可以包括例如一系列隆起的进一步的电气连接件,其中之一以参考数字422标识,用于进一步地安装在例如母板上。
在实施例中,安装基片414是例如主板的印刷线路板(PWB)的部分。在实施例中,安装基片414是插入件的部分。在实施例中,安装基片414是夹层PWB的部分。在实施例中,安装基片414是扩展卡PWB的部分。在实施例中,安装基片414是例如用于手持设备的板的小型PWB的部分,手持设备例如是移动电话或个人数字助理(PDA)。
图5A是根据实施例的微电子器件封装500的截面。微电子器件封装500包括管芯510,管芯510包括起作用的表面512和背侧表面514。在实施例中,管芯510是处理器,例如由Intel Corporation制造的处理器。在实施例中,助熔的(fluxed)焊料微粒组合物膏516提供在起作用的表面512上。凹陷的结合盘518布置在起作用的表面512上且与助熔的焊料微粒组合物膏516接触。在实施例中,管芯510布置在集成散热器(IHS)520和安装基片522之间。助熔的焊料微粒组合物膏516布置在安装基片结合盘524上。助熔的焊料微粒组合物膏516与管芯510的起作用的表面512接触。在实施例中,助熔的焊料微粒组合物膏516是在此披露中阐述的任何金属微粒组合物。
安装基片522可以是在本领域中已知的任何安装基片,例如印刷电路板(PCB)、主板、母板、夹层板、扩展卡或其他安装基片。在实施例中,热界面材料(TIM)526布置在管芯510的背侧表面514和集成散热器520之间。在实施例中,热界面材料526是根据在此披露中阐述的实施例的任何实施例的金属微粒组合物。在实施例中,热界面材料526是焊料。在实施例中,热界面材料526是反应金属微粒组合物,在回流处理期间它与背侧表面514化学地结合。在实施例中,热界面材料526是金属微粒组合物,例如金刚石填充焊料或碳纤维填充焊料。在实施例中,热界面材料是已回流的金属微粒组合物,包括小于或等于大约20μm的颗粒尺寸。
在实施例中,集成散热器520与结合材料528接附,结合材料528将集成散热器520的唇缘部分530固定在其上。微电子器件封装500的变化可以适合于使用数个金属微粒组合物实施例的一个。
图5B是进一步处理后的图5A中描绘的微电子器件封装501的截面。可以通过热处理进行将金属微粒组合物膏516(图5A)回流为焊料隆起焊盘517和金属微粒组合物热界面材料526的回流,或它们之一与管芯510连接。在实施例中,施加热以实现接近了或达到了特定的焊料隆起焊盘517或热界面材料526的固相线温度的温度。在实施例中,焊料隆起焊盘517或热界面材料526描绘为已加热到从大约150摄氏度到大约220摄氏度的范围。在实施例中,焊料隆起焊盘517或热界面材料526加热到从大约170摄氏度到大约200摄氏度的范围。在实施例中,焊料隆起焊盘517或热界面材料526加热到大约180摄氏度。在实施例中,平均颗粒尺寸在小于或等于大约20μm的范围内。
图6A是根据实施例在处理期间的微电子器件600的截面。基片610例如可以是为处理器的管芯,基片610包括用于从基片610到外界电连通的结合盘612。微电子器件600描绘为以带有图案的掩模614处理,掩模614暴露了结合盘612。在实施例中,结合盘612是铜的上金属化层,它可以接触数个金属化层的任一个。例如,在简单的微电子器件中的如金属一(M1,未绘出)的金属化层与结合盘612电接触。在另一个例子中,例如金属二(M2,未绘出)的金属化层与结合盘612电接触。M2与M1电接触。在另一个例子中,例如金属三(M3,未绘出)的金属化层与结合盘612电接触。M3与M2电接触,M2又与M1电接触。在另一个例子中,例如金属四(M4,未绘出)的金属化层与结合盘612电接触。M4与M3电接触。M3与M2电接触,M2又与M1电接触。在另一个例子中,例如金属五(M5,未绘出)的金属化层与结合盘612电接触。M5与M4电接触。M4与M3电接触。M3与M2电接触,M2又与M1电接触。在另一个例子中,例如金属六(M6,未绘出)的金属化层与结合盘612电接触。M6与M5电接触。M5与M4电接触。M4与M3电接触。M3与M2电接触,M2又与M1电接触。在另一个例子中,例如金属七(M7,未绘出)的金属化层与结合盘612电接触。M7与M6电接触。M6与M5电接触。M5与M4电接触。M4与M3电接触。M3与M2电接触,M2又与M1电接触。通过此披露,将清楚的是多种半导体基片结构可应用于多种实施例。
图6B是进一步处理后的图6A中描述的微电子器件601的截面。带有图案的掩模614在实施例中是带有图案的光致抗蚀剂,根据在此披露中阐述的多种实施例,它已填充有金属微粒组合物前体616,例如助熔的金属微粒组合物粉末616,也称为焊料微粒组合物膏616。
在实施例中,金属微粒组合物膏616包括在处理期间作为用于金属微粒组合物膏616的短效结合剂的助熔剂载体。在实施例中,本身不形成图案,而是助熔的金属微粒组合物形成敷层,且在回流期间助熔剂载体流化且优选地润湿结合盘612,且优选地变成疏基片610的,基片610可以是半导体、电介质和它们的组合。
图6C是进一步处理后的图6B中描述的微电子器件602的截面。在此实施例中,形成图案的掩模614已被去除。形成图案的掩模614的去除可以通过简单地将其从基片610拉离而完成,且因此留下了助熔的金属微粒组合物616,它形成为直接在结合盘612上的离散的孤立区。
图7是图6C中描绘的微电子器件的部分的放大。图7从图6C中描绘的虚线7内的区域取出。图7描绘了作为膏和助熔剂基质720内的金属微粒组合物718的金属微粒组合物前体。金属微粒组合物718包括在此披露中阐述的金属微粒组合物实施例的一个。因为膏和助熔剂基质720大体上保护了金属微粒组合物718不受腐蚀和/或氧化影响,所以金属微粒组合物718可以抵抗在回流期间大体上的颗粒生长。在实施例中,回流后金属微粒组合物718具有在小于或等于大约20微米(μm)的范围内的颗粒尺寸。因为微粒尺寸的实施例,微粒的晶核形成以从固相转变到固相线可以在大约400摄氏度或更低开始。例如,金可以在大约300摄氏度经历固相到固相线的转变。
图6D是进一步处理后的图6C中描述的微电子器件603的截面。已开始回流处理,在回流期间膏和助熔剂基质720(图7)已挥发,且金属微粒组合物718已回流为焊料隆起焊盘617(图6D),隆起617带有在小于或等于大约20μm的范围内的颗粒尺寸。描绘为用于微电子器件603的回流处理可以处于组装微电子器件封装的方法前,回流处理可以与微电子器件封装的其他热处理同时,或可以在组装微电子器件封装的一些元件之后,包括形成金属微粒组合物管芯接附实施例。随后讨论这些和其他的实施例。
图8A是在根据实施例的处理期间的微电子器件800的截面。器件800包括管芯810,管芯810包括多个管芯结合盘812。器件800也包括根据在此披露中阐述的金属微粒组合物实施例的任何实施例的金属微粒组合物814。管芯810通过金属微粒组合物814联接到安装基片816,金属微粒组合物814用作它们之间的电气隆起。管芯810到安装基片816的电气联接通过安装基片结合盘818完成,安装基片结合盘818与多个管芯结合盘812对齐。通过多个板隆起实现对微电子器件800的进一步的连通,隆起的一个以参考数字820标识。
图8B是进一步处理后的图8A中描述的微电子器件800的截面。包括安装基片816上的管芯810的微电子器件801已安装在板822上。在实施例中,板822已通过板隆起820结合到安装基片816。在实施例中,板隆起820包括在此披露中阐述的任何金属微粒组合物实施例。
在此披露中阐述的电气隆起的实施例也可应用于线结合技术。因为熔点在大约400摄氏度或更低的范围内开始,线结合的处理可以在条件下进行以保持线结合器件的热预算。
图9是根据多种实施例的处理流程图900。助熔的金属微粒组合物的处理分别在形成管芯接附和/或焊料隆起焊盘的过程期间和已封装的管芯的组装方法期间进行。在910处,助熔的金属微粒组合物实施例在管芯上形成图案。通过在图4中的图示,管芯接附金属微粒组合物412用于将管芯410接附到安装基片414。通过在图6B中的进一步图示,形成有图案的掩模614已填充有助熔的金属微粒组合物616。
在920处,助熔的焊料微粒组合物实施例在管芯上回流。通过在图5B中的图示,在比作为宏观体积材料的单独金属的熔化温度显著地更低的温度下,已回流的金属微粒隆起517、已回流的热界面材料526被描绘为形成金属组合物。在921处,处理流程可以从助熔的金属微粒合成物回流的处理处向将管芯组装到封装内的方法前进。在922处,一个处理实施例完成。
选择地在线结合技术中,在管芯上对助熔的金属微粒组合物粉末形成图案的处理在将线结合焊料隆起焊盘放置在管芯上期间逐一地实现。
在930处,包括焊料或助熔的金属微粒组合物的管芯被组装到封装内。通过图示,图5A和图5B描绘了管芯510与至少安装基片522的组装。在实施例中,集成散热器520或其他散热基片也与助熔的金属微粒组合物514或焊料隆起焊盘517和管芯510组装。在931处,处理流程可以从将管芯组装到封装的方法前进,随后是将金属微粒组合物回流为管芯接附和/或回流为焊料隆起焊盘的处理。在932处,一个方法实施例完成。
图10是描绘了根据实施例的计算系统1000的截取正视图。一个和多个前述的金属微粒组合物、管芯接附组合物和/或焊料隆起焊盘组合物的实施例可用利用在计算系统中,例如图10的计算系统1000。在后文中,任何单独的实施例或与任何其他实施例组合的实施例被称为金属微粒组合物实施例。
计算系统1000例如包括至少一个封闭在封装1010内的处理器(未示出)、数据存储系统1012、至少一个例如键盘1014的输入设备和至少一个例如监视器1016的输出设备。计算系统1000包括处理数据信号的处理器,且可以包括例如从Intel Corporation可获得的微处理器。除键盘1014外,计算系统1000可以包括另外的使用者输入设备,例如鼠标1018。计算系统1000可以与包括管芯、安装基片和板的器件400、501和801的任何器件相对应。因此,封装1010(包括管芯)和板1020可以对应于这些结构。
为此披露的目的,实施了根据要求的主题的部件的计算系统1000可以包括任何利用了微电子器件系统的系统,其可以包括例如联接到例如动态随机存取存储器(DRAM)、聚合物存储器、闪速存储器和相变存储器的数据存储器的金属微粒组合物实施例的至少一个。在此实施例中,金属微粒组合物实施例通过联接到处理器而联接到这些功能性的任何组合。然而,在实施例中,在此披露中阐述的金属微粒组合物实施例联接到这些功能性的任何功能性。对于作为例子的实施例,数据存储器包括管芯上的嵌入式DRAM高速缓冲存储器。另外,在实施例中,联接到处理器(未示出)的金属微粒组合物实施例是系统的部分,系统带有联接到DRAM高速缓冲存储器的数据存储器的金属微粒组合物的实施例。另外,在实施例中,金属微粒组合物实施例联接到数据存储器1012。
在实施例中,计算系统也可以包括管芯,管芯包括数字信号处理器(DSP)、微控制器、专用集成电路(ASIC)或微处理器。在此实施例中,金属微粒组合物实施例通过联接到处理器而联接到这些功能性的任何组合。对于作为例子的实施例,DSP(未示出)是芯片组的部分,其可以包括独立式处理器(在封装1010内)和DSP作为板1020上的芯片组的分开的部分。在此实施例中,金属微粒组合物实施例联接到DSP,且可以存在分开的金属微粒组合物实施例,它联接到封装1010内的处理器。另外,在实施例中,金属微粒组合物实施例联接到与封装1010安装在相同的板1020上的DSP。现在可以认识到,如对于计算系统1000所阐述地,金属微粒组合物实施例可以结合通过此披露及其等价物的多种实施例阐述的金属微粒组合物实施例组合。
在此披露中阐述的金属微粒组合物实施例可以应用于不同于传统的计算机的设备和器械。例如,管芯可以以金属微粒组合物实施例封装,且放置在例如无线通信器的便携式设备或如个人数字助理等的手持设备内。另一个例子是可以以金属微粒组合物实施例封装且放置在例如汽车、机车、航水器、航空器或航天器的交通工具中的管芯。
提供了摘要,以符合37C.F.R§1.72(b)对摘要的要求,这允许读者快速地确定技术披露的属性和要旨。应理解为摘要将不用于解释或限制权利要求的范围或意义。
在前述的具体实施方式中,为简化披露的目的,在单个的实施例中多种特征被组合在一起。此披露方法不解释为反映了所要求的本发明的实施例要求了比在每个权利要求中清楚地陈述的特征更多的特征的意图。而是如所附的权利要求所反映,本发明的主题决不在于单个披露的实施例的所有特征。因此,所附权利要求在此合并在具体实施方式中,使得每个权利要求作为分开的优选实施例而自立。
对于本领域技术人员将容易地理解的是,在已被描述和图示以解释本发明的属性的细节、材料以及零件布置和方法阶段中的多种其他的改变可以不偏离在所附的权利要求中表达的本发明的原理和范围而完成。

Claims (14)

1.一种封装,其包括:
基片;和
在基片上的已回流的金属微粒组合物,其中,已回流的金属微粒组合物包括在小于或等于大约20微米的范围内的颗粒尺寸。
2.根据权利要求1所述的封装,其特征在于,基片包括微电子管芯。
3.根据权利要求1所述的封装,其特征在于,基片包括第二级安装基片。
4.根据权利要求1所述的封装,其特征在于,基片包括第一级板。
5.根据权利要求1所述的封装,其特征在于进一步包括第二金属,其中,第一金属从银、金、铅和锡中选择,且第二金属从铜、银、金、铅和锡中选择。
6.根据权利要求1所述的封装,其特征在于进一步包括第二金属,其中,第一金属从银、金、铅和锡中选择,第二金属从铜、银、金、铅和锡中选择,第一金属呈现为大于第二金属的量。
7.根据权利要求1所述的封装,其特征在于,第一金属包括金,第二金属包括锡,且锡包括第一金属和第二金属的大约20%。
8.一种组装微电子器件封装的方法,其包括:
在管芯上形成金属微粒前体,其中,金属微粒包括第一金属,第一金属包括在小于或等于大约20纳米的范围内的微粒尺寸,且金属微粒组合物包括等于或低于大约400摄氏度的熔化温度;和
将管芯联接到安装基片和散热器之一。
9.根据权利要求8所述的组装微电子器件封装的方法,其特征在于该方法进一步包括:
从联接管芯前回流、在联接管芯期间回流、在联接管芯后回流和它们的组合选择的回流金属微粒前体。
10.根据权利要求8所述的组装微电子器件封装的方法,其特征在于该方法进一步包括:
将集成散热器连接到管芯。
11.一种计算系统,其包括:
布置在安装基片上的微电子管芯;
接触管芯的金属微粒组合物,金属微粒包括:
第一金属,第一金属包括在小于或等于大约20微米的范围内的颗粒尺寸,且金属微粒组合物包括等于或低于大约400摄氏度的熔化温度;
联接到管芯接附焊料隆起焊盘的输入设备和输出设备的至少一个;和
联接到微电子管芯的动态随机存取数据存储器。
12.根据权利要求11所述的计算系统,其特征在于,金属微粒组合物是焊料隆起焊盘和管芯接附材料的至少一个。
13.根据权利要求11所述的计算系统,其特征在于,系统布置在计算机、无线通信器、手持设备、汽车、机车、航空器、航水器和航天器之一内。
14.根据权利要求11所述的计算系统,其特征在于,微电子管芯从数据存储设备、数字信号处理器、微控制器、专用集成电路和微处理器中选择。
CN201210115377.2A 2004-09-30 2005-09-30 计算系统、封装以及组装微电子器件封装的方法 Expired - Fee Related CN102646659B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/957196 2004-09-30
US10/957,196 2004-09-30
US10/957,196 US7524351B2 (en) 2004-09-30 2004-09-30 Nano-sized metals and alloys, and methods of assembling packages containing same
CN2005800330551A CN101084079B (zh) 2004-09-30 2005-09-30 纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN2005800330551A Division CN101084079B (zh) 2004-09-30 2005-09-30 纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法

Publications (2)

Publication Number Publication Date
CN102646659A true CN102646659A (zh) 2012-08-22
CN102646659B CN102646659B (zh) 2015-07-29

Family

ID=36099546

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201210115377.2A Expired - Fee Related CN102646659B (zh) 2004-09-30 2005-09-30 计算系统、封装以及组装微电子器件封装的方法
CN2005800330551A Expired - Fee Related CN101084079B (zh) 2004-09-30 2005-09-30 纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN2005800330551A Expired - Fee Related CN101084079B (zh) 2004-09-30 2005-09-30 纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法

Country Status (10)

Country Link
US (1) US7524351B2 (zh)
EP (1) EP1793949B1 (zh)
JP (1) JP2008515635A (zh)
KR (2) KR20110052751A (zh)
CN (2) CN102646659B (zh)
AT (1) ATE471780T1 (zh)
DE (1) DE602005021974D1 (zh)
HK (2) HK1111123A1 (zh)
TW (1) TWI313502B (zh)
WO (1) WO2006132663A2 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105575971A (zh) * 2014-10-30 2016-05-11 香港城市大学 一种用于数据存储电子装置及其制备方法

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7524351B2 (en) 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US8637127B2 (en) 2005-06-27 2014-01-28 Kennametal Inc. Composite article with coolant channels and tool fabrication method
US7615476B2 (en) 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US7687156B2 (en) 2005-08-18 2010-03-30 Tdy Industries, Inc. Composite cutting inserts and methods of making the same
ATE512278T1 (de) 2006-04-27 2011-06-15 Tdy Ind Inc Modulare erdbohrmeissel mit fixiertem schneider und modulare erdbohrmeisselkörper mit fixiertem schneider
KR20070115660A (ko) * 2006-05-30 2007-12-06 마쯔시다덴기산교 가부시키가이샤 솔더 페이스트
MX2009003114A (es) 2006-10-25 2009-06-08 Tdy Ind Inc Articulos que tienen resistencia mejorada al agrietamiento termico.
EP1918063A1 (de) * 2006-11-02 2008-05-07 Siemens Aktiengesellschaft Komposit-Lötpulver aus Kern und metallischer Hülle, zum Löten von Turbinenbauteilen
US7758916B2 (en) * 2006-11-13 2010-07-20 Sulzer Metco (Us), Inc. Material and method of manufacture of a solder joint with high thermal conductivity and high electrical conductivity
WO2009090748A1 (ja) 2008-01-17 2009-07-23 Applied Nanoparticle Laboratory Corporation 複合銀ナノ粒子、その製法及び製造装置
US8790439B2 (en) 2008-06-02 2014-07-29 Kennametal Inc. Composite sintered powder metal articles
US8025112B2 (en) 2008-08-22 2011-09-27 Tdy Industries, Inc. Earth-boring bits and other parts including cemented carbide
US8322465B2 (en) * 2008-08-22 2012-12-04 TDY Industries, LLC Earth-boring bit parts including hybrid cemented carbides and methods of making the same
US9095898B2 (en) 2008-09-15 2015-08-04 Lockheed Martin Corporation Stabilized metal nanoparticles and methods for production thereof
US8105414B2 (en) * 2008-09-15 2012-01-31 Lockheed Martin Corporation Lead solder-free electronics
US8486305B2 (en) 2009-11-30 2013-07-16 Lockheed Martin Corporation Nanoparticle composition and methods of making the same
US8272816B2 (en) 2009-05-12 2012-09-25 TDY Industries, LLC Composite cemented carbide rotary cutting tools and rotary cutting tool blanks
US8308096B2 (en) 2009-07-14 2012-11-13 TDY Industries, LLC Reinforced roll and method of making same
US9011570B2 (en) 2009-07-30 2015-04-21 Lockheed Martin Corporation Articles containing copper nanoparticles and methods for production and use thereof
US9072185B2 (en) 2009-07-30 2015-06-30 Lockheed Martin Corporation Copper nanoparticle application processes for low temperature printable, flexible/conformal electronics and antennas
US9643236B2 (en) 2009-11-11 2017-05-09 Landis Solutions Llc Thread rolling die and method of making same
US8834747B2 (en) * 2010-03-04 2014-09-16 Lockheed Martin Corporation Compositions containing tin nanoparticles and methods for use thereof
US10544483B2 (en) 2010-03-04 2020-01-28 Lockheed Martin Corporation Scalable processes for forming tin nanoparticles, compositions containing tin nanoparticles, and applications utilizing same
TWI380869B (zh) * 2010-03-08 2013-01-01 Ying Tung Chen Welding materials containing diamond particles
US8778830B2 (en) * 2010-05-14 2014-07-15 The University Of Hong Kong Solid supported gold nanoparticles, methods of use thereof, and methods for making same
NL2005112C2 (en) * 2010-07-19 2012-01-23 Univ Leiden Process to prepare metal nanoparticles or metal oxide nanoparticles.
FR2965719B1 (fr) * 2010-10-07 2014-05-23 Oreal Particule comportant deux metaux plasmoniques
JP2012209148A (ja) * 2011-03-30 2012-10-25 Sony Corp 導電性粒子、導電性ペースト、及び、回路基板
KR20120126364A (ko) * 2011-05-11 2012-11-21 에스케이하이닉스 주식회사 반도체 칩 모듈 및 이를 갖는 플래나 스택 패키지
US8800848B2 (en) 2011-08-31 2014-08-12 Kennametal Inc. Methods of forming wear resistant layers on metallic surfaces
CN103619529B (zh) * 2011-09-02 2015-05-06 三菱综合材料株式会社 焊料粉末以及使用该粉末的焊料用浆料
US9016406B2 (en) 2011-09-22 2015-04-28 Kennametal Inc. Cutting inserts for earth-boring bits
JP2013081966A (ja) * 2011-10-06 2013-05-09 Fujitsu Ltd 導電性接合材料、並びに導体の接合方法、及び半導体装置の製造方法
CN103358047B (zh) * 2011-11-02 2016-04-20 兰州大学 用于微/纳米尺度焊接的一维锡银铜三元纳米焊料
EP2812139B1 (en) 2012-02-10 2017-12-27 Lockheed Martin Corporation Nanoparticle paste formulations and methods for production and use thereof
EP2812923B1 (en) 2012-02-10 2019-11-27 Lockheed Martin Corporation Photovoltaic cells having electrical contacts formed from metal nanoparticles and methods for production thereof
JP6079374B2 (ja) * 2013-03-29 2017-02-15 三菱マテリアル株式会社 ハンダ粉末の製造方法及びこの粉末を用いたハンダ用ペースト
JP6079375B2 (ja) * 2013-03-29 2017-02-15 三菱マテリアル株式会社 ハンダ粉末及びその製造方法並びにこの粉末を用いたハンダ用ペースト
CN103753049B (zh) * 2013-12-27 2017-02-01 哈尔滨工业大学深圳研究生院 一种Cu@Sn核壳结构高温钎料及其制备方法
US9463532B2 (en) * 2014-03-20 2016-10-11 Sandia Corporation Low-temperature nanosolders
KR20190016142A (ko) * 2014-06-12 2019-02-15 알파 어?블리 솔루션 인크. 재료들의 소결 및 그를 이용하는 부착 방법들
JP6516465B2 (ja) * 2014-12-17 2019-05-22 日鉄ケミカル&マテリアル株式会社 半導体装置用ボンディングワイヤ
JP6607006B2 (ja) * 2015-12-01 2019-11-20 三菱マテリアル株式会社 ハンダ粉末及びこの粉末を用いたハンダ用ペーストの調製方法
FR3055813B1 (fr) * 2016-09-09 2020-06-26 H.E.F Poudre multimateriaux a grains composites pour la synthese additive
JP6897237B2 (ja) * 2017-03-31 2021-06-30 三菱マテリアル株式会社 接合用成形体及びその製造方法
US10553555B2 (en) 2017-08-25 2020-02-04 International Business Machines Corporation Non-porous copper to copper interconnect
CN107877030B (zh) * 2017-11-07 2020-01-14 深圳市汉尔信电子科技有限公司 一种纳米锡铋复合焊膏及制备方法
CN112171045B (zh) * 2020-09-17 2022-01-18 中国科学院电工研究所 一种电力电子用复合梯度叠层预成型焊片及其制造方法
CN112157371B (zh) * 2020-09-23 2022-05-10 哈尔滨工业大学(深圳) 一种亚微米Cu@Ag焊膏及其制备方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086966A (en) * 1990-11-05 1992-02-11 Motorola Inc. Palladium-coated solder ball
US5964963A (en) * 1994-08-25 1999-10-12 Turchan; Manuel C. Brazing paste
US5573602A (en) * 1994-12-19 1996-11-12 Motorola, Inc. Solder paste
US5542602A (en) * 1994-12-30 1996-08-06 International Business Machines Corporation Stabilization of conductive adhesive by metallurgical bonding
US5958590A (en) * 1995-03-31 1999-09-28 International Business Machines Corporation Dendritic powder materials for high conductivity paste applications
AU6915696A (en) 1995-09-07 1997-03-27 Penn State Research Foundation, The High production rate of nano particles by laser liquid interaction
US5730932A (en) * 1996-03-06 1998-03-24 International Business Machines Corporation Lead-free, tin-based multi-component solder alloys
US5828031A (en) * 1996-06-27 1998-10-27 International Business Machines Corporation Head transducer to suspension lead termination by solder ball place/reflow
JP3205793B2 (ja) 1996-12-19 2001-09-04 株式会社巴製作所 超微粒子及びその製造方法
JP3074649B1 (ja) 1999-02-23 2000-08-07 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 無鉛半田粉末、無鉛半田ペースト、およびそれらの製造方法
TW476073B (en) 1999-12-09 2002-02-11 Ebara Corp Solution containing metal component, method of and apparatus for forming thin metal film
GB2360007A (en) 2000-03-10 2001-09-12 Chen Yang Shiau Welded heat sink/heat pipe for CPU
US6281046B1 (en) 2000-04-25 2001-08-28 Atmel Corporation Method of forming an integrated circuit package at a wafer level
US7147687B2 (en) * 2001-05-25 2006-12-12 Nanosphere, Inc. Non-alloying core shell nanoparticles
KR100438408B1 (ko) * 2001-08-16 2004-07-02 한국과학기술원 금속간의 치환 반응을 이용한 코어-쉘 구조 및 혼합된합금 구조의 금속 나노 입자의 제조 방법과 그 응용
US6680128B2 (en) * 2001-09-27 2004-01-20 Agilent Technologies, Inc. Method of making lead-free solder and solder paste with improved wetting and shelf life
US20030146019A1 (en) * 2001-11-22 2003-08-07 Hiroyuki Hirai Board and ink used for forming conductive pattern, and method using thereof
JP3757881B2 (ja) * 2002-03-08 2006-03-22 株式会社日立製作所 はんだ
TWI242478B (en) * 2002-08-01 2005-11-01 Masami Nakamoto Metal nanoparticle and process for producing the same
US6964881B2 (en) 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
JP2004107728A (ja) * 2002-09-18 2004-04-08 Ebara Corp 接合材料及び接合方法
JP2004174538A (ja) * 2002-11-26 2004-06-24 Ricoh Co Ltd はんだ合金材料の製造方法、及びはんだ合金を含むインク組成物
AU2003298904A1 (en) * 2002-12-05 2004-06-30 Surfect Technologies, Inc. Coated and magnetic particles and applications thereof
WO2005095040A1 (ja) * 2004-03-31 2005-10-13 Ebara Corporation 接合方法及び接合体
US7524351B2 (en) 2004-09-30 2009-04-28 Intel Corporation Nano-sized metals and alloys, and methods of assembling packages containing same
US7615476B2 (en) 2005-06-30 2009-11-10 Intel Corporation Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105575971A (zh) * 2014-10-30 2016-05-11 香港城市大学 一种用于数据存储电子装置及其制备方法

Also Published As

Publication number Publication date
KR101060405B1 (ko) 2011-08-29
EP1793949B1 (en) 2010-06-23
US7524351B2 (en) 2009-04-28
CN101084079B (zh) 2012-07-18
US20060068216A1 (en) 2006-03-30
WO2006132663A3 (en) 2007-04-05
WO2006132663A2 (en) 2006-12-14
JP2008515635A (ja) 2008-05-15
HK1111123A1 (en) 2008-08-01
EP1793949A2 (en) 2007-06-13
KR20110052751A (ko) 2011-05-18
TWI313502B (en) 2009-08-11
DE602005021974D1 (de) 2010-08-05
KR20070073759A (ko) 2007-07-10
CN102646659B (zh) 2015-07-29
HK1175025A1 (zh) 2013-06-21
CN101084079A (zh) 2007-12-05
ATE471780T1 (de) 2010-07-15
TW200629496A (en) 2006-08-16

Similar Documents

Publication Publication Date Title
CN101084079B (zh) 纳米尺寸的金属和合金以及组装包括纳米尺寸的金属和合金的封装的方法
CN101208799B (zh) 电迁移抗性和顺应导线互连、纳米焊料成分、由其制成的系统以及组装焊接封装的方法
US7111771B2 (en) Solders with surfactant-refined grain sizes, solder bumps made thereof, and methods of making same
TW469592B (en) Wire bonding method for copper interconnects in semiconductor devices
CN106129025B (zh) 电子装置及其制法
US20120161326A1 (en) Composition for filling through silicon via (tsv), tsv filling method and substrate including tsv plug formed of the composition
CN101276796A (zh) 纳米管增强的焊料帽、组成方法及其芯片封装和系统
JPH08255965A (ja) マイクロチップモジュール組立体
TW517368B (en) Manufacturing method of the passivation metal on the surface of integrated circuit
CN101609806B (zh) 用于印刷电路板表面安装元件的薄型焊栅阵列技术
US20160309574A1 (en) Printed circuit board
US20070246818A1 (en) Semiconductor module featuring solder balls having lower melting point than that of solder electrode terminals of electronic device containing additional metal powder component
US7578966B2 (en) Solders with intermetallic phases, solder bumps made thereof, packages containing same, and methods of assembling packages therewith
CN103379736B (zh) 印刷电路板组件及其制作方法
Bolanos Semiconductor integrated circuit packaging technology challenges-next five years
JUNG et al. Introduction to wire bond technology
Greig Multichip Packaging
JPH09232485A (ja) 電子部品用複合材料およびその製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
REG Reference to a national code

Ref country code: HK

Ref legal event code: DE

Ref document number: 1175025

Country of ref document: HK

C14 Grant of patent or utility model
GR01 Patent grant
REG Reference to a national code

Ref country code: HK

Ref legal event code: GR

Ref document number: 1175025

Country of ref document: HK

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150729

Termination date: 20190930

CF01 Termination of patent right due to non-payment of annual fee