1336514 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種封裝基板表面結構及其製法，尤指 • 一種適用於解決置球側電性連接墊與焊料球接合強度不足 5 之封裝基板表面結構及其製法。 【先前技術】 隨著電子產業的蓬勃發展，電子產品亦逐漸進入多功 能、高性能的研發方向。為滿足半導體封裝件高積集度 10 (Integrati〇n)以及微型化（Miniaturization)的封裝要求，提供 夕數主被動元件及線路連接之封裝基板，亦逐漸由單層板 演變成多層板，在有限的空間下，藉由層間連接技術 (Interlayer connection)擴大封裝基板上可利用的佈線面積 以配合咼電子投度之積體電路（Integrated circuit)需求。 15 一般而言，半導體封裝結構是將半導體晶片背面黏貼 於封裝基板置晶側表面，再進行打線接合（wire b〇nding)， • 或將半導體晶片主動面以覆晶接合（Flip chip)方式與封裝 基板置晶側表面電性連接，再於置球侧表面植以焊料球以 供與一印刷電路板進行電性連接。然而，封裝基板製程在 20 關鍵尺寸（critical dimension，如：最小線寬）不斷縮小的趨 勢中’也面臨到置球側表面之電性連接墊與焊料球接合強 度不足的問題。 習知的封裝基板與焊料球接合情形請參考圖1A及 1B。如圖1A所示，係包括一基板丨丨，其置球側表面Ua具有 5 1336514 一線路層12’該線路層12具有複數電性連接塾i2i，該置球 側表面Ha復具有一防桿層13,該防焊層13具有複數開孔 131以顯露該些電性連接墊121，，其中，該些電性連接塾⑵ 的H般為鋼。再者’於此電性連接墊121表面利用無電 5電鑛的方式形成金屬接著層14，此金屬接著層㈣材料可 為錫、銀、金等，基於成本考量一般為錫，以保護該電性 連接墊121免於曝露環境中之空氣等侵襲。接著，如圖ΐβ 所示於金屬接著層14表面形成一焊料球15 ,而該焊料球 15的材料一般為錫。最後，該焊料球15再經由迴焊（reflow 10 s〇ldering)而可與一印刷電路板接合。 此種結構及製程雖可達到電性連接的目的。然而由於 電性連接墊121接置焊料球15後，在進行迴焊時，錫、銅兩 金屬之原子會擴散互溶，並在兩金屬介面間形成特殊結晶 構造之介金屬化合物（intennetailic c〇mp〇und) sn3Cu，使得 15 電性連接墊12厚度因此減少。 圖2係顯示一系列之實驗，其中以不同厚度之錫作為金 屬接著層14來比較迴焊次數與電性連接墊12被消耗的情 形，其結果顯示該金屬接著層14的厚度在〇·89〜16.36微米範 圍内’電性連接墊121因與錫金屬（來自金屬接著層14或焊 20 料球15)生成介金屬化合物的效應，導致該電性連接墊121 的厚度減少約10微米。此種銅厚度被消耗的情形，在現今 半導體封裝件高積集度以及微型化的封裝要求下，由於線 路層居度與寬度及線路層間距具一定相對的比例關係，且 最外面的線路層12包含與之同時形成的電性連接墊121，因 6 1336514 此當線路層丨2厚度隨著寬度縮小時，與之對應的電性連接 墊121之厚度也隨之縮小，而該電性連接墊12ι與焊料球b 接合時又會發生介金屬化合物效應，造成厚度減少使得 電性連接墊121面臨因厚度不足而無法提供與焊料球^間 5足夠的接合強度，將使電性連接墊121上的焊料球15容易^ 落，甚者，會造成封裝基板與印刷電路板接合不牢而分離 的情形’因而無法達到可靠度的需求。 【發明内容】 10 鑑於上述習知技術之缺點，本發明之主要目的係在提 供一種封裝基板表面結構及其製法，能解決因置球側表面 電性連接墊厚度不足而與焊料球接合強度不足之問題。 為達成上揭及其他目的，本發明提供一種封裝基板表 面、.。構&括.基板，其置球側表面具有複數電性連接 15墊；一電鍍銅增厚層，係形成於該些電性連接墊表面；以 及一防焊層，係形成於該基板表面，且該防焊層具有複數 開孔以顯露該些電鍍銅增厚層之部分表面。 在上述之結構中，復包括一金屬接著層，係形成於該 些開孔内之該電鍍銅增厚層表面。 20 X上述之結構中，復包括—焊料球，係形成於該些金 屬接著層表面，以供作該基板與印刷電路板電性連接之用。 本發明復提供一種封裝基板表面結構之製法，例如可 由下述但不限於此之步驟，其步驟包括：提供一基板，其 置球側表面具有一導電層，該導電層上覆蓋有一第一阻 7 1336514 層，且該第一阻層形成有開口區以顯露部份該導電層，並 於該開口區内所顯露之該導電層上電錢形成有—線路層， 該線路層具有複數電性連接塾；形成一第二阻層於該基板 表面且4第—阻層形成有複數開孔以顯露該些電性連接 塾；於該些開孔内形成一電鑛銅增厚層；移除該基板表面 之該第二阻層、該第一阻層及被該第一阻層覆蓋之該導電 層；以及形成-防焊層於該基板表面，並於該防焊層形成 有複數開孔以顯露該些電鍍銅增厚層之部分表面。 在前述的製法中，該第二阻層開孔之刀尺寸係:、 10 15 20 於該電性連接墊。 在前述的製法中，復包括於該防焊層之該些開孔内之 該電鍍銅增厚層表面形成一金屬接著層。 焊料^前述的製法甲，復包括於該金屬接著層表面形成一 本發明之封裝基板表面結構係在置球側之電性連接塾 表面形成電鑛鋼增厚層，藉以增加電性連接塾 ，以 焊料球接合進行迴科所需消耗之厚度，以提高 =可避免習知方法甲因電性連接墊厚度不足而發 卢：：問題。因此，本發明能提高封裝結構之可靠 又’俾以付合基板中線路之關鍵尺寸不斷縮小的趨勢。 【實施方式】 ::係藉由特定的具體實施例說明本發明之實施方 式’Μ此技藝之人士可由本說明書所揭示之内容輕易地 8 1336514 塾341 電鑛鋼增厚層％，係配置於該些電性連接 面；以及—防焊層P，係配置於該基板31表面，且 ^作層37具有複數開孔371以顯露該些電㈣ 之部分表面。 曰#曰·3〇 展”述之、°構’考复包括一金屬接著層38 ,係配置於防焊 之該些開孔371内之該電鑛銅增厚層36表面，該金屬接 38的材料為錫、銀、金所組成群組其中之一者。1336514 IX. Description of the Invention: [Technical Field] The present invention relates to a surface structure of a package substrate and a method of manufacturing the same, and more particularly to a package substrate suitable for solving a bonding strength between a ball-side electrical connection pad and a solder ball of less than 5 Surface structure and its method of preparation. [Prior Art] With the rapid development of the electronics industry, electronic products have gradually entered the direction of multi-functional and high-performance research and development. In order to meet the packaging requirements of semiconductor package high integration degree 10 and miniaturization, the package substrate with the main active and passive components and the line connection is gradually evolved from a single layer board to a multilayer board. In a limited space, the available wiring area on the package substrate is expanded by the interlayer connection technology to meet the requirements of the integrated circuit of the electronic investment. 15 Generally, the semiconductor package structure is to adhere the back surface of the semiconductor wafer to the crystallized side surface of the package substrate, and then perform wire bonding, or to laminate the semiconductor wafer active surface with a flip chip. The crystallized side surface of the package substrate is electrically connected, and the solder ball is implanted on the ball-side side surface for electrical connection with a printed circuit board. However, the package substrate process also faces the problem of insufficient bonding strength between the electrical connection pads of the ball-side surfaces and the solder balls in the trend of shrinking 20 critical dimensions (e.g., minimum line width). Please refer to Figures 1A and 1B for the conventional package substrate and solder ball bonding. As shown in FIG. 1A, the substrate includes a substrate 丨丨, and the ball-side surface Ua has 5 1336514. A circuit layer 12 ′. The circuit layer 12 has a plurality of electrical connections 塾i2i, and the ball-side surface Ha has an anti-bar. The layer 13 has a plurality of openings 131 for exposing the electrical connection pads 121. The H of the electrical connections (2) is steel. Furthermore, the metal back layer 14 is formed on the surface of the electrical connection pad 121 by means of electroless 5 electric ore. The metal back layer (4) material may be tin, silver, gold, etc., and is generally tin based on cost consideration to protect the electricity. The sexual connection pads 121 are protected from the intrusion of air or the like in an exposed environment. Next, a solder ball 15 is formed on the surface of the metal back layer 14 as shown in Fig. ΐ, and the material of the solder ball 15 is generally tin. Finally, the solder ball 15 can be joined to a printed circuit board via reflow 10 s ldering. Although such a structure and process can achieve the purpose of electrical connection. However, since the electrical connection pads 121 are attached to the solder balls 15, the atoms of the two metals of tin and copper diffuse and dissolve in the reflow process, and form a special crystal structure of the intermetallic compound between the two metal interfaces (intennetailic c〇mp 〇und) sn3Cu, so that the thickness of the 15 electrical connection pads 12 is thus reduced. Figure 2 shows a series of experiments in which tin of different thicknesses is used as the metal backing layer 14 to compare the number of reflows with the electrical connection pad 12, and the result shows that the thickness of the metal back layer 14 is 〇·89. The effect of the electrical connection pad 121 in the range of ~16.36 microns due to the formation of a intermetallic compound with tin metal (from the metal back layer 14 or the solder 20 ball 15) results in a reduction in the thickness of the electrical connection pad 121 by about 10 microns. In the case where the thickness of the copper is consumed, in the current high degree of integration of the semiconductor package and the miniaturization of the packaging requirements, the line layer and the width and the line layer spacing have a relative proportional relationship, and the outermost circuit layer 12 includes an electrical connection pad 121 formed at the same time, because 6 1336514, when the thickness of the circuit layer 丨 2 decreases with the width, the thickness of the corresponding electrical connection pad 121 also decreases, and the electrical connection When the pad 121 is bonded to the solder ball b, a metal intermetallic compound effect occurs again, causing the thickness to decrease, so that the electrical connection pad 121 faces insufficient thickness to provide sufficient bonding strength with the solder ball 5, and the electrical connection pad 121 is to be made. The solder balls 15 on the top are easy to fall, and in other cases, the package substrate and the printed circuit board are not firmly bonded and separated, and thus the reliability is not required. SUMMARY OF THE INVENTION In view of the above disadvantages of the prior art, the main object of the present invention is to provide a surface structure of a package substrate and a method for fabricating the same, which can solve the problem of insufficient bonding strength with solder balls due to insufficient thickness of the electrical connection pads on the ball side surface. The problem. In order to achieve the above and other objects, the present invention provides a package substrate surface, . And a substrate having a plurality of electrical connection 15 pads on the ball-side surface; an electroplated copper thickening layer formed on the surface of the electrical connection pads; and a solder resist layer formed on the surface of the substrate And the solder resist layer has a plurality of openings to expose a portion of the surface of the electroplated copper thickening layer. In the above structure, a metal backing layer is formed on the surface of the electroplated copper thickening layer formed in the openings. In the above structure, a solder ball is formed on the surface of the metal backing layer for electrically connecting the substrate to the printed circuit board. The present invention provides a method for fabricating a surface structure of a package substrate, for example, the following steps are not limited thereto, and the method includes the steps of: providing a substrate having a conductive side layer on a ball-side surface thereof, the conductive layer being covered with a first resistance a layer of 13 1336514, and the first resist layer is formed with an open area to expose a portion of the conductive layer, and the conductive layer is exposed on the conductive layer in the open area to form a circuit layer having a plurality of electrical properties Connecting a crucible; forming a second resist layer on the surface of the substrate; and forming a plurality of openings in the first resist layer to expose the electrical connection ports; forming an electro-copper thickening layer in the openings; removing The second resistive layer on the surface of the substrate, the first resistive layer and the conductive layer covered by the first resistive layer; and a solder resist layer formed on the surface of the substrate, and a plurality of openings are formed in the solder resist layer To expose portions of the surface of the electroplated copper thickening layer. In the foregoing manufacturing method, the size of the second resistance layer opening is: 10 15 20 to the electrical connection pad. In the foregoing method, a surface of the electroplated copper thickening layer included in the openings of the solder resist layer forms a metal back layer. The soldering method of the foregoing method comprises forming a surface structure of the package substrate of the present invention on the surface of the metal bonding layer, and forming an electric ore thickening layer on the surface of the electrical connection layer on the ball-side side, thereby increasing the electrical connection. Thickness required for the return of the solder ball by the solder ball to improve = can avoid the conventional method A due to insufficient thickness of the electrical connection pad:: Problem. Therefore, the present invention can improve the reliability of the package structure and the tendency for the critical dimensions of the lines in the substrate to be continuously reduced. [Embodiment] The embodiment of the present invention is described by a specific embodiment. The person skilled in the art can easily illuminate the steel layer by 8 1336514 塾 341 by the content disclosed in the present specification. The electrical connection surfaces; and the solder resist layer P are disposed on the surface of the substrate 31, and the layer 37 has a plurality of openings 371 to expose portions of the surface of the electricity (4).曰#曰·3〇展”, the structure of the structure includes a metal back layer 38, which is disposed on the surface of the electric copper thickening layer 36 in the openings 371 of the solder resist, the metal joint 38 The material is one of the group consisting of tin, silver and gold.
10 1510 15
著芦‘構’復包括一烊料球％，係配置於該金屬接 曰^ ，以供作該基板31與印刷電路板電性連接之用。 綜上所述，本發明係利用在封裝基板置球側表面的電性 連接墊上形成-電鍍銅增厚層，以供給其與焊料球接合進 行迴焊時所需消耗之厚度，以提高接合強度，可避免習知 去中因電性連接塾厚度不足而發生產品失效的問題。故 本發明可提高封裝結構之可靠度，俾以符合基板中線路之 關鍵尺寸不斷縮小的趨勢。 上述實施例僅係為了方便說明而舉例而已，本發明所 主張之權利範圍自應以申請專利範圍所述為準 於上述實施例❶ 【圖式簡單說明】 圖1A及1B係習知之封裝基板表面結構剖視圖。 圖2係習知之封裝基板上電性連接墊厚度消耗情形之 示意圖。 圖3A至3G係本發明一較佳實施例之封裝基板表面結 構製作流程剖視圖。 11 ^36514 圖4A及4B係本發明另一較佳實施例之封裝基板表面 結構製作剖視圖。 【主要元件符號說明】The reed "construction" includes a ball of ball % disposed on the metal plate for electrically connecting the substrate 31 to the printed circuit board. In summary, the present invention utilizes an electroplated copper thickening layer formed on an electrical connection pad on the ball-side side of the package substrate to supply a thickness required for reflow soldering to the solder ball to improve bonding strength. It can avoid the problem of product failure due to insufficient thickness of the electrical connection. Therefore, the present invention can improve the reliability of the package structure and conform to the trend of shrinking the critical dimensions of the lines in the substrate. The above-mentioned embodiments are merely examples for convenience of description, and the scope of the claims of the present invention is based on the above-mentioned embodiments as described in the patent application. [FIG. 1A and 1B are conventional package substrate surfaces. Structural cross-sectional view. Fig. 2 is a schematic view showing the thickness consumption of the electrical connection pads on the package substrate. 3A to 3G are cross-sectional views showing a process of fabricating a surface structure of a package substrate in accordance with a preferred embodiment of the present invention. 11^36514 Figs. 4A and 4B are cross-sectional views showing the surface structure of a package substrate in accordance with another preferred embodiment of the present invention. [Main component symbol description]
U,31 基板 11a,31a 置球侧表面 12,34 線路層 13,37 防焊層 14, 38 金屬接著層 15,39 焊料球 32 導電層 36 電鍍銅增厚層 131,371 開孔 33 第一阻層 330 開口區 35 第二阻層 351 開孔 121,341 電性連接墊 12U, 31 substrate 11a, 31a ball side surface 12, 34 circuit layer 13, 37 solder resist layer 14, 38 metal back layer 15, 39 solder ball 32 conductive layer 36 electroplated copper thickening layer 131, 371 opening 33 first resistive layer 330 open area 35 second resist layer 351 opening 121, 341 electrical connection pad 12