TWI309837B - Dll driver control circuit - Google Patents
Dll driver control circuit Download PDFInfo
- Publication number
- TWI309837B TWI309837B TW095123974A TW95123974A TWI309837B TW I309837 B TWI309837 B TW I309837B TW 095123974 A TW095123974 A TW 095123974A TW 95123974 A TW95123974 A TW 95123974A TW I309837 B TWI309837 B TW I309837B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- dll
- clock
- delay
- receiving
- Prior art date
Links
- 239000000872 buffer Substances 0.000 claims description 12
- 230000003111 delayed effect Effects 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 2
- 210000003205 muscle Anatomy 0.000 claims description 2
- 206010011469 Crying Diseases 0.000 claims 1
- 230000003213 activating effect Effects 0.000 claims 1
- 230000003139 buffering effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 18
- 230000001960 triggered effect Effects 0.000 description 6
- 102100022692 Density-regulated protein Human genes 0.000 description 4
- 101001044612 Homo sapiens Density-regulated protein Proteins 0.000 description 4
- 230000000630 rising effect Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 2
- 102100028043 Fibroblast growth factor 3 Human genes 0.000 description 1
- 108050002021 Integrator complex subunit 2 Proteins 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010076 replication Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2227—Standby or low power modes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20050091650 | 2005-09-29 | ||
| KR1020050125353A KR100753100B1 (ko) | 2005-09-29 | 2005-12-19 | 반도체 메모리 장치의 지연고정루프 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200713331A TW200713331A (en) | 2007-04-01 |
| TWI309837B true TWI309837B (en) | 2009-05-11 |
Family
ID=37959238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095123974A TWI309837B (en) | 2005-09-29 | 2006-06-30 | Dll driver control circuit |
Country Status (3)
| Country | Link |
|---|---|
| KR (1) | KR100753100B1 (ko) |
| CN (1) | CN1941172B (ko) |
| TW (1) | TWI309837B (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI732558B (zh) * | 2020-05-18 | 2021-07-01 | 華邦電子股份有限公司 | 延遲鎖相迴路裝置及其操作方法 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100935602B1 (ko) * | 2008-06-24 | 2010-01-07 | 주식회사 하이닉스반도체 | 클럭 드라이버 및 이를 포함하는 반도체 메모리 장치 |
| KR100988809B1 (ko) * | 2008-11-06 | 2010-10-20 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 출력인에이블 신호 생성 방법 |
| TWI401693B (zh) * | 2009-01-05 | 2013-07-11 | Nanya Technology Corp | 電壓提供電路、以及使用此電壓提供電路的訊號延遲系統 |
| CN102081965B (zh) * | 2011-02-21 | 2013-04-10 | 西安华芯半导体有限公司 | 一种产生dram内部写时钟的电路 |
| US11004499B1 (en) * | 2020-05-08 | 2021-05-11 | Winbond Electronics Corp. | Latency control circuit and method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100333708B1 (ko) * | 1999-12-24 | 2002-04-22 | 박종섭 | 전력 소모를 감소시킨 지연고정루프 |
-
2005
- 2005-12-19 KR KR1020050125353A patent/KR100753100B1/ko active IP Right Grant
-
2006
- 2006-06-30 TW TW095123974A patent/TWI309837B/zh not_active IP Right Cessation
- 2006-09-11 CN CN2006101515301A patent/CN1941172B/zh not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI732558B (zh) * | 2020-05-18 | 2021-07-01 | 華邦電子股份有限公司 | 延遲鎖相迴路裝置及其操作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1941172A (zh) | 2007-04-04 |
| KR100753100B1 (ko) | 2007-08-31 |
| CN1941172B (zh) | 2011-11-23 |
| TW200713331A (en) | 2007-04-01 |
| KR20070036560A (ko) | 2007-04-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |