TWI283917B - Electronic chip and electronic chip arrangement - Google Patents

Electronic chip and electronic chip arrangement Download PDF

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Publication number
TWI283917B
TWI283917B TW091112208A TW91112208A TWI283917B TW I283917 B TWI283917 B TW I283917B TW 091112208 A TW091112208 A TW 091112208A TW 91112208 A TW91112208 A TW 91112208A TW I283917 B TWI283917 B TW I283917B
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Taiwan
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wafer
electronic
contact
external
contacts
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TW091112208A
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English (en)
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Franz Kreupl
Werner Simburger
Wolfgang Honlein
Helmut Klose
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Infineon Technologies Ag
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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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Description

1283917 A7 B7 五、發明説明（i ) 發明描述 本發明係關於電子晶片與電子晶片裝置。 為了使兩個完全處理的電子晶片間或一個處理晶片與一 個週邊單元間形成機械的與電子的連繫，所知的是兩個電 子晶片間的垂直連接係經由兩個電子晶片的外部晶片金屬 接點來連接，而其藉由焊接的接合而使其互相連接。 圖2顯示一個已知此類型之晶片裝置200。 該晶片裝置200具有一個第一個電子晶片201與第二個電 子晶片202，而該第一個電子晶片201與第二個電子晶片 202經由電子而使其互相連接。 在一應用至一基材203之層順序中，第一個晶片201具有 複數個的電子元件，其依各層的順序使用基材203，而該 複數個的電子元件即一個電子暫存器204、一個電容器205 及一個感應器206，它們被整合於第一個電子晶片20 1中如 電子電路207。 再者，第一個晶片具有一個第一個外部晶片金屬接點 208，經由此接點該第一個電子晶片201電子地連接至該第 二個電子晶片202。 第二個電子晶片202同樣的具有一個電子電路（未顯示於 圖中）其被整合於該第二個晶片20-2中。再者，第二個電子 晶片202包括一個第二個外部晶片金屬接點209，其被用來 與第一個電子晶片201之第一個電子晶片金屬接點208作電 子連接。 為了電子地連接該兩個晶片金屬接點208，209，焊材 -4- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 1283917 A7 ΓΖ--------- Β7 五、發明説^ 5----- 210經常是一個電子地導體金屬連接使用於該兩個外部晶 片金屬接點208，209間。該兩個外部晶片金屬接點2〇8 , 209、、二由焊材21〇而連接，較佳的結果是該晶片金屬接點 208 , 209是由焊材210所焊接的。 已知許多方法能使兩個完全處理的電子晶片產生連接， 例如球型格陣列方法（BGA)、倒裝方法（FC)、超薄型晶片 封包方法（FSC)，塑料雙排封包方法（pDIp)，面裝扁方型 封包方法（QFp)或小型輪廓積體電路方法（SOICs)。 這些方法的一般外觀是用來作為接點，該外部晶片金屬 接點被焊接於另外一個或是經由結合電線（bonding wire)或 是至少經由金屬而連接。 如果一個電子晶片是設計如測試晶片用以測試另一個複 雜晶片運作的準確度，則連接該測試晶片的外部金屬接點 至一個測試連結是必需的，該測試晶片同樣的具有一個晶 片金屬接點，該電子晶片將測試各種情況。這經常發生於 已知的針卡（needle cards)，即無疑地該金屬接點為針狀的 形式。 己知的兩個電子晶片間的連接是使用金屬層或結合電線 通常是使用金屬元素來連接的，而其有幾個缺點。 特別是在高頻應用的情況下，該結合材料之電流載波容 量的限制是不利的，因其將導致相當的熱量與一個並非不 明顯的電阻於晶片連接的部份。 再者，該大量的機械負荷意味著金屬在其自身的連接上 可能會破裂及產生損壞，此可能導致電子接點上的損壞或 -5- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)
訂
線 1283917 、發明説明（3 甚或使電子接點不再存在。 太具有暴露於外的觸覺感應器，其内許多複雜的 丁、米私線將因複數個接點的元音 ^ ^ , 素而增長。一個經由感應器 己錄的70素會㈣奈米電線機械彎曲的結果，如此該咸 個電線短路。 山，觸到另一個時便形成一 [2] 描述一個微電子元件太 點之製造元素間，該孔埴滿了//孔層於兩個電導體接 金屬填充孔而電子地連接\屬’因此該接點元素經由 [3] 描述的是一個製造奈米碳管的方法。 [4] 揭示另一個電子測量感應器。 文件[5] ’只先前於本發明前—曰後公開，描述一個元 件至少具有兩個電路層經由奈米碳管電子於垂直方向連接 至另外一個。 因此本發明係、基於連接電子晶片至另—晶片時經由一個 外邵電子晶片接點的電子傳導方法的問題而產生，其中裝 置的連接較少受影響而致錯誤。 該問題將由本專利申請書描述之電子晶片與電子 置的特徵而獲得解決。 電子晶片具有一個複數個的外部晶片接點，較佳地是— 個複數個的晶片金屬接點，而每個電子晶片中複雜的夺米 電管被用來作為電子晶片與另一電子晶片間的接點。、 其他的電子晶片同樣的具有複數個的外部晶片接點，較 佳地是一個複數個的晶片金屬接點。該複雜的奈米電管= -6 - 1283917 五、 發明説明（ 每個外部晶片接點均 认甘A j;^連接至一個相對應且明顯地伴隨 万；其他電子晶片的外 ,,Ό 邵日日片的接點。在此情況下，應注意 的疋不同晶片接點的夺 点丨』曰u 土 丁、木电官，例如晶片連接另一個晶片 :二、需不會碰觸到另外-個，否則不欲產生的短路便可 了阳片接點的奈米電管只能連接至相對應於其他 电子晶片的晶片接點所需的地方，於是乎、顯然地，電子 要點“牝產生於所需的外部晶片接點之間。 、據本發$ .個電子晶片應瞭解其意義為一個電子晶 片具有其慣用的完全處理方法。 、η;兄τ ’完全處理表示所有涉及製造整合於該晶片 _甩子私路中之處理步驟已被計算且剩餘須實行的係為殼 月豆之相關裝修（fitting)之任何包裝處理步驟。 於此情況下，一個外部晶片接點應瞭解其意義為一個晶 片的電子接點其留存於該晶片完成之後，當外部晶片骚動 亦P由個士置於鄰近晶片例如使用另一個晶片中的 元素所驅動或交換信息。 一個電子晶片裝置具有一個第一個電子晶片與一個第二 個電子晶片。該第一個電子晶片具有一個複數個的外部晶 片接點，而複雜的奈米電管使用於該接點作為第一個電子 晶片與第二個電子晶片的連結。該第二個電子晶片同^的 具有複數個的外部晶片接點其可使用電子及機械的接點與 奈米電管連結，而該奈米電管使用於第一個電子晶片的第 一個晶片接點。每個第一個電子晶片之外部晶片接點的齐 米電管精確地連接至第二個外部晶片接點的外部晶片接 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐） 1283917 五 發明説明（ 點。 =也十本發明可考慮常駐於奈米電管中，較佳的是在 個中，以作為電子地接點，經由外部晶片接點 個疋全處理電子晶片連結至另一個。 相表於使料接材料來連接兩個電子晶彳，本發明使用 =電管具有優勢，特別是奈米電管通常具有彈性，因而 機械性的料與電子連接的可#性在連接上均較為穩定， 、而可作為外部晶片間的接點。此可特別歸因於富有彈性 的模組約為一個丁pa。 再者，於此情況下，通常應指出的是奈米電管的強韌 性，其於電子晶片之外部晶片接點與另一個外部晶片接點 間的穩定性具有相當的改良· 依據本發明另一個連接上的優點是考慮常駐於奈米電管 中’事實上奈米電管在化學上是相當惰性的。 一般習慣上會使用奈米碳管，該電子導體奈米碳管的電 瓦載波容量特別大於其他金屬丨000倍以上，例如一個習慣 上用於兩個電子晶片間連接的銅之電流載波容量。 另一個考慮常駐的優點是奈米電管的熱傳導係數，其值 約為6000瓦特/克，然而銅的熱傳導係數大約是400瓦特/ 克。 再者，應注意的是，在固定金屬連接於電子晶片間的情 況下，不同的熱膨脹係數經常導致相當的機械應力於焊材 上，當循環的變化熱傳載時，可能導致元件或是外部晶片 接點及/或金屬連接上的毀損。 -8 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱） 1283917 五、發明説明（6 I ，此=於高頻應用時特別重要，即在高頻晶片中，因為 匕們通吊在運作時會有特別高流量的消耗，此將導致電子 晶片相當的熱能。 使用奈米電管，特別是太尖 j疋7、未碳官，以下兩個觀點將會降 低上述的問題:首先，奈米電管的高熱傳導表示熱能可快 速地政發到％境中，其次是發生於連接上的剪力可經由奈 米私巨而心氏’其可輕易地移向水平方向而本質上卻仍舊 是穩定的，不會使奈米電管自身受到損壞。 e 本發明較佳的精鍊展現於所附的申請專利說明書中。 該奈米電管可設計如奈米碳管，而於此情況下特別是如 ，或電之半導體的奈米碳管。該晶片的接點，較佳的 是由金屬組成且因此也參照於如下之晶片金屬接點，其可 包含一個順序層特別是包含三層，也就是K固晶片^屬 接觸層與一個觸媒層使用於此。該觸媒層包括材料其具有 之觸媒反應與奈米電管的增長有關，較佳的是與奈^碳管 的增長相關。在此情況下，應瞭解一個觸媒層為個別觸媒 材料的單獨叢集的集合，亦即換句話說該觸媒層並不需要 包含一個觸媒材料的連續層。 在此情況下，應注意的是該晶.片金屬接觸層其自身也可 能由金屬所組成，其具有之觸媒效果端視奈米電管的增長 而反應。 觸媒材料的使用是相當地簡化而且端視奈米電管而加速 增長。 & σ 居曰g片金屬接點’特別是晶片金屬接點層，可能由任何 _ -9- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) --- 1283917
戶二需的材料所製成，較佳的是由銘及/或鋼，或由任何所 *的金屬合金，較佳的是由上所提及的兩個材料金金 所製成。 錄姑或鐵或此三者之混合物可以使用如觸媒材料。 依據本發明的精鍊，提供了該奈米電管焊接於外部晶片 金屬接點以進一步強化該機械的接點，亦即外部晶片接點 與個別的奈米電管末端間的機械連接，因此該晶片連結上 之機械穩定性便進一步增進了。 另外’外部晶片接點與個別奈米電管末端間的機械性連 接可經由電子連接而產生。 依據本發明的一個裝置’該電子晶片設計如一個測試晶 片，亦即當一個晶片可用於測試另一個電子晶片的前置決 定功能。在此情況下，該奈米電管顯然地提供了一種替代 標準給針卡而用於晶片來作接點其可於每個狀態下測試。 該測試晶片可具有一個整合的測試電路，其進一步的增 長係依賴其處理電子信息。 如果該帛個％子晶片不是設計成如一個測試晶片且該 電子晶片裝置具有兩個電子晶片當其與於另一個電子晶片 成永久的接點時，冑奈米電管可能焊接至個別的外部Ζ片 元素金屬末端的兩端’其結果是該機械與電子的穩定性及 也因而進一步的增加了。 -般條件下，本發明可利用於任何所需的電子晶片數目 其可利用與另一個電子晶片連結。 本發明特別適用於高頻的應用，亦即用於高頻率的元件 —-10- ^紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公---------- - 1283917 五 、發明説明（8 或高頻率的晶片。 細郎如下 本發明範例實施例展現 附圖簡述： 及更夕的解說糸 圖1所頜示為依據本發 個電子》 之 晶片裝置於其製程的第―二：個範例實施例 圖2所顯4依據先前料㈣ 圖3所顯示為依攄太菰⑽， 日片裝置， 晶片裝置於其製程的個範例實施例之-個電子 依據本發明第-個範例實施例之—個” 片裝置於其製程的第三時間· 個电子 圖5所顯示為依據本發 曰曰 士挞罢、人甘制 弟~個乾例貫施例之一個泰早 片裝置於其製程的第二時間；及 彳固包子 圖6所顯示以電子顯微 圖像，並中太央浐总个啜月又丑子晶片的平面 圖像上丁、未蛟官已增長至外部晶片接點。 圖1所顯示為依據本發明第-個範例實施例之-個電子 晶片裝置100於其製程的第_時間。 包
該晶片裝置100具有-個第-個電子晶片101及一個第二 個電子晶片1〇2 ’其利用機械與電子的接 晶片連結。 ^ T 該第一個電子晶片101及該第二個電子晶片1〇2每個具有 -個整合的電子電路’然而為了簡化解釋本發明，該整合 電子電路其並未顯示於圖中。 一個包含鐵的觸媒層104使用在第一個電子晶片ι〇ι的接 點墊上，亦即，在外部晶片金屬接點1〇3上，經由剝離處 -11 - 1283917
理而包含鋁，依據此範例之實施例，該觸媒層1〇4包含一 個複數個的金屬微粒，在特別的金屬叢集中包含鐵，而安 置於相鄰的另外一個中。 另外’該外部晶片金屬接點1〇3可與觸媒材料一起直接 利用於本質是完全處理電子晶片1 〇 1 ’而取代該觸媒於下 一步驟的利用。 該觸媒層104之厚度薄如5毫米至10毫米。 然後’奈米碳管105增長至所需的高度，依據本發明範 例之實施例增長至大約100微米至5〇〇微米的高度，使用 CVD方法或是電漿增長CVD (PECVD)方法，依據本發明範 例實施例在攝氏溫度600度下使用乙炔（C2h2)且在1〇陶爾 的壓力下加熱30分鐘。 依據本發明範例之實施例，該外部晶片金屬接點1 〇3為 一長方形的形狀，每邊長度為50微米至100微米。 進一步驟，該奈米碳管105及第一個電子晶片1〇1之晶片 金屬接點103移動至本地相同的位置且機械接點於第二個 電子晶片1 02之晶片金屬接點106，即該奈米碳管1 〇5對齊 於該第二個電子晶片102之晶片金屬接點1〇6。 然後，該奈米破管105内崁於金屬接點層103内的鋁中， 即晶片裝置100的結果加熱於氫氣的環境下加熱超過攝氏 660度的溫度然後經由快速加熱的製程方法再度冷卻。 以此方法，該奈米碳管105 ’在個別的第一個末端1 〇7， 被固定連接至第一個電子晶片1 〇 1之外部晶片金屬接點1 〇3 中的鋁，即穩固於鋁上’而後該第一個電子晶片1 〇 1便與 -12- 本紙張尺度適用中國國家標準(CNS) A4规格(210 X 297公釐)
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線 1283917 A7 B7 五、發明説明（10 上述需求的接點表面對齊，即第二個電子晶片102之晶片 金屬接點106，隨後再於超過攝氏660的溫度下加熱於氫氣 的環境中而後經由快速加熱的製程方法後再度冷卻。如此 該個別的第二個末端108固定連接至第二個電子晶片102之 外部晶片金屬接點106中的鋁，即穩固於鋁中。 奈米碳管105的個別末端1 07，108明顯地經由快速加熱 的製程方法焊接於該外部晶片金屬接點1 〇3，106上。 圖3所顯示為晶片裝置1〇〇在焊接奈米碳管1〇5之第一個 末端107至第一個電子晶片1〇1晶片之金屬接點103發生後 的狀態，相同的元件使用相同的參照號碼。 換句話說，焊接所產生晶片裝置i 〇〇的成果，是在奈米 碳管105增長之後，短期間加熱該晶片金屬接點1〇3，ι〇6 材料至其共熔溫度之上，以此方法將該奈米碳管1〇5内崁 於該晶片金屬接點103，106的材料上。此以相同的方法將 該崁該奈米碳管105的另一末端1〇8内崁於該第二個電子晶 片102之晶片金屬接點1〇6上。 銘或任何其他所需的金屬或金屬混合物，例如 Pb40Sn60 ’ Pb95Sn5或任何其他所需共熔的混合物可如材 料般的使用將奈米碳管105的末端1〇7，i〇8内崁於晶片金 屬接點103，106上，以便和奈米碳管作連接。 圖4所顯π電子晶片裝置1〇〇於奈米碳管1〇5的第二末端 108已崁入的狀態，即焊接至該第二個電子晶片1〇2的外部 晶片金屬接點106上。
訂
缘
1283917 A7 B7
五、發明説明（„ 於此狀況下，應注意的是該兩個焊接”也可結合形成 -個結合快速加熱的製程步驟’ 焊接步驟。 圖5所顯示為依據本發明之第二個範例實施例的一個電 子晶片裝置500。 依據第二個範例實施例，一個第一個電子晶片5〇ι設計 成如一個測試晶片501而使用於測試另一個被測試的電子 晶片’於此-範例實施例中顯示，基本上晶片5()2為被測 試者。 該測試晶片501具有一個測試電路（未顯示於圖中）整合 於其内而至少有一個外邵晶片金屬接點5〇3，原則上任何 所*之晶片金屬接點503的數目如上所述的方法被焊接至 該奈米碳管505的第一個末端507時其觸媒層5〇4已經增 長。測試電路整合於該測試晶片5〇丨中設計其可用於檢查 電子晶片502之前置決定所需的功能而作為測試。 依據此範例實施例，該第二末端5〇8並未固定地焊接於 該電子晶片502之外部晶片金屬接點5〇6上其僅用於測試， 然而’其測試用途，僅僅是利用機械及電子的接點並用以 測試晶片502的外部晶片接點5〇6，為了以此方法測試電子 晶片502的例行步驟，該測試被測試且執行。 圖6所顯示以電子顯微鏡掃描電子晶片600其具有複數個 之方型外部晶片金屬接點及具有應用於此之奈米碳管且明 顯地形成奈米碳管的叢集於個別的晶片金屬接點。 如下之公開案被引述於本發明中： [1]EP 1 087 413 A2 -14- 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐） 1283917 A7 B7 五、發明説明（12 ) [2] US 5,805,426 [3] EP 1 096 533 A1 [4] US 6,020,747 [5] US 6,340,822 B1 符號對照表 10 0晶片裝置
101第一個電子晶片 102弟二個電子晶片 103第一個電子晶片之外部晶片金屬接點 104觸媒層 105奈米碳管 106第二個電子晶片之外部晶片金屬接點 107奈米碳管之第一個末端 訂
108奈米碳管之第二個末端 200晶片裝置 201第一個電子晶片 202第二個電子晶片 203基材 204暫存器 205電容器 206感應器 207整合電路 208第一個電子晶片之外部晶片金屬接點 209弟二個電子晶片之外部晶片金屬接點 -15- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 1283917 A7 B7 五、發明説明（13 ) 2 10金屬連接 500晶片裝置 5 0 1測試晶片 502被測試晶片 5 03測試晶片之外部晶片金屬接點 504觸媒層 505奈米碳管 506被測試晶片之外部晶片金屬接點 507奈米碳管之第一個末端 508奈米碳管之第二個末端 600電子晶片 -16- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)

Claims (1)

  1. f青案 (绛年坪1
    1283¾¾则。8 號專利申 中文申請專利範圍替換; 六、申請專利範圍
    1 ·種具有一第一電子晶片和一第二電子晶片之電子晶片 裝置， 其中該第一電子晶片具有複數個外部晶片接點，其中 複數個奈米電管被施加至其上，以便使該第一電子晶片 和該第二電子晶片接觸； 、其中孩第二電子晶片具有複數個不具有奈米電管之外 部晶片接點，其可與被施加至該第一電子晶片之該等外 部晶片接點之奈米電管接觸； 琢罘一電子晶片之一電子晶片接點之該等奈米電管係 準確地與該第二外部晶片之一外部晶片接點接觸。 2·如申請專利範圍第1項之電子晶片裝置，其中該複數個 奈米電管係為複數個奈米碳管。 3 ·如申請專利範圍第1 4 2項之電子晶片裝置，其中該第 日口片之外部日日片接點具有一個晶片接點層及一個 施加於其上之觸媒層，當該奈米電管增長時，該觸媒層 之材料具有一觸媒作用。 4·如申請專利範圍第1 < 2項之電子晶片裝置，其中該第 一電子晶片之晶片接點及/或該第二外部晶片之外部晶 片接點包括至少一種如下之金屬： 鋁，及 銅。 5·如申請專利範圍第3項之電子晶片裝置，其中該觸媒層 包括至少一種如下之金屬： 錄，及
    A8 B8
    、申請專利範 圍 C8 D8 始，及 >ib ^申請專利範圍第4項之電子晶片裳置，其中該觸媒層 I括至少一種如下之金屬： 鎳，及 餘’及 鐵。 7·如申請專利範圍第1或2項之電子晶片裝置，其中該奈 ，，管被焊接至該第一電子晶片之外部晶片接點及/或 藏第二電子晶片之晶片接點。 8·如申請專利範圍第丨或2項之電子晶片裝置，其中該奈 米電管係電子機械性地連接至該第一電子晶片之外部晶 片接點及/或該第二電子晶片之晶片接點。 9 ·如申請專利範圍第1或2項之電子晶片裝置，其中該電 子晶片設計成如一個測試晶片。 10·如申請專利範圍第9項之電子晶片裝置，其中該測試晶 片具有一個整合的測試電路。 -2- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐）
TW091112208A 2001-06-06 2002-06-06 Electronic chip and electronic chip arrangement TWI283917B (en)

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