TWI280643B - Packaged device and method of forming same - Google Patents

Packaged device and method of forming same Download PDF

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Publication number
TWI280643B
TWI280643B TW094127964A TW94127964A TWI280643B TW I280643 B TWI280643 B TW I280643B TW 094127964 A TW094127964 A TW 094127964A TW 94127964 A TW94127964 A TW 94127964A TW I280643 B TWI280643 B TW I280643B
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Taiwan
Prior art keywords
die
ball
balls
integrated circuit
conductive
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Application number
TW094127964A
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English (en)
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TW200620589A (en
Inventor
Chee-Seng Foong
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Freescale Semiconductor Inc
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Publication of TW200620589A publication Critical patent/TW200620589A/zh
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Publication of TWI280643B publication Critical patent/TWI280643B/zh

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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486Via connections through the substrate with or without pins
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Description

1280643 九、發明說明: 【發明所屬之技術領域】 本發明係關於積體電路封裝,且更特定言之係關於一種 用於製造一球狀柵格陣列(BGA)封裝裝置之經改良的方法。 【先前技術】 一積體電路(1C)晶粒為一形成於例如矽晶圓之半導體晶 圓上之小裝置。-引線框為一通常包含一支撐自晶圓切割 之1C晶粒的踏板之金屬框架。該引線框亦具有提供外部電 連接之引線指狀物。即,該晶粒係附著至該晶粒踏板且然 後該晶粒之接合襯墊係經由導線接合或覆晶凸塊連接至^ 等引線指狀物以提供外部電連接。以—保護性材料囊封該 晶粒及該等導線接合或覆晶凸塊形成—封裝。視封裝類型 而定,該等外部f連接可原態(as_is)用於例如—薄型小型封 裝(TSOP)中’或例如藉由附著用於一 BGA之球形焊球經進 -步處理。此等終點允許晶粒與其它電路電連接,例如在 -印刷電路板上。然而,若需要像化學㈣及⑽之類的 步驟’形成-引線框及封裝一裝置可為昂貴的且費時的。 因此’需要消除該等蝕刻步驟,且進一步,消除對引線 框的需要。亦需要具有一種減小經封裝的1(:之尺寸之方法。 【發明内容】 / 本發明提供-種封裝一積體電路晶粒之方法,包含以下 步驟: 將複數個傳導性球裝載至形成於—壓板上之凹座; 將該壓板轉移至一鑄模之—第一部分之一空穴; 103814.doc 1280643 :〆鑄模之帛一部分向該等傳導性球上擠麼,藉此至 少局部平整該等傳導性球之一頂部表面; 冑第—鑄模化合物注人至該鑄模中,其中該第-鑄模 化合物圍繞該等傳導性球之經曝露的部分; ㈣塵板移除料料性球,其巾該等傳導性球由該第 一鑄模化合物保持在一起; 、將-積體電路晶粒之—第—側附著至複數個該等傳導性 Φ 球,其中該晶粒係由其它該等傳導性球圍繞,· :在U SB粒之第一側上之晶粒接合襯塾電連接至圍繞 該晶粒之相應該等傳導性球;以及 以一第二鑄模化合物囊封該晶粒之至少第二侧、該等電 連接及至少部分該等傳導性球。 在另實施例中,可將一散熱片與該等傳導性球及附著 至該散熱片一表面之晶粒共平面定位。 本發明進一步提供一經封裝的積體電路晶粒,其具有複 Φ 數個八有頂部、經平整的表面之傳導性球及一將該等複 ^個傳導性球保持在—起之第—鑄模化合物。該等球之頂 部、經平整的表面大體上與該第一鑄模化合物之一頂部表 /平面且孩專球之底部、相反的表面係經曝露的。一 ^有第側之積體電路晶粒係附著於複數個該等傳導性 球。該晶粒係由其它該等傳導性球圍繞。該晶粒電麵接至 其㈣等傳導性球。-第二鑄模化合物囊封至少一與該晶 粒第一側相反的該晶粒之第二側,及該等傳導性球之頂部 表面。 1038l4.doc !28〇643 【實施方式】 以下結合附圖提出的實施方式意欲作為本發明之目前較 佳實施例之一描述,且並不意欲代表可實踐本發明之唯一 形式。應瞭解可藉由本發明之精神及範疇所意欲包含的不 同實鈀例達成相同或等效的功能。此外,熟習此項技術者 應瞭解’該等圖式已經簡化且並未按比例畫出。 現參考圖1,顯示根據本發明之一實施例形成的一經封裝 _ 的半導體裝置10之一放大的橫截面視圖。封裝裝置1〇包含 具有一頂部、經平整的表面14及底部、相反的表面16之複 數個傳導性球12。一第一鑄模化合物18將該等複數個傳導 性球12保持在一起。該等球12之頂部、經平整的表面“與 該第一鑄模化合物18之一頂部表面大體上共平面,且該等 球12之底部、相反的表面16係經曝露的。一積體電路晶粒 20具有一第一側22,其附著至複數個該等傳導性球12。晶 粒20係由其它該等傳導性球12圍繞且該晶粒2〇係電耦接至 • 其它該等傳導性球12上。一第二鑄模化合物24囊封至少與 該晶粒20第一側22相反的該晶粒之一第二側26,及該等傳 導性球12之該等頂部表面14。對於熟習此項技術者而言第 二禱模化合物為一已知類型的,且其係通常用於封裝積體 電路。 傳導性球12較佳地為C5(控制崩潰晶片載體連接, Controlled CollapSe Chip Carrier〜⑽⑽化…焊球。該等球 12係以-導電材料製作,使得電訊號可經此傳遞。該傳導 性材料可為一金屬,例如銅或金,或其合金;或一軟焊料, 103814.doc 1280643 例如63/37材料(63%錫,37%鉛)或9〇/1〇(9〇%錯,鳩錫)。 或者,該等軟球14可由-具有金屬表面修整之聚合物基底 材料製造。可藉由使用無鉛金屬球達成一無鉛封裝。· 該等球12之底部表面16隸曝露的且允許將積體電路晶 粒12連接至-印刷電路板。如熟習此項技術者已知,該等 球12係用於自/向晶粒2〇及一基板或印刷電路板(未圖示飧 遞資料、功率及地面訊號’而晶粒2〇附著之其它該等球Η 可自晶粒12傳導熱(意即,熱管理)且增強板水平焊接點強 度。即,在晶粒20下之球12提供一增強板水平焊料強度之 可焊接表面。注意到在角落的球及沿著封裝邊緣的球^ 提供增強該封裝機械強度之連接。 球12之頂部表面16係經平整的且共平面的。如以下所詳 細討論的,可藉由擠壓平整頂部表面16。以第一鑄模化合 物1 8將球12保持在一起。對於熟習此項技術者而言第一鑄 杈化合物18為一已知類型的,且其係通常用於封裝積體電 路。 、 積體電路晶粒20可為任何已知類型的晶粒,例如切割自 一矽晶圓之一晶粒,且可為任何類型的電路,例如一數位 訊號處理器、-專用電路等。該等電路係熟習此項技術者 熟知的。以一晶粒附著材料(未圖示)將晶粒20之底部表面22 附著於一或多個傳導性球12之頂部經平整的表面Μ。該晶 粒附著材料可為在半導體技術中熟知用於將晶粒附著至基 板之一類型的黏著劑,例如一環氧樹脂。 土 積體電路晶粒20之頂部表面26包含複數個晶粒接合襯墊 103814.doc 1280643 28。晶粒接合襯塾28係電連接至任何圍繞晶粒2〇的傳導性 球12。在一實施例中,以導線30經由導線接合將晶粒接合 襯墊28連接至傳導性球12。可將諸如熱超音波導線接合之 已知導線接合方法用於將導線3 0連接至晶粒接合襯塾2 8及 球12之頂部表面14。 如熟習此項技術者已知的,各種尺寸的導線係可用於將 晶粒連接至基板,其中尤其基於襯墊間距來選擇導線尺 寸。接合導線30具有一介於約15 μηι至約55 μηι間之直徑, 籲 然而可使用其它直徑之接合導線,且不應將本發明限制於 一特定的接合導線直徑。例如,63 μιη間距應用使用25 μηι 直徑導線,而52 μηι及44 μηι間距應用使用2〇·3 μηι直徑導 線。已對一使用17 μιη直徑導線之37 μηι間距應用進行發 展。因此,如此項技術中已知,可視該襯墊間距而定執行 精細間距及超細間距導線接合方法。在本發明之一實施例 中’使用絕緣接合導線。絕緣接合導線包括一以一電絕緣 φ 材料塗覆之傳導性核心,且適合用於精細間距及超細間距 導線接合。該絕緣材料防止該導線與其它導線或其它傳導 II結構紐路。一般而言,金及鋁為製造該接合導線之傳導 ^核心最常用的元素。金及鋁兩者均為堅固的且可延展的 且在大多數環境中具有相似的電阻。金導線有時以一諸如 、、巧之摻雜劑摻雜以使其穩定。小直徑銘導線經常以石夕 ,有寺鎂摻雜,以改良其斷裂負載及伸長參數。除金及鋁 5絶合金、顧及銀接合導線亦為已知的。在本發明 只轭例中’使用具有一低於約25 μηι直徑之絕緣導線。 1038l4.doc 1280643 該絕緣性塗層較佳地為一具有一約〇 · 5 μηι至約2 · 0 μιη厚度 之有機絕緣性塗層,其可在自由空氣球形成期間熱分解。 此外,導線30較佳地具有一約18〇它至350。(:之熔融溫度 (Tg)。
球12係由一軟材料製作,使得可易於將導線3〇導線接合 至其。較佳地,該等導線30可由一諸如銅或一硬金屬合金 之較堅硬或更剛性的材料製作,使得在導線接合期間,導 線30被刺入且嵌入至該等球中。對於導線3〇而言,使用 一較硬金屬材料允許導線30被刺入至球12中,從而藉由將 硬導線30嵌入至較軟的球12中而形成一連接。 現參考圖2,顯示一封裝裝置32之另一實施例。在此實旋 例中,不將晶粒20附著於球12,而將晶粒2〇附著於一散索 片34。忒散熱片34較佳地係與複數個球12共平面且由該筹 複數個球12圍繞。更特定言之,晶粒所附著的散熱片之 第表面係與球12之頂部表面共平面,且散熱片34之一 第二、相反的表面係與球12之底部纟面16共平面。因此, 散熱片34之第二側係經曝露的。散熱片地佳地具有一等 於自頂4、平整表面14至底部表面16量測的球以徑之厚 度。可以-晶粒附著黏著劑或焊料(未圖示)將晶㈣ 散熱以。為提供良好的熱性f ’散熱以較佳地係以一 諸如銅板之固體金屬般形# 曰…壯 成。散熱片34進-步改良熱效能 且增加封裝32之可焊接面積。 現參考圖3,顯示一封桊梦 - ϋ A人^ 、置36之另一可選方案。除一第 一麵杈化合物38作為一頂部點 I占I形成於晶粒2〇、導線3〇及 103814.doc 1280643 —之頂部表面14上外,該封裝裝置36係與封裝裝置 2=。為執行頂部點膠囊封處理,在該封裝之 形成壩40。應瞭解可於一具有或不具有散熱片34之封裝 上執仃頂部點膠囊封處理。即,雖然封裝裝置%包含散熱 片34’但散熱片34並不是必需的。 ‘、,、 現參考圖4Α_4Η,將描述—種用於根據本發明之一實施 =裝叫c晶粒之方法。圖4ΑΑ4Β係放大的橫截面視圖, 〃、成明一在其内裝載至複數個傳導性球Η之壓板或夹且 5〇。塵板50為一塊金屬,其具有一大的平整表面,在該: 面上具有其中裝載至球12之複數個Μ或凹座52。空穴52 以-栅格或陣列在壓板5G之表面上排列。隨顯示將球^ •裝載至壓板50且圖4B顯示安置於空㈣内之球12。如所顯 不的,空穴52大體上為圓形的。然而,空穴52可具有一平 整的或部分經平整的底部表面,使得球以底部可為經平 整的或部分經平整的’例如藉由擠壓。可使用已知技術(例 如-震蘯器)將球12裝載至凹座52。凹座52係於一間距間隔 開以匹配對於一封裝裂置而言所要的球間距,例如相隔 1,27麵。—旦將該等球裝载至凹座52,就將整個塵板5〇 轉移至一禱模空穴。—使用屢板5〇的可選辦法為將球12裝 载至疋位⑥鑄模空穴底部的孔之一陣列。可以許多種方 法將球12置㈣等孔中,例如以-遮罩。圖側示將球12 f於具有凹座52及一散熱片34之間隔56之歷板54中。在此 實施例中,在將球12裝載至凹座52前,將散熱片Μ置於間 103814.doc 1280643 隔56中。 如前所討論的,球14係由一可變形的柔軟的、傳導性材 料製造的,例如一軟金屬。實例金屬為焊料或金。如彼等 熟習此項技術者已知的,大多數BGA球係由63m材料(63% 錫,37%鉛)製作的,其非常柔軟。即使使用9〇/1〇(9〇%錯, 10%錫)材料,球的形狀仍可變形。現參考圖4〇及化,將球 12定位於壓板50後,球12之頂部表面14或者以該鑄模之一 第一頂部58,或者藉由經由一機械壓模印處理之擠壓使球 12之頂部表面!4平整。即,將鑄模頂部58係擠壓向在壓板 50的空穴52内之球12的頂部表面14,其使球12之頂部表面 14平整。若空穴52亦具有一平整或局部平整的底部表面, 則亦以如頂部表面14相同的方式平整球12之底部表面16。 因此,球12的頂部14及底部表面16之一或者兩個均經平整 或部分經平整。 現參考圖4F,機械壓模印處理後執行一第一射出成形處 • 理,使得第一鑄模化合物18圍繞球12。即,將第一鑄模化 合物18注入至該鑄模中且使第一鑄模化合物18圍繞球^經 曝路的为。射出成形係此項技術中熟知的且為完全瞭解 本發明,並不需要其進一步描述。 現參考圖4G,在第一鑄模化合物18凝固後,移除該鑄模 之第一頂部58。於此點,可將球12自壓板5〇移除或可將球 U留在壓板50上用於進一步處理,如以下所描述的。出於 說明目的,在圖4G中顯示球12自壓板50脫離或分開。然而, 在目前較佳實施例中,球12尚未從壓板5〇移除。 1038l4.doc •12- 1280643 見 > 考圖4H ’積體電路晶粒2()係於—預定位置附著於複 數個球12。晶粒20具有一底部表面22及一包含複數個導線 接口襯墊28之頂部表面26。在目前較佳實施例中,以一晶 粒P#著黏著別(;未圖不)將晶粒2G之底部表面u直接附著於 求12將曰曰粒2〇附|於特定位置使得晶粒由複數個球u 圍繞。I/O’s之數目用於決定圍繞晶粒2〇的球12之數目。將 晶粒2_著至複數個球12之頂部表面14允許一扣所裝載 至之C板在尺寸上一致且具有一單一的球矩陣圖案。一單 -的球矩陣圖案允許不必改㈣板的尺寸就能形成不同尺 寸的晶粒及不同的封裝尺寸。此外,如上所討論的,晶粒 20所附著之球12充當晶粒2()之_熱路徑且提供_增強板水 平焊接點強度之可焊接表面。 如先前討論的,存在用於晶粒附著的其它選擇。例如, 替代一晶粒附著黏著劑,可將該晶粒焊接至球以。此外, 如圖2及3所示’可以-環氧樹脂或焊料將晶粒20附著至一 散熱片34(例如,一固體金屬盤)。散熱片“可進一步改良該 封裝之熱效能且增加該封裝之可焊接面積。 再次參考圖4H,如上所述,將晶粒2〇附著至球⑵灸,將 晶粒20上之導線接合襯墊28電連接至圍繞晶粒⑼之相應球 12。更特定言之,自晶粒導線接合襯墊2 接至相應球12。使用-此項技術中已知的導線接 將導線30之一端連接至晶粒接合襯墊28且將另一端連接至 球12。然而,因為以第一鑄模化合物18將球12保持在一起, 為不損害第-鑄模化合物18之結構,可使用除在傳統熱超 103814.doc •13- 1280643 音波導線接合方法中使用的超音波力外之另外的選擇。例 如’替代應用傳統的熱超音波接合,由銅或一硬金合金製 作的硬導線係用於刺入至球12中,其藉由將導線3〇嵌入至 球12中而形成連接。如圖4H中所示,導線3 〇之尖端被嵌入 至球12内。該等尖端在形狀上大體上為圓形的,且藉由一 導線接合機器將導線3〇經由電火炬(EF〇)製造。 重新參考圖1,執行導線接合方法後,以一第二鑄模化合
物24來囊封晶粒2〇、該等電連接、導線3〇及一部分球12。 再次使用一已知射出成形方法。該第二鑄模化合物較佳地 為一塑料,如此項技術中已知的用於封裝積體電路者。 囊封處理後,自該鑄模及壓板50移除現已經封裝的晶粒 2〇,藉此露出球12之陣列的底部表面,如圖i所示。為確保 可罪的互連效能,可以一抗腐蝕且提供低接觸電阻之貴金 屬表面修整劑(例如,Ni/Au)塗覆或電鍍球12之經曝露的底 口P表面16。可經由電解恥/八口電鍍之選擇沉積塗覆球η之經 曝露的部分。 #現參考圖5 A,除形成_單個封裝外,可同時形成多個封 虞圖5 A顯不二個該等封裝60。可較佳地使用一熟知的單 切方法,藉由沿切割道62切割將封裝60分開,以形成分開 的封裝裝置10 ’如圖5B所顯示。切割道62為在第一鑄模注 入處理期間由第一鑄模化合物形成的凸緣。切割道(凸 、=)62在日日粒附著、導線接合及第二鑄模注人處理期間保護 嵌入至第一鑄模化合物18中之球12。 單刀處理刖,可執行一視情況的電功能測試。因為經 103814.doc 14 1280643 囊封的裝置之所有I/O端在封裝處理中始終都是分開的,所 以以條帶格式之電測試為可能的,從而在無額外的處理或 費用的情況下改良測試者的利用且使得平行測試成為可 能0 因為縮短自晶粒20至板之訊號路徑,該封裝裝置具有經 改良的高頻電效能。此外,藉由增加焊接點對由系統板偏 差引起的應力破壞之抗性,改良系統可靠性。對於行動電 話手機製造商而言,經改良的RF效能及對機械應力破壞的 性為重要的問題。 本發明提供一種封裝一積體電路的容易的且不昂貴的方 法。使兩層鑄模化合物,其中將。球嵌人至第一層禱模 化合物中。C5球之頂部表面充當接合指狀物且底料面在 PCB上提供支座。為得到較好的熱效能,一封裝裝置可 匕3政”’、板此外,该裝置可使用一頂部點膠囊封來形 成°該裝置為低成本的’因為均不需要一基板或一終端(外 部針腳)。因為不存在金屬引線框,不必將在單切步驟中所 使用的錯條割穿金屬,因此錯條將具有一較長的壽命。而 且,因為不需要引線框,所以不需要執行基板訊號繞線。 该封裝處理不需要任柯昆主 P貝的化干回蝕。可使用當前可獲 得之設備執行封裝處理。該封裝亦可具有-非常低的輪 廟’低至約〇 · 4 in m。雖铁p #、+、 _ m雖然已描述—L(JA封裝,亦可使用前 述方法形成其它封裝類型,例如qfn(四邊扁平盖引腳,
QuaV?tNolead)°亦可以此方法封裝經堆疊的'晶粒裝 置。平堂柵格陣列(LGA)提供高互連密度,例如⑽+ ι/〇 103814.doc -15- 1280643 為可能的。 雖然已說明且描述本發明之較佳實施例,顯然本發明並 不僅限於此等實施例。對於彼等熟習此項技術者而+,不 偏離申請專利範圍中所描述的本發明之精神及範^夕 修飾、改變、變更、置換及等效物為顯而易見的。 【圖式簡單說明】 當結合附圖一起閱讀時將更好地瞭解以上本發明之較佳 實施例的實施方式。本發明係經由實例說明且並不由該等 附圖限制,在圖式中相同的參考指示相似的元件。 圖1為一根據本發明之一第一實施例之一經封裝的積體 電路的放大的橫截面視圖。 圖2為一根據本發明之一第二實施例之一經封裝的積體 電路的放大的橫截面視圖。 圖3為一根據本發明之一第三實施例之一經封裝的積體 電路的放大的橫截面視圖。 圖4A-4H為說明用於根據本發明製造經封裝的半導體裝 置之步驟的透視圖。 圖5 A及5B為說明根據本發明形成複數個經封裝的半導 體裝置的橫截面視圖。 【主要元件符號說明】 10 封裝裝置 12 傳導性球 14 頂部、經平整的表面 16 底部、相反的表面 103814.doc -16· 1280643
18 第一鑄模化合物 20 積體電路晶粒 22 積體電路晶粒之第一側 24 第二鑄模化合物 26 積體電路晶粒之苐二側 28 晶粒接合概塾 30 導線 32 封裝裝置 34 散熱片 36 封裝裝置 38 第二鑄模化合物 40 壩或凸緣 50 壓板或夾具 52 空穴或凹座 54 壓板 56 間隔 58 該鑄模之一第一頂部 60 三個該等封裝裝置 62 切割道(凸緣) 103814.doc -17-

Claims (1)

  1. 12 806泮3127964號專利申請案 中文申請專利範圍替換本(96年1月) 4 十、申請專利範圍: 種封裝一積體電路晶粒之方法,其包括以下步驟: 將複數個傳導性球裝載至形成於一壓板中之凹座; 將該壓板轉移至一鑄模之一第一部分之一空穴; 將該鑄模的一第二部分向該等傳導性球擠壓,藉此封 閉該鑄模及至少局部平整該等傳導性球之一頂部表面; 將一第一鑄模化合物注入至該鑄模中,其中該第一鑄 模化合物圍繞該等傳導性球經曝露的部分且將該等傳導 性球保持在一起; 移除該鑄模之第二部分以曝露該等傳導性球之該頂部 表面; 將一積體電路晶粒之一第一側附著至複數個該等傳導 性球,其中該晶粒係由其它該等傳導性球圍繞; 、在《亥a曰粒之一第一側上之晶粒接合襯墊電連接至圍 繞該晶粒之相應該等傳導性球;以及 一弟二鑄模化合物來囊封該晶粒之至少第二側、該 等包連接及該等傳導性球之至少部分頂部表面。 2. 3. 如請求们之封裝-積體電路晶粒之方法,其中使用一遮 罩將該等傳導性球轉移及置放至該鑄模之—底部空穴。 如請求項1之封裝一積體電路晶粒之方法,其中該等傳導 性球包括焊球。 4. 如請求们之封裝一積體電路晶粒之方法,其中該壓板具 有一用於收納該等傳導性球之凹座之陣列。 5. 如請求項4之封裝一積體電路晶粒之方法,其中該等凹座 103814-960123.doc l28〇643 係於一預定距離相間隔。 6·二:求項5之封裝-積體電路晶粒之方法,其中㈣板包 ^ 用於收納一散熱片之間隔兮 散 「仏’忒方法進-步包括在該 7歧熱片收納區域置放一散熱片之步驟。 項6之封裝-積體電路晶粒之方法,其中該散熱片 i面—與該等傳導性球之該經平整的頂部表面大體上共 帛側,且其中该晶粒附著步驟包括將該晶粒之 8弟一側附著至該散熱片之第一側》 8.封裝-積體電路晶粒之方法,其中在該晶粒 經平=粒㈣著至複數個該等傳導性球之該 、 整的頂部表面。 9 ,求項1之封裝-積體電路晶粒之方法,其中該電連接 2包括以對應的複數個導線將該等晶粒接合襯塾 接合至該等球中之㈣球。 ' % = = 9之封裝_積體電路晶粒之方法,其中在該導線 口 乂驟中,該等導線被刺入且嵌入於該等球中 u.如請求物之封裝一積體電路晶粒之方法,苴: 線係絕緣導線。 〃中”亥專ν 12.^^ 1G之封裝__積體電路晶粒之方法,其中該等球 嵌入二柔軟的金屬所形成’使得該等導線被 月求員9之封裝一積體電路晶粒之方法,里 係附著至該等球之該頂部、經平整的表面Γ中該4導線 14.如請求項1之私 <封裝一積體電路晶粒之方法,進一步包括自 103814-960123.doc 1280643 相¥的經囊封的晶粒單切 J5•如請求項1之封驻一接碰 襄訂的日日叔之步騾。 性球被山、積體電路晶粒之方法,其中該等傳導 平整的該第—鑄模化合物中,其十該等球之該經 平面的表面與該第一禱模化合物之—頂部表面大體上共 16.如請求項15之封裝一積體電士 傳導性球之該經平整的♦面相^ 法,其中與該等 ΨΜ 的表面相反的該等球之-表面突出 该苐一鑄楔化合物之一底部表面之外。 17.如請求項1之封裝-積體電路晶粒之方法,其中該囊封牛 驟包括執行-頂部點膠(globtop)囊封處理。中 18· 一種封裝複數個積體電路小片的方法,包括以下步驟: 將複數個傳導性球裝载至形成於一麼板上之凹座. 將該壓板轉移至-轉模之-第-部分之一空穴; I將㈣模之-第二部分向該等傳導性球擠麼,藉此至 >、局部平整該等料性球之—頂部表面; 將第-鑄模化合物注入至該鑄模中,其中該第一鑄 模化合物®繞料傳導㈣之料露的部分; , 將複數個積體電路a知> # / , 电峪日日粒之弟一側於一預定位置附著至 複數個該等傳導性球,其中該等晶粒係由其它 性球圍繞; f 將在該等晶粒之第二側上之晶粒接合襯墊電連接至圍 繞該等晶粒之相應該等傳導性球; 以-第二鑄模化合物來囊封該等晶粒之至少第二側、 該等電連接及至少部分該等傳導性球;以及 103814-960123.doc 1280643 19 相㈣經囊封的晶粒以形成單獨的封裝裝置。 ·_種㈣封的積體電路晶粒,包括·· 複數個傳導性球,其具有頂部、經平整的表面; 第鑄模化合物,其將該等複數個傳導性球保持在 -起’其中該頂部、經平整的表面與該第一鑄模化合物 之頂邛表面大體上共平面,且該等球之底部、相反的 表面係經曝露的; 一積體電路晶粒,其第一側附著至複數個該等傳導性 球,其中該晶粒係由其它該等傳導性球圍繞,且其中該 晶粒係電連接至其它該等傳導性球;及 一第二鑄模化合物,其囊封與該晶粒第一側相反的該 晶粒之至少一第二側及該等傳導性球之頂部表面。 103814-960123.doc
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