TWI273712B - A method for manufacturing a bottom substrate of a liquid crystal display device with three mask processes - Google Patents

A method for manufacturing a bottom substrate of a liquid crystal display device with three mask processes Download PDF

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Publication number
TWI273712B
TWI273712B TW094147579A TW94147579A TWI273712B TW I273712 B TWI273712 B TW I273712B TW 094147579 A TW094147579 A TW 094147579A TW 94147579 A TW94147579 A TW 94147579A TW I273712 B TWI273712 B TW I273712B
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Taiwan
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layer
metal layer
thickness
patterned
patent application
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TW094147579A
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English (en)
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TW200725900A (en
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Yi-Wei Lee
Ching-Yun Chu
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Au Optronics Corp
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Priority to TW094147579A priority Critical patent/TWI273712B/zh
Priority to US11/639,189 priority patent/US7435632B2/en
Priority to JP2006341273A priority patent/JP4553392B2/ja
Priority to KR1020060130160A priority patent/KR100875801B1/ko
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Publication of TWI273712B publication Critical patent/TWI273712B/zh
Publication of TW200725900A publication Critical patent/TW200725900A/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1288Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136231Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

Ϊ273712 九、發明說明: 【發明所屬之技術領域】 本發明係關於—種液晶顯示I置用下基板之f作方 法,尤指一種利用三道光罩製程製作之液晶顯示裝置用下 基板之製作方法。 用下 【先前技術】 液晶顯示裝置相較於傳統的映像管監視器,具有低耗 電量、體積小及無輕射的優點。然而薄膜電晶體液晶顯示 ω器(TFT-LCD)的價格昂貴,尤其是在液晶顯示器薄膜電 晶體陣列的微影步驟製程上,因為無法有效地將所需光罩 數盡可能地降低,而錢盡—步的降低製造成本。 習知的薄膜電晶體陣列基板製造方法中,較常見的是 五道光罩(微影姓刻)製程。其中,第一道光罩製程是用 15來定義第一金屬層,以形成掃描配線以及薄膜電晶體之閉 極等構件。第二道光罩製程是定義出薄膜電晶體之通道層 以及歐姆接觸層。第三道光罩製程是用來定義出第二金屬 層,以形成資料配線以及薄膜電晶體之源極/汲極等構件。 第四道光罩製程是用來將保護層圖案化。而第五道光罩製 20程是用來將透明導電層圖案化,而形成畫素電極。 然而,隨著薄膜電晶體液晶顯示器朝大尺寸製作的發 展趨勢,而將會面臨許多的問題,例如良率降低以及產能 下降等等。因此若是能減少薄膜電晶體製程的使用光罩 1273712 數即降低薄膜電晶體元件製作之曝光工程次數,就可以 減少製造時間,增加產能,進而降低製造成本。 目刖在薄膜電晶體液晶顯示面板的製造上,由於微影 製程非常昂貴,因此亟需要能將光罩道次減少為三道 5之薄膜電晶體陣列基板製程。 【發明内容】 本發明提供之液晶顯示裝置用下基板之製造方法,相 對於先前技藝,可以減少製程所需要使用之光罩數目,簡 1〇化製程步驟,降低製程成本。 因此,本發明提供一種液晶顯示裝置用下基板之製造 • #法,包括以下之步驟··提供-基板;於該基板上形成一 圖形化第-金屬層,-絕緣層,以及一半導體層,其中該 圖形化第-金屬層係位於該絕緣層及該基板之間;於該半 15導體層i方形成一第二金屬於該第二金屬層塗覆一光 阻;利用-次曝光顯影製程使該光阻具有第一厚度及第二 • #度,^該第—厚度與該第二厚度不相同;㈣該光阻以 及該第二金屬層,以形成圖形化第二金屬層,該圖形化第 -金屬層並具有第二厚度及第四厚度,且該第三厚度與該 20第四厚度不相同;於該第二金屬層上塗覆—高分子層,·照 光硬化該南分子層,以形成一平坦層;钱刻該平坦層以暴 路部分該圖形化第二金屬層;於該平坦層及該圖形化第二 金屬層表面形成一圖形化之透明電極層。 6 1273712 藉此’本發明僅需要三道光罩製程,即可製作液晶顯 不裝置用下基板。由於曝光工程次數降低,故可以減少製 造時間,增加產能,進而降低製造成本。另外,本發明之 方法亦可適用於任何形狀之源極/汲極設計之液晶顯示裝 5置用下基板。
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本發明之方法,其更包含一步驟係於該圖形化第二金 屬層形成後’先形成-保護層於該圖形化第二金屬層表 面。本發明方法’其更包含一步驟係於高分子層硬化後, 先移除未硬化之高分子層。本發明之方法,其中步驟(F) 钱刻方式可為任何_方式,較佳為乾似彳或錢刻。本 發明之方法’其中該步驟⑴姓刻方式可為任何姓刻方式, 較佳為乾㈣。本發明之方法,其中曝光可為任何用於曝 光之光源’較佳為照射紫外光。本發明之方法,其中照光 可為任何用於照光之光源,較佳為照射紫外光。本發明之 方法’其中部分第一金屬層為一薄膜電晶體之閘極,部分 第一金屬層為-輔助電容之-電極。本發明之方法,其中 部分第二金屬層為-辅助電容之—電極,部分第二金屬層 為薄膜電晶體之-源極或-沒極。本發明之方法,直中美 板可為任何薄膜電晶體之基板,較佳為玻^本發明之二 =其中絕緣層可為任㈣膜電晶體之絕緣層,較佳為氧 =或氮切。本發明之方法,其中半導體層可為任何薄 臈電晶體之半導體層,較佳為非晶石夕層。本發明之方法, 其更包含-步驟’係於半導體層表層形成一歐姆接觸層, 且錢姆接觸層較佳為N+非晶石夕層。本發明之方法,豆中 7 '1273712 透明電極層可任何於液晶顯示裝置之透明電極層,較佳為 IZO層或ITO層。本發明之方法中,該圖形化第二金屬層之 第二厚度與第四厚度之尚度差不限定,較佳為約1000埃。 5【實施方式】 實施例一 請參閱圖1(a)至1(h),為本發明實施例一之方法流程示 意圖。 本實施例方法所形成之薄膜電晶體(TFT)為島狀底部 10閘極型(bottom gate)型薄膜電晶體。如圖1(a)所示,首先提 供一基板30,其中基板3〇可為玻璃、石英或塑膠。接著, 依序於基板30上形成一圖形化第一金屬層32、一絕緣層 34、一半導體層36以及一歐姆接觸層%。其中,第一金屬 層32作為薄膜電晶體(TFT)的閘極,另外還有部分第一金屬 15層32為一辅助電容之一電極。此第一金屬32之材料可為鋁 (A1)鶴(W)、鉻(cr)、銅(cu)、鈦(τι)、氮 ,鈦(TiNx)、鋁合金、鉻合金或鉬(M〇)金屬所構成之 單層或多層結構。絕緣層34可為氧化矽(SiOx)、氮化矽 (SiNy)或氮氧化矽(SiHc〇n 〇xynitride)。半導體層% 2〇可為非晶石夕層(〇uSi,am〇rph〇us silic⑽)。歐姆接觸層Μ 可由摻雜半導體,例如n+_si (η切e dGped silieGn)二構 成。 接著’如圖1(b)所示,在歐姆接觸層38上方依序形成 一第一金屬層42以及_第一光阻層料,並且,利用半調光 8 1273712 罩100對第一光阻層44進行曝光與蝕刻,使第一光阻層44 產生高低差。因此,在下基板中,接觸區60之高度較下基 板的其他部分為高。在本實施例中光阻44具有第一厚度(dl) 及第二厚度(d2),且第一厚度較第二厚度小(參閱圖 5 1(c))。 由於半調光罩100的利用,使第一光阻層44可以達成同 一光罩曝光顯影製程即形成兩個不同區域厚度之凹凸狀光 阻層之目的。然後,再對第一光阻層44進行蝕刻就可形成 具有兩個不同區域厚度之凹凸狀第二金屬層42。第二金屬 10層42之材料如同第一金屬層32,可為鋁、鎢、鉻、銅、鈦、 氮化鈦、鋁合金、鉻合金或鉬金屬所構成之單層或多層結 構。本實施例之曝光光源為紫外光。 接著,如圖1(d)所示,蝕刻第一光阻層44以及第二金 屬層42,以形成圖形化第二金屬層42。圖形化第二金屬層 15 42具有第三厚度(d3)及第四厚度_,且第三厚度⑷)小於 第四厚度(d4),藉此,使第二金屬層42形成一高度差(d), 進而使下基板的接觸區6〇之高度較下基板的其他部分為 高。在本實施例中,第二金屬層42之高度差(句約為ι〇〇〇Α, 並且預定作為接觸區60之第二金屬層42高度為最高。在本 20實知例中,圖形化第二金屬層42之部分第二金屬層可作 為輔助電谷之另一電極,部分第二金屬層可作為薄膜電晶 體之源極或沒極。 接著’如圖1(e)所示,於第二金屬層42上形成一保護 層46。然後,在於保護層私上塗覆一層平坦之第二光阻層 1273712 高分子層光阻 阻層材料可為 48並照光硬化,其巾該第二絲層材料可為 或有機材料(參_ HO)。本實施例之第二光 高流動性光阻。 如圖1(g)所示 露部分第二金屬層42。由於第二金屬回:暴 高。因此,全面性回―二金==最 觸區60之部分第二金屬層42會先露出。在本實:::為接 10 化後之第二光阻層简保護層46㈣刻選擇比為p ^ 以接觸到第二金屬層42為㈣終點,而定義出接觸窗 62(contact hole) 〇 丨於接觸區60的位置最高,因此,在本實施例中可利 用全面性回餘使位於接觸區6〇之第二金屬層44暴露出來形 成接觸窗62,而不需要再經由黃光微影製程來定義接觸窗。 15 然:後,去除殘存的第二光阻相(硬化之光敏高分子 層),殘存的第二光阻層48下的保護層46依然:存在。如圖咕) • 所示’於保護層46及接觸窗62(第二金屬層44表面露出部分) 上形成-圖形化之透明電極層5〇。此透明電極層可為ιζ〇 層或ITO層。 20 本實施例所提供之製造方法僅需進行三道光罩的微 影、姓刻等圖案化製程,來完成液晶顯示裳置用下基板的 製作,將達到基板良率提升的效果,其應用於各式液晶顯 示裝置更達到確保顯示品質的效益。 25 實施例二 1273712 本實施例方法之步驟、材料均與實施例一相同,除薄 膜電晶體之源極/汲極形狀不同於實施例一。本實施例之薄 膜電晶體為U型(U type)之薄膜電晶體。藉本發明方法所形 成U型薄膜電晶體以及其他相關元件,可以再有效增加薄 膜電晶體的I〇n電流,以及開口率。同樣的,本實施例之製 仏方法僅需進行三道光罩的微影、㈣等圖案化製程,來 完成液晶㈣裝置訂基板的製作,並達到基板良率提升 的效果,其應用於各式液晶顯示裝置更達到 10 而舉例而已,本發明所 圍所述為準,而非僅限 上述實施例僅係為了方便說明 主張之權利範圍自應以申請專利範 於上述實施例。 【圖式簡單說明】 15圖i(a)〜(h)係本發明一較佳實施例之方法节浐圖 【主要元件符號說明】 基板30 半導體層36 第一光阻層44 透明電極層50 半調光罩1 〇 〇 第一金屬層32 姆接觸層3 8 保護層46 接觸區60 絕緣層34 第二金屬層42 第一光阻層48 接觸窗62 11 20

Claims (1)

  1. • 1273712 十、申請專利範圍: 包括以下 1· 一種液晶顯示裝置用下基板之製造方去 之步驟: (A) 提供一基板; (B) 於該基板上形成一圖形化第一 ^ t屬層、一絕緣層以 及一半導體層,其中該圖形化第一 +凰 步金屬層係位於該絕緣層 及該基板之間; (C) 於該半導體層上方形成一第二金屬層; (D) 於該第二金屬層塗覆—光阻; 10 (E)利用一次曝光顯影製程使該光阻具有第一厚度及 第二厚度’且該第一厚度與該第二厚冑不相同; (F)蚀刻該光阻以及該第二金屬層,以形成圖形化第二 金屬層,該®形化第二金屬層並具有第三厚度及第四厚 度,且該第二厚度與該第四厚度不相同; 15 (G)於該圖形化第二金屬層上塗覆一高分子層; (H) 照光硬化該高分子層,以形成一平坦層; (I) 触刻該平坦層以暴露部分該第二金屬層;以及 ⑴於該平坦層及該圖形化第二金屬層表面形成一圖 形化之透明電極層。 20 2.如申請專㈣圍第1項所述之方m包含一步 驟係於該圖形化第二金屬層形成後,先形成一保護層於該 圖形化第二金屬層表面。 3.如申請專利範圍第1項所述之方法,其中該步驟 (F ) #刻為乾蝕刻或濕蝕刻。 12 i273712 5 10 15 4·如申請專利範圍第丨項 照射絷外光。 ^ <方法,其中該曝光係 5·如申請專利範圍第丨項所 一金屬s糸 β ^ 疋之方法,其中部分該第 屬層為一溥膜電晶體之閘極。 6·如申請專利範圍第1項所4 第〜I M m 、斤述之方法,其中部分該 I屬層為一辅助電容之一電極。 7·如申請專利範圍第丨項所 第二金屬層為一辅助電容之一電極迷之方法…部分該…8· #申請專利範圍第1項所述之方法, (工)蝕刻為乾蝕刻。 9·如申請專利範圍第1項所述 為坡螭。 〖疋之方法, 10.如申請專利範圍第i項所述 層為氧化矽或氮化矽。 '’ H·如申請專利範圍第丨項所述之方法, 其中該步驟 其中該基板 其中該絕緣 第二金屬層為—薄膜電晶體之—源極或-沒極 其中部分該 ---〇 12. 如申請專利範圍第1 體層為非_層。 項所奴方法,其中該半導 13. 如申請專利範圍第丨項所述之 2〇步驟,係於該半導體層表層形成歐姆接觸#一 接二如:請專利範圍第12項所述之方二,其中該歐姆 接觸層為N+非晶矽層。 15.如申請專利範圍第i項所 電極層為IZO層或IT〇層。 力/、中.亥透明 13 ' 1273712
    1 6 ·如申請專利範圍第1項所述之方法,其中該曝光 顯影製程中,係使用半調光罩。 1 7 .如申請專利範圍第1項所述之方法,其中該第三 厚度與該第四厚度相差約1000埃。 14
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JP4740203B2 (ja) * 2006-08-04 2011-08-03 北京京東方光電科技有限公司 薄膜トランジスタlcd画素ユニットおよびその製造方法
TWI346391B (en) 2007-08-20 2011-08-01 Au Optronics Corp Liquid crystal display device and the manufacturing method thereof
KR20120036186A (ko) 2010-10-07 2012-04-17 삼성전자주식회사 배선, 배선 형성 방법, 상기 배선을 이용한 표시 장치, 및 상기 표시 장치의 제조 방법
US8956809B2 (en) * 2012-08-03 2015-02-17 Applied Materials, Inc. Apparatus and methods for etching quartz substrate in photomask manufacturing applications
CN107910300B (zh) * 2017-11-20 2020-04-21 合肥京东方光电科技有限公司 一种阵列基板的制作方法、阵列基板及显示装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100212409B1 (ko) * 1990-11-21 1999-08-02 윌리엄 비. 켐플러 수직 및 수평 절연 게이트, 전계 효과 트랜지스터 및 그 제조방법
JP2914559B2 (ja) * 1994-11-08 1999-07-05 松下電器産業株式会社 液晶パネル用基板とその製造方法
JPH11340462A (ja) * 1998-05-28 1999-12-10 Fujitsu Ltd 液晶表示装置およびその製造方法
JPH11352515A (ja) * 1998-06-09 1999-12-24 Mitsubishi Electric Corp 液晶表示装置およびその製造方法
KR100372306B1 (ko) * 1998-11-19 2003-08-25 삼성전자주식회사 박막트랜지스터의제조방법
KR100333979B1 (ko) * 1999-04-26 2002-04-24 윤종용 액정 표시 장치용 박막 트랜지스터 기판 및 그의 제조 방법
JP3548711B2 (ja) * 2000-09-25 2004-07-28 シャープ株式会社 液晶用マトリクス基板の製造方法ならびにコンタクトホール形成方法
TW546853B (en) * 2002-05-01 2003-08-11 Au Optronics Corp Active type OLED and the fabrication method thereof
JP2004311520A (ja) * 2003-04-02 2004-11-04 Advanced Display Inc 表示装置の製造方法
KR100984823B1 (ko) * 2003-10-21 2010-10-04 엘지디스플레이 주식회사 액정표시장치용 어레이 기판 및 그 제조방법
KR101086478B1 (ko) * 2004-05-27 2011-11-25 엘지디스플레이 주식회사 표시 소자용 박막 트랜지스터 기판 및 그 제조 방법
TWI279918B (en) * 2005-06-29 2007-04-21 Quanta Display Inc A method for forming a liquid crystal display
KR20070045824A (ko) * 2005-10-28 2007-05-02 삼성전자주식회사 박막 트랜지스터, 표시판 및 그 제조 방법

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US20070155034A1 (en) 2007-07-05
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TW200725900A (en) 2007-07-01
KR20070072371A (ko) 2007-07-04
JP2007183623A (ja) 2007-07-19
US7435632B2 (en) 2008-10-14

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