TWI264116B - Thin film memory, array, and operation method and manufacture method therefor - Google Patents
Thin film memory, array, and operation method and manufacture method thereforInfo
- Publication number
- TWI264116B TWI264116B TW092107778A TW92107778A TWI264116B TW I264116 B TWI264116 B TW I264116B TW 092107778 A TW092107778 A TW 092107778A TW 92107778 A TW92107778 A TW 92107778A TW I264116 B TWI264116 B TW I264116B
- Authority
- TW
- Taiwan
- Prior art keywords
- thin film
- semiconductor thin
- semiconductor
- conductivity type
- array
- Prior art date
Links
- 239000010409 thin film Substances 0.000 title abstract 7
- 238000000034 method Methods 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 abstract 10
- 239000003990 capacitor Substances 0.000 abstract 1
- 239000000969 carrier Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/908—Dram configuration with transistors and capacitors of pairs of cells along a straight line between adjacent bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002108423 | 2002-04-10 | ||
JP2002230397 | 2002-08-07 | ||
JP2003086898A JP4880867B2 (ja) | 2002-04-10 | 2003-03-27 | 薄膜メモリ、アレイとその動作方法および製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200308082A TW200308082A (en) | 2003-12-16 |
TWI264116B true TWI264116B (en) | 2006-10-11 |
Family
ID=28678744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW092107778A TWI264116B (en) | 2002-04-10 | 2003-04-04 | Thin film memory, array, and operation method and manufacture method therefor |
Country Status (6)
Country | Link |
---|---|
US (2) | US20030213994A1 (zh) |
EP (2) | EP1355358B1 (zh) |
JP (1) | JP4880867B2 (zh) |
KR (1) | KR100983408B1 (zh) |
CN (1) | CN100380666C (zh) |
TW (1) | TWI264116B (zh) |
Families Citing this family (65)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040228168A1 (en) * | 2003-05-13 | 2004-11-18 | Richard Ferrant | Semiconductor memory device and method of operating same |
US7085153B2 (en) * | 2003-05-13 | 2006-08-01 | Innovative Silicon S.A. | Semiconductor memory cell, array, architecture and device, and method of operating same |
US7335934B2 (en) * | 2003-07-22 | 2008-02-26 | Innovative Silicon S.A. | Integrated circuit device, and method of fabricating same |
US7184298B2 (en) * | 2003-09-24 | 2007-02-27 | Innovative Silicon S.A. | Low power programming technique for a floating body memory transistor, memory cell, and memory array |
US7301803B2 (en) * | 2004-12-22 | 2007-11-27 | Innovative Silicon S.A. | Bipolar reading technique for a memory cell having an electrically floating body transistor |
FR2880710B1 (fr) * | 2005-01-11 | 2007-04-20 | St Microelectronics Sa | Procede et dispositif de caracterisation d'une cellule destinee a etre realisee dans une technologie cmos du type silicium sur isolant partiellement appauvri |
KR100673228B1 (ko) * | 2005-06-30 | 2007-01-22 | 주식회사 하이닉스반도체 | 낸드 플래쉬 메모리 소자의 제조방법 |
US20070023833A1 (en) * | 2005-07-28 | 2007-02-01 | Serguei Okhonin | Method for reading a memory cell having an electrically floating body transistor, and memory cell and array implementing same |
US7606066B2 (en) | 2005-09-07 | 2009-10-20 | Innovative Silicon Isi Sa | Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same |
US7683430B2 (en) * | 2005-12-19 | 2010-03-23 | Innovative Silicon Isi Sa | Electrically floating body memory cell and array, and method of operating or controlling same |
US7542345B2 (en) * | 2006-02-16 | 2009-06-02 | Innovative Silicon Isi Sa | Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same |
US7492632B2 (en) | 2006-04-07 | 2009-02-17 | Innovative Silicon Isi Sa | Memory array having a programmable word length, and method of operating same |
WO2007128738A1 (en) * | 2006-05-02 | 2007-11-15 | Innovative Silicon Sa | Semiconductor memory cell and array using punch-through to program and read same |
US8069377B2 (en) * | 2006-06-26 | 2011-11-29 | Micron Technology, Inc. | Integrated circuit having memory array including ECC and column redundancy and method of operating the same |
US7542340B2 (en) * | 2006-07-11 | 2009-06-02 | Innovative Silicon Isi Sa | Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same |
US7893475B2 (en) * | 2007-01-24 | 2011-02-22 | Macronix International Co., Ltd. | Dynamic random access memory cell and manufacturing method thereof |
KR101277402B1 (ko) | 2007-01-26 | 2013-06-20 | 마이크론 테크놀로지, 인코포레이티드 | 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 dram 트랜지스터 |
US7919800B2 (en) | 2007-02-26 | 2011-04-05 | Micron Technology, Inc. | Capacitor-less memory cells and cell arrays |
WO2009031052A2 (en) * | 2007-03-29 | 2009-03-12 | Innovative Silicon S.A. | Zero-capacitor (floating body) random access memory circuits with polycide word lines and manufacturing methods therefor |
US8064274B2 (en) | 2007-05-30 | 2011-11-22 | Micron Technology, Inc. | Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same |
US8085594B2 (en) * | 2007-06-01 | 2011-12-27 | Micron Technology, Inc. | Reading technique for memory cell with electrically floating body transistor |
WO2009039169A1 (en) | 2007-09-17 | 2009-03-26 | Innovative Silicon S.A. | Refreshing data of memory cells with electrically floating body transistors |
JP2009088440A (ja) * | 2007-10-03 | 2009-04-23 | Oki Semiconductor Co Ltd | 半導体装置及びその製造方法 |
US8536628B2 (en) | 2007-11-29 | 2013-09-17 | Micron Technology, Inc. | Integrated circuit having memory cell array including barriers, and method of manufacturing same |
US8349662B2 (en) * | 2007-12-11 | 2013-01-08 | Micron Technology, Inc. | Integrated circuit having memory cell array, and method of manufacturing same |
JP2009169071A (ja) * | 2008-01-16 | 2009-07-30 | Sony Corp | 表示装置 |
US8773933B2 (en) | 2012-03-16 | 2014-07-08 | Micron Technology, Inc. | Techniques for accessing memory cells |
US8014195B2 (en) * | 2008-02-06 | 2011-09-06 | Micron Technology, Inc. | Single transistor memory cell |
US8189376B2 (en) * | 2008-02-08 | 2012-05-29 | Micron Technology, Inc. | Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same |
US7957206B2 (en) | 2008-04-04 | 2011-06-07 | Micron Technology, Inc. | Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same |
KR101505494B1 (ko) * | 2008-04-30 | 2015-03-24 | 한양대학교 산학협력단 | 무 커패시터 메모리 소자 |
US7947543B2 (en) * | 2008-09-25 | 2011-05-24 | Micron Technology, Inc. | Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation |
US7933140B2 (en) | 2008-10-02 | 2011-04-26 | Micron Technology, Inc. | Techniques for reducing a voltage swing |
US7924630B2 (en) * | 2008-10-15 | 2011-04-12 | Micron Technology, Inc. | Techniques for simultaneously driving a plurality of source lines |
US8223574B2 (en) * | 2008-11-05 | 2012-07-17 | Micron Technology, Inc. | Techniques for block refreshing a semiconductor memory device |
KR101570178B1 (ko) * | 2008-11-07 | 2015-11-18 | 삼성전자주식회사 | 커패시터 없는 디램 소자 |
US8213226B2 (en) * | 2008-12-05 | 2012-07-03 | Micron Technology, Inc. | Vertical transistor memory cell and array |
US8278167B2 (en) * | 2008-12-18 | 2012-10-02 | Micron Technology, Inc. | Method and structure for integrating capacitor-less memory cell with logic |
US8319294B2 (en) * | 2009-02-18 | 2012-11-27 | Micron Technology, Inc. | Techniques for providing a source line plane |
US8710566B2 (en) | 2009-03-04 | 2014-04-29 | Micron Technology, Inc. | Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device |
US8748959B2 (en) * | 2009-03-31 | 2014-06-10 | Micron Technology, Inc. | Semiconductor memory device |
US8139418B2 (en) * | 2009-04-27 | 2012-03-20 | Micron Technology, Inc. | Techniques for controlling a direct injection semiconductor memory device |
US8508994B2 (en) | 2009-04-30 | 2013-08-13 | Micron Technology, Inc. | Semiconductor device with floating gate and electrically floating body |
US8498157B2 (en) * | 2009-05-22 | 2013-07-30 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
US8537610B2 (en) | 2009-07-10 | 2013-09-17 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
US9076543B2 (en) * | 2009-07-27 | 2015-07-07 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
US8199595B2 (en) * | 2009-09-04 | 2012-06-12 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
US8174881B2 (en) | 2009-11-24 | 2012-05-08 | Micron Technology, Inc. | Techniques for reducing disturbance in a semiconductor device |
US8310893B2 (en) * | 2009-12-16 | 2012-11-13 | Micron Technology, Inc. | Techniques for reducing impact of array disturbs in a semiconductor memory device |
KR101894400B1 (ko) | 2009-12-28 | 2018-09-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 기억 장치와 반도체 장치 |
US8416636B2 (en) | 2010-02-12 | 2013-04-09 | Micron Technology, Inc. | Techniques for controlling a semiconductor memory device |
US8411513B2 (en) * | 2010-03-04 | 2013-04-02 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device having hierarchical bit lines |
US8576631B2 (en) * | 2010-03-04 | 2013-11-05 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
US8369177B2 (en) * | 2010-03-05 | 2013-02-05 | Micron Technology, Inc. | Techniques for reading from and/or writing to a semiconductor memory device |
KR20130007609A (ko) | 2010-03-15 | 2013-01-18 | 마이크론 테크놀로지, 인크. | 반도체 메모리 장치를 제공하기 위한 기술들 |
KR20130007572A (ko) | 2010-03-16 | 2013-01-18 | 쌘디스크 3디 엘엘씨 | 금속 산화물 저항률 전환층과 함께 사용하기 위한 하부 전극 |
US8411524B2 (en) | 2010-05-06 | 2013-04-02 | Micron Technology, Inc. | Techniques for refreshing a semiconductor memory device |
US8841648B2 (en) | 2010-10-14 | 2014-09-23 | Sandisk 3D Llc | Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same |
US8389971B2 (en) | 2010-10-14 | 2013-03-05 | Sandisk 3D Llc | Memory cells having storage elements that share material layers with steering elements and methods of forming the same |
US8531878B2 (en) | 2011-05-17 | 2013-09-10 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
US9559216B2 (en) | 2011-06-06 | 2017-01-31 | Micron Technology, Inc. | Semiconductor memory device and method for biasing same |
US10037801B2 (en) | 2013-12-06 | 2018-07-31 | Hefei Reliance Memory Limited | 2T-1R architecture for resistive RAM |
WO2018052760A1 (en) * | 2016-09-13 | 2018-03-22 | Applied Materials, Inc. | Borane mediated dehydrogenation process from silane and alkylsilane species for spacer and hardmask application |
US11088140B2 (en) * | 2019-08-27 | 2021-08-10 | Nanya Technology Corporation | Multiple semiconductor elements with different threshold voltages |
US11821936B2 (en) * | 2022-01-10 | 2023-11-21 | Nxp Usa, Inc. | In situ threshold voltage determination of a semiconductor device |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4118693A (en) * | 1977-05-09 | 1978-10-03 | Knogo Corporation | Method and apparatus for producing uniform electromagnetic fields in an article detection system |
JPS586234B2 (ja) * | 1977-11-17 | 1983-02-03 | 富士通株式会社 | 半導体記憶装置 |
JPS5893370A (ja) * | 1981-11-30 | 1983-06-03 | Nec Corp | Mosデバイス |
JPS6235559A (ja) * | 1985-08-09 | 1987-02-16 | Agency Of Ind Science & Technol | 半導体記憶装置 |
US5283457A (en) * | 1989-10-02 | 1994-02-01 | Texas Instruments Incorporated | Semiconductor on insulator transistor |
JPH0799251A (ja) * | 1992-12-10 | 1995-04-11 | Sony Corp | 半導体メモリセル |
GB9401924D0 (en) * | 1994-02-01 | 1994-03-30 | Jonhig Ltd | System for road toll payment |
US5784311A (en) * | 1997-06-13 | 1998-07-21 | International Business Machines Corporation | Two-device memory cell on SOI for merged logic and memory applications |
JPH11224906A (ja) * | 1998-02-05 | 1999-08-17 | Sony Corp | 半導体メモリセル |
US6225665B1 (en) * | 1999-01-11 | 2001-05-01 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having multiple source regions |
US6111778A (en) * | 1999-05-10 | 2000-08-29 | International Business Machines Corporation | Body contacted dynamic memory |
TW557569B (en) * | 2000-01-24 | 2003-10-11 | Sony Corp | Semiconductor device and manufacturing method thereof |
JP3485091B2 (ja) * | 2001-01-19 | 2004-01-13 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
US6793127B2 (en) * | 2001-04-04 | 2004-09-21 | Koninklijke Philips Electronics N.V. | Internet enabled resource constrained terminal for processing tags |
US8321302B2 (en) * | 2002-01-23 | 2012-11-27 | Sensormatic Electronics, LLC | Inventory management system |
-
2003
- 2003-03-27 JP JP2003086898A patent/JP4880867B2/ja not_active Expired - Fee Related
- 2003-04-04 TW TW092107778A patent/TWI264116B/zh not_active IP Right Cessation
- 2003-04-09 US US10/410,239 patent/US20030213994A1/en not_active Abandoned
- 2003-04-09 EP EP03252253A patent/EP1355358B1/en not_active Expired - Fee Related
- 2003-04-09 EP EP09166746.9A patent/EP2113943B1/en not_active Expired - Fee Related
- 2003-04-10 KR KR1020030022660A patent/KR100983408B1/ko active IP Right Grant
- 2003-04-10 CN CNB031307892A patent/CN100380666C/zh not_active Expired - Fee Related
-
2004
- 2004-06-28 US US10/879,938 patent/US7211867B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20050001269A1 (en) | 2005-01-06 |
EP1355358B1 (en) | 2013-03-13 |
US20030213994A1 (en) | 2003-11-20 |
KR20030081142A (ko) | 2003-10-17 |
EP1355358A3 (en) | 2004-08-04 |
EP2113943B1 (en) | 2013-07-31 |
EP2113943A2 (en) | 2009-11-04 |
CN1453874A (zh) | 2003-11-05 |
KR100983408B1 (ko) | 2010-09-20 |
CN100380666C (zh) | 2008-04-09 |
US7211867B2 (en) | 2007-05-01 |
EP1355358A2 (en) | 2003-10-22 |
TW200308082A (en) | 2003-12-16 |
JP4880867B2 (ja) | 2012-02-22 |
EP2113943A3 (en) | 2010-10-13 |
JP2004128446A (ja) | 2004-04-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI264116B (en) | Thin film memory, array, and operation method and manufacture method therefor | |
TWI260779B (en) | Logic switch and circuits utilizing the switch | |
KR950015763A (ko) | 불휘발성 반도체기억장치 | |
TW200721492A (en) | Non-volatile memory and manufacturing method and operation method thereof | |
EP1280205A3 (en) | Semiconductor memory device | |
KR101406604B1 (ko) | 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 dram 트랜지스터 | |
MY130082A (en) | Semiconductor memory cell and method of manufacturing the same | |
TWI268623B (en) | Semiconductor integrated circuit device and method of manufacturing the same reading memory information at high speed from the transistor-carried nonvolatile memory cell transistor | |
WO2005091799A3 (en) | Optimized trench power mosfet with integrated schottky diode | |
KR970063683A (ko) | 메모리 셀 장치 및 그 제조 방법 | |
WO2004044990A8 (en) | One transistor dram cell structure and method for forming | |
MY135374A (en) | Semiconductor storage | |
TW200717804A (en) | Semiconductor device | |
KR19990023084A (ko) | 반도체 장치 | |
JP2001217325A5 (zh) | ||
TW200639976A (en) | Flash memory device and method of manufacturing the same | |
AU2003216649A1 (en) | Floating gate memory cells with increased coupling ratio | |
KR950010060A (ko) | 반도체장치 및 그 제조방법 | |
EP1229576A3 (en) | Method of producing SOI MOSFET | |
TW200733386A (en) | Semiconductor device | |
TW200719413A (en) | Semiconductor device and fabricating method thereof | |
TW200510847A (en) | Thin-film semiconductor element and method of manufacturing thin-film semiconductor element | |
TW200743209A (en) | Semiconductor device, method of fabricating the same, and patterning mask utilized by the method | |
TW200503251A (en) | Nonvolatile semiconductor memory device | |
TW200419806A (en) | MOSFET for open drain and semiconductor integrated circuit device using the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |