TWI255537B - Lead-frame construction body for a semiconductor device - Google Patents

Lead-frame construction body for a semiconductor device Download PDF

Info

Publication number
TWI255537B
TWI255537B TW91133624A TW91133624A TWI255537B TW I255537 B TWI255537 B TW I255537B TW 91133624 A TW91133624 A TW 91133624A TW 91133624 A TW91133624 A TW 91133624A TW I255537 B TWI255537 B TW I255537B
Authority
TW
Taiwan
Prior art keywords
resin film
sheet
metal body
semiconductor device
guide frame
Prior art date
Application number
TW91133624A
Other languages
English (en)
Chinese (zh)
Other versions
TW200300598A (en
Inventor
Tsukasa Tokunaga
Original Assignee
Sumitomo Metal Mining Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Mining Co filed Critical Sumitomo Metal Mining Co
Publication of TW200300598A publication Critical patent/TW200300598A/zh
Application granted granted Critical
Publication of TWI255537B publication Critical patent/TWI255537B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW91133624A 2001-11-20 2002-11-18 Lead-frame construction body for a semiconductor device TWI255537B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001355262A JP3671900B2 (ja) 2001-11-20 2001-11-20 半導体装置用リードフレーム構造体

Publications (2)

Publication Number Publication Date
TW200300598A TW200300598A (en) 2003-06-01
TWI255537B true TWI255537B (en) 2006-05-21

Family

ID=19166990

Family Applications (1)

Application Number Title Priority Date Filing Date
TW91133624A TWI255537B (en) 2001-11-20 2002-11-18 Lead-frame construction body for a semiconductor device

Country Status (2)

Country Link
JP (1) JP3671900B2 (ja)
TW (1) TWI255537B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5701579B2 (ja) * 2010-11-19 2015-04-15 株式会社三井ハイテック 半導体装置の製造方法
JP5911615B2 (ja) * 2015-01-22 2016-04-27 株式会社三井ハイテック リードフレーム

Also Published As

Publication number Publication date
JP2003158232A (ja) 2003-05-30
JP3671900B2 (ja) 2005-07-13
TW200300598A (en) 2003-06-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees