TWI251345B - Transistor metal gate structure that minimizes non-planarity effects and method of formation - Google Patents

Transistor metal gate structure that minimizes non-planarity effects and method of formation Download PDF

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Publication number
TWI251345B
TWI251345B TW091134782A TW91134782A TWI251345B TW I251345 B TWI251345 B TW I251345B TW 091134782 A TW091134782 A TW 091134782A TW 91134782 A TW91134782 A TW 91134782A TW I251345 B TWI251345 B TW I251345B
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TW
Taiwan
Prior art keywords
layer
control electrode
conductive
trench
gate
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TW091134782A
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English (en)
Chinese (zh)
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TW200300609A (en
Inventor
John M Grant
Olubunmi O Adetutu
Yolanda S Musgrove
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Freescale Semiconductor Inc
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Publication of TW200300609A publication Critical patent/TW200300609A/zh
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Publication of TWI251345B publication Critical patent/TWI251345B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0225—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Composite Materials (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
TW091134782A 2001-11-30 2002-11-29 Transistor metal gate structure that minimizes non-planarity effects and method of formation TWI251345B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/997,899 US6423619B1 (en) 2001-11-30 2001-11-30 Transistor metal gate structure that minimizes non-planarity effects and method of formation

Publications (2)

Publication Number Publication Date
TW200300609A TW200300609A (en) 2003-06-01
TWI251345B true TWI251345B (en) 2006-03-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW091134782A TWI251345B (en) 2001-11-30 2002-11-29 Transistor metal gate structure that minimizes non-planarity effects and method of formation

Country Status (8)

Country Link
US (1) US6423619B1 (enExample)
EP (1) EP1451859A2 (enExample)
JP (1) JP4159471B2 (enExample)
KR (1) KR20040063971A (enExample)
CN (1) CN1306561C (enExample)
AU (1) AU2002365768A1 (enExample)
TW (1) TWI251345B (enExample)
WO (1) WO2003049186A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8759219B2 (en) 2011-01-24 2014-06-24 United Microelectronics Corp. Planarization method applied in process of manufacturing semiconductor component

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Publication number Priority date Publication date Assignee Title
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Also Published As

Publication number Publication date
WO2003049186A3 (en) 2003-09-12
AU2002365768A8 (en) 2003-06-17
AU2002365768A1 (en) 2003-06-17
JP4159471B2 (ja) 2008-10-01
KR20040063971A (ko) 2004-07-15
WO2003049186A2 (en) 2003-06-12
US6423619B1 (en) 2002-07-23
JP2005512326A (ja) 2005-04-28
EP1451859A2 (en) 2004-09-01
CN1596460A (zh) 2005-03-16
TW200300609A (en) 2003-06-01
CN1306561C (zh) 2007-03-21

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