TWI229426B - Film carrier tape for mounting electronic part and screen mask for solder resist coating - Google Patents

Film carrier tape for mounting electronic part and screen mask for solder resist coating Download PDF

Info

Publication number
TWI229426B
TWI229426B TW092125281A TW92125281A TWI229426B TW I229426 B TWI229426 B TW I229426B TW 092125281 A TW092125281 A TW 092125281A TW 92125281 A TW92125281 A TW 92125281A TW I229426 B TWI229426 B TW I229426B
Authority
TW
Taiwan
Prior art keywords
solder resist
rubber roller
mask
edge
parallel
Prior art date
Application number
TW092125281A
Other languages
English (en)
Other versions
TW200405530A (en
Inventor
Akihiro Terada
Keisuke Yamashita
Original Assignee
Mitsui Mining & Smelting Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Mining & Smelting Co filed Critical Mitsui Mining & Smelting Co
Publication of TW200405530A publication Critical patent/TW200405530A/zh
Application granted granted Critical
Publication of TWI229426B publication Critical patent/TWI229426B/zh

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1216Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
    • H05K3/1225Screens or stencils; Holders therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15182Fan-in arrangement of the internal vias
    • H01L2924/15183Fan-in arrangement of the internal vias in a single layer of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0594Insulating resist or coating with special shaped edges

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

1229426 狄、發明說明: 【發明所屬之技術領域】 $ _本發明係關於薄膜載體膠帶用以承載在阻焊劑層的邊緣較不具有阻焊 劑突起部的電子零件以及產生此薄膜載體膠帶之遮蔽罩。 【先前技術】 承载電子零件例如積體電路(ic),係利用薄膜载體膠帶以承載 ,、、、、、彖溥膜上具有線路圖案的電子零件。承載電子零件的薄膜載體膠帶一 絕续下歹】方式產生。该方式包含粘結如銅薄片的金屬薄片至如聚醯亞胺的 兩、'膜,面,以光阻劑塗佈金屬薄片表面,曝光和顯影該光阻劑以形成一 光阻_案,使用該圖案作為光罩材料選擇性地蝴以形成由 成之線路圖案,然後於線路随上除了終端部分以外之部分 切i述製造供承魏子零件的賴載體膠帶之方法中,阻焊劑以如下方 =4“使㈣於阻焊麵覆的遮蔽罩,其帽網被拉伸於—框架且除了 膜厶圍;;T網表面被罩住。此遮蔽罩重疊於在絕緣薄 軸向;移動-橡膠滾 t敷上述的轉劑,可保護除了連接端部以外之線路圖案。 會太高的薄膜載體膠帶中,黏結墊的形成密度不 墊51的形成密㈣力H形。然而’以目前高積體化的需要,黏結 形狀(由辅助虛25圖所示。因此,變得需要沿著黏結㈣的 =作心 ,而鳩第5==軸 場膝雜傾斜接觸遮罩的邊緣形成阻焊層的圓弧形或斜角 IP030047/S-936f 5 1229426 洛部,在遮罩上以移動橡膠滾軸使過量的阻焊劑順著推㈣ T或斜邊緣部)的阻焊劑通常從遮罩的披覆區域突出==,緣 產生黏結塾51接觸失敗 觸及不月匕披覆阻輝劑的黏結墊51,會 【發明内容】 曰本發明之-目的係提供—種用以载置f子零件_ 阻焊織覆層的輕之崎舰覆失敗發生率低。^ 在供觀於組焊劑披覆的遮蔽罩,該遮蔽罩用於 在t、承載電子零件之賴載輝帶上形成 滾軸移動時,阻焊劑亦不會流到遮罩的後表面。曰利用韻蔽罩即使當 定件的薄於電子零件的薄膜載體膠帶係—種用於承載電子 劑声,卿置錢放固办 圖案的遮罩猎移動橡膠滾軸卿成的阻焊 w曰/遮罩以線路圖案的連接端部必須露出的方式形成,: 乎垂形成與被用於塗敷阻焊劑之橡膠滾軸移動方向幾乎平行或幾 含-=於燁綱之本發明的用於阻焊織覆的遮蔽罩為一包 性地施予阻上的篩網、及設在—除了將被披覆阻焊劑以便選擇 、予Ρd的區域以外的篩網表面的光罩區。其申·· 田t 了選擇性地施予阻焊劑所提供的光罩區形成幾乎平行或幾乎垂直於 用以塗敷阻焊劑的橡膠滾軸移動方向之邊緣。 丁从子金直於 平行载電子零件的薄膜載體谬帶甲,阻谭劑層的邊緣幾乎 邊緣啊、出現轴的移動方向,且無斜交於橡膠滾軸移動方向的 W軸=雜^所相由形雜焊獅邊賴乎平行或幾乎垂直於橡 面橡職軸軸雜㈣瓣地職流_罩的後表 本發0θ,_崎繼覆纽刺起之__顯著降低。 IP030047/S-936f 6 1229426 【實施方式】 膜膠帶 1=^==_物_崎劑披覆薄 1 13 (W) 層16 承載。 屬線)20佶处如士如:in 電極Μ ’且利用金線(導電全 «i ίο :;;^^ ΪΓΐί !ί} . ^ w;ai 亞月女。本發明中,較好使用由聚聽亞胺製成 布 緣薄膜的聚醯亞胺包括—般從均苯四酸二酐和芳族二胺合^ 胺、=有從聯苯四羧酸二酐和芳族二胺合成的聯“架的 =Ϊ:月t:任何該等聚醯亞胺皆可使用。與其它樹脂相較,這::醯 亞月女有纟、、員者的尚耐熱性和優異的化學品抗性。 中,較好使料輕緣膜η的親亞胺_具有 ⑽的平均厚度,較好是5至125卵,更好是5至100_。 在生產本發明的用於承載電子零件的薄膜載體中,可依 =載電子零件的薄職體膠帶_式,形成各種必須的孔(例^ ίΐ 焊球的穿通形式的孔、元件孔、定位孔和用來使形成於電子焚 件中的電極電性連接至導線的隙缝)。 " “在絕緣薄膜η的至少一表面上,形成一導電金屬層。例如,經由黏 著層使導電金難如㈣或銅錄結至絕緣薄膜11或姻_或類似方 法在絕緣摘11表社崎小量的金屬例如鎳祕且隨後彻無電電艘、 電锻或類似方法沉積金屬例如銅而形成該導電金屬層。 又 上述形成之導電金屬層通常具有1至35/zm的厚度。 線路圖案12可以如下方式形成。黏結至絕緣薄膜u表面的導電金屬 IP030047/S-936f 7 1229426 材料,可選紐爛導電金射卜 “ ®案之光敏概作為光罩 圖,編號12代表線分放大概略平面圖。請參閱第2 代表一以物她焊^如3代表—騎&(侧),且編號15
沿著電子零件的薄_膠帶1〇中,大量的黏結塾13 /口者弓曲(亦即,圓弧形)的輔助虛線26 / U 烊劑層15而使其邊緣沿著該輔助虛線 且 ===著輔助虛線26設置,則二 因此,本發明中,利用遮蔽罩塗敷阻焊劑,其 形成幾^平行钱乎垂胁橡雜軸4㈣鑛方向s,— 3圖所示。 :第3圖和截自第3圖中Α_Α線的截面視圖的第4圖所示,用 蔽罩3G (又稱為“阻焊劑披覆遮蔽罩3G”),其用來形成本發 月之承載電子零件的_載體勝帶的阻焊綱,該遮蔽罩且有—框竿31、 欲彼覆—_敷 、在阻焊纖覆遮蔽罩30中,框架31係由例如金屬或塑膠的硬材料製 成且在框杀31上,篩網32被伸展,篩網32具有細網孔,且利用橡膠 滾軸4G,阻焊雛穿透_ 32 _網孔而形成顧於承載電子零件的薄 膜載體膠帶表面上的阻焊劑層。此篩網可由金屬線布(金屬線網孔)、絲 篩網或類似物構成。 篩網32設有一光罩區33因而阻焊劑可被塗敷成所需形狀。光罩區33 可例如以所需形狀曝光一光敏樹脂且使樹脂顯影而形成。更詳細地說,一 塑膠薄膜的一表面披覆以光敏樹脂以形成光敏樹脂層,且光敏樹脂層予以 曝光,接著顯影以在塑膠薄膜上形成所需圖案。如此形成的圖案移轉到篩 網上,藉此可於篩網32上形成光罩區33。光罩區33可藉塗敷光敏樹脂於 IP030047/S-936f 8 1229426 師網f面域後明f 縛光該綠層並 光罩區33的邊緣34包含幾乎平行於橡膠滾轴罔32上。 trr4e,幾乎垂直於橡膠滾軸40的移動方向s的邊緣tr的邊 及連結邊緣部34e和邊緣部3似的四個角落部34在《、、34d, 中,四個角落部34c較好各形成一階梯形狀遮蔽罩3〇 緣部34被交替佈置。 、私動方向S的邊 藉交替佈置邊緣部3如和邊緣部灿形成階梯形狀之角邱 區33不具有與橡膠滾軸4〇斜交接觸的 / ° e ’光 4〇移動而推上的轉舰少網光罩區33的下表H且因此由橡膠滾軸 本發明巾,於光罩區33的階梯形狀角落部3如 轴40的移動方向s.的直線組成的邊緣部此和由 橡膠滾 =多動方向s的直線組成的邊緣部34b有時在它們的接觸^ 在利用上述阻焊舰覆遮蔽罩%形成阻焊劑層 =梯形的邊緣部25e,其中相應於形成—幾乎垂直於橡膠滾 = 2 S的直線的邊緣部34a和形成-幾乎平行於橡膠滾轴 動方= 40 s 才成手千仃於橡膠滾軸40的移動方向S的邊緣部25b 成階梯形的邊緣部25c,阻焊劑很少流到遮蔽罩 形 狀邊緣部不形成任何角狀突出。藉形成—階梯面該=== 的階梯形狀核在最_披覆狀鮮改變且在铺披紐亦不改彖變。 阻焊劑層可由例如環氧樹脂、胺基甲酸騎 成。由此樹脂所形成的阻焊劑層厚度通常在5 飞㈣亞齡恤所形 飾之範圍。 长至6〇舞,較好是10至20 述形成阻焊劑15之後,從阻焊劑層15露出的線路_12表面 電鑛方法的例子包括鍍錄、.鍍錄/金,金、鍍錫和焊鑛,且依照產 1229426 電議。編-成_層 至5 /m之範圍。 C通吊在0·01至10 # m的範圍,較好是0·05 圖案上形二實施例已說明於如上,但在線路 在電鍍之後,可動而導^之細絲或短路可有效避免。 線路圖案的金屬可共_二==形成_的金屬*用於形成 用以明,於承载電子零件的薄媒載體膠帶可使用為 覆晶(Chip on mniUa)°nf^各拇^列伽11 Grid紅卿)(),薄膜 勘結墊的焊球使用作為外連接^接到黏…墊,且經由線路圖案電性連接至 接端零件的__勝帶後表面上形成外連 形成於絕緣^^的在::::緣膜上的谭球孔,藉此該焊球電性連接到 子零本發㈣於承載電子糊_體膠帶且電 並無峨編細載綱上之方法 膠帶述在電子零件承载後’電子零件以樹脂密封且藉此與薄膜載體 在本㈣_於承魏子零件的馳細 ::因幾Hf幾乎垂直於使用於塗敷阻焊劑的 itt緣的阻焊劑角狀突出的異常披覆難以發生,且由 於阻知μ披覆失敗引起的薄膜載體缺陷比例可降低。 具低缺陷比例的阻焊劑層係利用用於其中邊緣形成幾乎平行或幾乎垂 iP010047/S-936f 10 1229426 ,於^崎«所__難義方向的轉_覆的遮 ^狀^聊很少流到賴罩後表面,朋此在阻制層邊__成 體膠=缺陷t:r披覆失敗引起的本發明用於承載電子零件的薄膜載 實施例 這些s崎施舰—步綱本㈣,但應轉岐树縣不限定於 f施例1 對-厚度75#m的聚醯亞胺賴(商品名:u ==),在壓力加熱下藉一厚度•之黏 = 度35//m的電沉積麵j箔。 子 該電沉積觸表面上塗敷級樹脂,織曝光及顯影形成由 口化之光敏樹脂所構成之所需圖案。 罩材成的f案的基礎薄膜浸入侧溶液中’使用該圖案作為光 "仃〜儿積銅4韻刻。如此,形成由銅所構成之線路圖案。 使對苯二甲酸乙二醇醋薄膜⑽薄膜)上塗敷光敏樹脂’ 平均厚度變成2⑽(以乾燥時為準)。然後,光罩區 ==像資料中’且基於圖像資料,在ρετ薄膜上的光敏樹脂層 开以習知方式顯影而形成—光罩區。如第3圖所心在如此 緣〇的先罩區巾,祕部為階獅狀且沒有斜交於橡賴軸移動方向的邊 ★ 士述在PET薄膜上形成的光罩區轉移到伸展在一框架上的篩網表面 上,以構成用於阻焊劑彼覆的遮蔽罩。 右她焊繼覆的雜罩,錄魏樹酿焊繼卵化形成具 ,十岣厚度l〇#m的阻焊劑層。 严声如二述形成阻焊劑層後’在線路圖案(連接部〉表面上形成具有平均 IP030047/S-936f 11 1229426 如此,製備145760片薄膜載體,且進行目损於杏
5 : 34ppffl) J 於阻焊劑的披覆失敗。 耆均不疋知因 在上述塗敷阻焊劑形成阻焊劑層中,每2〇〇 潔,且比較清潔後第-次塗敷所形成的阻焊劑層n丁 Z背面的清 形成=層,結果,就阻焊劑突出而言,此兩 移動=:_===的 ==部對橡_ 膜載體。 方式製備327811片薄 上述所得的薄膜載體以與實施例i相 缺陷者的數目為1175 (缺陷比例· ppm^^雜 劑層邊緣具有角狀突出。 且有些该等缺陷者在阻焊 在上述藉塗敷阻焊劑形成阻焊劑層中, 清潔,·且比較清潔後第-次塗敷所形成的阻焊辦0;f时面的 劑層,在第細次塗敷形成的阻焊劑層邊緣向外^ 次形成的阻焊 比較例g 观。 如實施例1相同方式形成阻焊劑層 動方向形成圓弧形狀的遮蔽罩(如第7圖n角洛部於橡膠滾軸移 塗敷阻焊敵舰罩。然後,轉H賊實關1之用於 體。 相门方式製備258012片薄膜載 上述所得的薄膜載體以實施例!相同 陷者的數目為1247 (缺陷比例:48 丁 ^視檢查。結果,有缺 劑層的邊緣具有角狀突出。 P ^业有些該等有缺陷者在阻焊 在上述以塗敷阻焊劑形成阻谭劑層中 清潔’且比較清潔後第—次塗敷卿成的 〇次,敷進行篩網背面的 所形成的阻焊劑層,結果,因為阻焊劑^ 潔後第2GG次塗敷 出’相較於第一次形成的阻焊 IP030047/S-936f 1229426 d層在f 2QG次塗敷形成的阻焊劑層邊緣向 【圖式簡單說明】 第1 _本發明之麟承魏子零件之編鑛卿之—實施例之截 面圖
单而fSI f2圖係顯示-阻焊的角落部分形狀之放大平 第3圖係顯示用以形成—阻焊層之阻焊劑披憑 第4圖係沿著第3圖A-A線之截面圖。 第5圖係顯示—用於載置電子零件的習知薄 概略圖,其中該阻焊㈣紐部分係形。、载轉㈣阻焊劑層 第6圖偏貞示發生於習知驗載置電子料 層的角狀突出物之;f既略圖。 、载體膠帶的阻焊濟 第7圖係顯示阻焊層形狀之視圖。 【圖號簡單說明】 之 1U 用於承載電子零件的薄膜載體膠帶 11 絕緣薄膜 12 線路爾案 13 黏結墊 15 阻焊劑層 16 黏結層 18 電子零件 19 突出電極 2〇 金導線(金屬導線) 25 邊緣 25a 幾乎垂直於橡膠滾轴的移動方向的邊緣部 25b 幾乎平行於橡膠滾軸的移動方向的邊緣部 25c 形成階梯狀的邊緣部 26 輔助虛線 31 框架 IP030047/S-936f 1229426 32 篩網 33 光罩區 34 邊緣 34a 形成幾乎垂直於橡膠滚軸的移動方向的直線的邊緣部 34b 形成幾乎平行於橡膠滾軸的移動方向的直線的邊緣部 34c 角落部 34d 幾乎垂直於橡膠滾軸的移動方向的直線的邊緣部 34e 幾乎平行於橡膠滾軸的移動方向的直線的邊緣部 40 橡膠滾軸 50 阻焊劑層 51 端部 52 角狀突出 50a、50b、50c : 阻焊劑層的形狀 60 輔助虛線 62 邊緣 S 橡膠滚軸的移動方向 IP030047/S-936f 14

Claims (1)

  1. 础獅426 卜正頁 第092125281號專利申請案未畫線修」 拾、申請專利範園: 取 ^ 1. -種麟承載電子零件_膜载體膠帶 絕緣ΐ膜的表面上的線路圖案、及使用使該線路的連接端部應暴露出Λ =式=成的具既定圖案的遮蔽罩藉移動橡膠滾轴所形成之阻焊 2·如申睛專利耗圍第1項所述之胁承载電子零件的薄膜載體膠帶,复 中該阻焊劑層的邊緣包含一幾乎平行於該橡膠滚轴移動方向的邊ς 部、幾乎垂直於該轉雜移動方向的邊緣部和連結職乎平行邊 部t該幾乎垂直邊緣部的角落部,且該角落部為階梯形,其中該幾乎 平行於該橡膠滾轴移動方向的邊緣部和幾乎垂直於該橡膠滾轴移動 方向的邊緣部交替佈置。 3. -觀於崎繼覆之遮蔽罩,包含—框架、伸展魏框上的遽網、 及裝置在遽網表面上除了欲披覆光阻劑的區域以外的遽網表面以選 擇性地塗敷阻焊劑之光罩區,其中·· 該裝置以選雜地錄雜焊綱光罩區的_邊_絲乎平行或 幾乎垂直於使用以塗敷阻焊劑之橡膠滾軸移動方向。 4. 如申請專利範圍第3項所述之用於阻焊劑披覆之遮蔽罩,盆中該裝置 轉邊緣包含一幾乎平行⑽橡膠滾 轴移動方向的邊緣部、幾乎妓於該橡顧細时向的 結該幾乎平行躲肺_乎*直舰㈣肖轉且^ 2朦其㈣.俯於該縣絲移財向喊鞠^乎垂直於 該橡膠滾軸移動方向的邊緣部交替佈置。 IP030047/S-936f 15
TW092125281A 2002-09-18 2003-09-12 Film carrier tape for mounting electronic part and screen mask for solder resist coating TWI229426B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002271864 2002-09-18

Publications (2)

Publication Number Publication Date
TW200405530A TW200405530A (en) 2004-04-01
TWI229426B true TWI229426B (en) 2005-03-11

Family

ID=32040374

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092125281A TWI229426B (en) 2002-09-18 2003-09-12 Film carrier tape for mounting electronic part and screen mask for solder resist coating

Country Status (4)

Country Link
US (2) US7158387B2 (zh)
KR (2) KR100772623B1 (zh)
CN (1) CN100413385C (zh)
TW (1) TWI229426B (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004327920A (ja) * 2003-04-28 2004-11-18 Sharp Corp 半導体装置の製造方法、フレキシブル基板及び半導体装置
JP4625674B2 (ja) * 2004-10-15 2011-02-02 株式会社東芝 プリント配線基板及びこの基板を搭載する情報処理装置
US8633879B2 (en) 2009-02-13 2014-01-21 Apple Inc. Undulating electrodes for improved viewing angle and color shift
US8390553B2 (en) * 2009-02-13 2013-03-05 Apple Inc. Advanced pixel design for optimized driving
US20100208179A1 (en) * 2009-02-13 2010-08-19 Apple Inc. Pixel Black Mask Design and Formation Technique
US8531408B2 (en) * 2009-02-13 2013-09-10 Apple Inc. Pseudo multi-domain design for improved viewing angle and color shift
US9612489B2 (en) * 2009-02-13 2017-04-04 Apple Inc. Placement and shape of electrodes for use in displays
US8587758B2 (en) * 2009-02-13 2013-11-19 Apple Inc. Electrodes for use in displays
US8558978B2 (en) * 2009-02-13 2013-10-15 Apple Inc. LCD panel with index-matching passivation layers
US8294647B2 (en) * 2009-02-13 2012-10-23 Apple Inc. LCD pixel design varying by color
US8345177B2 (en) * 2009-02-13 2013-01-01 Shih Chang Chang Via design for use in displays
US8111232B2 (en) * 2009-03-27 2012-02-07 Apple Inc. LCD electrode arrangement
US8294850B2 (en) * 2009-03-31 2012-10-23 Apple Inc. LCD panel having improved response
CN103025079B (zh) * 2012-12-10 2015-09-23 苏沃智能科技江苏有限公司 嵌入式sim卡在gps中的永久固定方法
JP6320066B2 (ja) * 2014-02-13 2018-05-09 イビデン株式会社 ボール搭載用マスクおよびボール搭載装置
US10737462B2 (en) 2016-08-24 2020-08-11 Hyundai Motor Company Method for coating surface of moving part of vehicle and moving part of vehicle manufactured by the same

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU596372B2 (en) * 1985-08-14 1990-05-03 Michael Bisak Security device
JPH06260750A (ja) * 1993-03-05 1994-09-16 Cmk Corp 各種形状のソルダランドの形成方法
US5511306A (en) * 1994-04-05 1996-04-30 Compaq Computer Corporation Masking of circuit board vias to reduce heat-induced board and chip carrier package warp during wavesolder process
DE4429206C2 (de) * 1994-08-18 1998-04-09 Atlas Copco Tools Ab Einrichtung zur Betriebssperre bzw. Betriebsfreigabe einer elektrischen Handwerkzeugmaschine
KR0139753Y1 (ko) * 1994-11-01 1999-04-15 전성원 자동차용 라이너 탈거장치
US5563581A (en) * 1995-07-05 1996-10-08 Kats; Vyacheslay Safety device for machine tool operators, and the like
US5666010A (en) * 1995-08-30 1997-09-09 Stratiotis; Gus Safety system for machine tools
KR100225655B1 (ko) * 1997-10-23 1999-10-15 윤종용 반도체 패키지의 인쇄회로기판 실장 구조
JPH11150359A (ja) * 1997-11-18 1999-06-02 Sony Corp 電極ランドへの半田のプリコート方法及びこれに用いて好適なスクリーン
JP3683434B2 (ja) * 1999-04-16 2005-08-17 富士通株式会社 半導体装置
JP2001183687A (ja) * 1999-12-22 2001-07-06 Hitachi Ltd 液晶表示装置
JP3536023B2 (ja) * 2000-10-13 2004-06-07 シャープ株式会社 Cof用テープキャリアおよびこれを用いて製造されるcof構造の半導体装置
US6570259B2 (en) * 2001-03-22 2003-05-27 International Business Machines Corporation Apparatus to reduce thermal fatigue stress on flip chip solder connections

Also Published As

Publication number Publication date
KR20070048694A (ko) 2007-05-09
CN100413385C (zh) 2008-08-20
US20040066635A1 (en) 2004-04-08
KR100772623B1 (ko) 2007-11-02
US7203075B2 (en) 2007-04-10
US20060260539A1 (en) 2006-11-23
CN1491077A (zh) 2004-04-21
US7158387B2 (en) 2007-01-02
KR100772625B1 (ko) 2007-11-02
TW200405530A (en) 2004-04-01
KR20040025629A (ko) 2004-03-24

Similar Documents

Publication Publication Date Title
TWI229426B (en) Film carrier tape for mounting electronic part and screen mask for solder resist coating
CN100392725C (zh) 带电路的悬浮支架基板的制造方法
JPS6354738A (ja) ハンダ付け法
JPH0273648A (ja) 電子回路及びその製造方法
JP2001044589A (ja) 回路基板
TW526282B (en) Laminated structure for electronic equipment and method of electroless gold plating
TW200816407A (en) Window manufacture method of semiconductor package type printed circuit board
TW200405528A (en) Wiring substrate and electronic device using the same
TWI260059B (en) Circuit device
JP3918803B2 (ja) 半導体装置用基板及びその製造方法
JPH11354591A (ja) 半導体キャリアおよびその製造方法
JPH04144190A (ja) 配線基板およびその製造方法
JP2008010496A (ja) 実装基板の作製方法
JP2827430B2 (ja) 多層プリント配線板の製造方法
JP3687669B2 (ja) 電子部品実装用フィルムキャリアテープおよびソルダーレジスト塗布用スクリーンマスク
JPS618996A (ja) 多層配線板の製造方法
TWI290813B (en) Method for making substrate
JP2021072369A (ja) 半導体パッケージ及びその製造方法
JP2002124538A (ja) 回路基板
TWI353024B (en) Fabricating method of conductive layer
TWI273147B (en) Method for plating on a substrate and conductive dry film used in the method
JP2002093648A (ja) 薄型球柵陣列基板の製造方法
JPH0923054A (ja) プリント配線板の製造方法
JP2003133702A (ja) 配線基板およびその製造方法ならびに電子装置
JPS59204298A (ja) 印刷回路板の形成方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees