TW200816407A - Window manufacture method of semiconductor package type printed circuit board - Google Patents

Window manufacture method of semiconductor package type printed circuit board Download PDF

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Publication number
TW200816407A
TW200816407A TW095135043A TW95135043A TW200816407A TW 200816407 A TW200816407 A TW 200816407A TW 095135043 A TW095135043 A TW 095135043A TW 95135043 A TW95135043 A TW 95135043A TW 200816407 A TW200816407 A TW 200816407A
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TW
Taiwan
Prior art keywords
mask
circuit board
printed circuit
gold
solder
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TW095135043A
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Chinese (zh)
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TWI333265B (en
Inventor
Chang-Bo Jung
Choon-Hwan Oh
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Simm Tech Co Ltd
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Publication of TW200816407A publication Critical patent/TW200816407A/en
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Publication of TWI333265B publication Critical patent/TWI333265B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0166—Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

Window manufacture method of semiconductor package type printed circuit board of the present invention comprises an imaging step to expose to outer as pressing a dry film, excepts a bond finger part is formed in both sides of bronze coated circuit board, an etching step to be formed bond finger to get rid of bronze exposed in the imaging step, a strip step to eliminate the pressed dry film after formed bond finger in the etching step, a solder regist spread step to insulate all area except bond finger and solder boland to be formed by the strip step, a nickel/gold plating to be formed nickel/gold plating layer to perform electroplating on exposed bond finger and solder boland in the solder regist spread step.

Description

200816407 九、發明說明： 【發明所屬之技術領域】 針對半導體封裝用印刷電路板之製造方法，本發明涉及— 種半導體封裝用印刷電路板之窗口加工方法，通過在單面、雙 面、、多層(Multi Layer)產品上下整體敷銅之基板上，通過顯影二 蝕刻及剥離形成電路，在除上述形成之電路之指狀焊片與焊盤 之外之部分形成絕緣層，通過鍍金用導線，在上述指狀焊^ 坪盤上鍍金形成鍍金/鏟鎳層，為去除在上述鍍金用導線及槽口 加工發生之金屬毛刺，在上述指狀焊片部分進行遮蓋後 布線及制離，從而能夠消除上述指狀烊片之金屬毛刺造成之雨 氣乾擾，提高可靠性。 屯 【先前技術】 圖-涉及以往半導體封裝用印刷電路板之製造方法。如上 ^圖-所示’以往方法包括如下幾個步驟：顯影步驟，在敷鋼 壓附乾膜，除將形成指狀焊片之部分外，其餘部分均 外邵。_步驟，去除在上述㈣步財暴露於外部之 : = 焊片。退膜步驟，在上述_步驟中形成 上、f、J乂絲上述壓附之乾膜”且烊塗布步驟’使除通過 卿成之指狀料與焊盤之外之财區域絕緣。 進崎塗转‘財絲之指料片與焊盤 驟中進订麵金後，加工形成印刷電路板之外形及槽口。 ’ 歸於通過如上方法製造之半200816407 IX. The invention relates to a method for manufacturing a printed circuit board for semiconductor packaging, and relates to a window processing method for a printed circuit board for semiconductor packaging, which is provided on one side, two sides, and multiple layers. (Multi Layer) The upper and lower copper-clad substrates are formed by developing two etching and stripping circuits, and an insulating layer is formed on the portions other than the finger pads and pads of the circuit formed above, and the wires are plated with gold. The finger-welded soldering plate is plated with gold to form a gold-plated/shovel-nickel layer, and the metal burr generated by processing the gold-plated wire and the notch is removed, and the finger-shaped soldering portion is covered and then wired and separated. Eliminate the rain interference caused by the metal burrs of the above-mentioned finger cymbals and improve the reliability.屯 [Prior Art] The present invention relates to a method of manufacturing a printed circuit board for a semiconductor package. As shown in the above figure, the prior method includes the following steps: a developing step of pressing the dry film on the steel, except that the portion where the finger-shaped soldering piece is to be formed, the remaining portions are all externally. _Steps, remove the above (4) step money exposed to the outside : = solder tab. In the film-removing step, the above-mentioned _step is formed into a dry film of the above-mentioned p, J, and 乂 filaments, and the 烊 coating step is insulated from the financial region other than the pad by the singular finger. After the transfer of the 'Fin Silk' chip and the pad to the order surface gold, the processing forms the outer shape and the notch of the printed circuit board. ' Attributed to the half manufactured by the above method

Chip)或 FBGA(Fine Pi = 封 I 件 BOC(Board On 列）板而丄 nd Array，精細傾斜球狀網陣排 丨Γ合裝件之巾央，在胸旨狀洋 片進仃鍍金所需之鍍金線排列於中央。但是，如圖二所示，在 6 200816407 上述指狀焊片（20)上未塗布其它物質之情況下，利用布線方法加 工槽口（30)時，上述指狀焊片（2〇)之鍍金線(1〇)被推動，發生金 屬毛刺(40)，上述金屬毛刺(4〇)可能會接近或接觸與半導體芯片 導電連接之烊線，如果與鄰近之指狀焊片接觸，則會發生電氣 干擾，引起短路，導致印刷電路板出現不良。 【發明内容】 、本發明正疋為解決上述問題而提出，其目的在於提供一種 半導體封裝用印刷電路板之窗口加工方法，在半導體封裝所使 Π用之印刷電路板之製造步驟巾，為防止在鍍金/鍍鎳後進行布線 加工時，鍍金線向推向上述布線之加工方向之現象，在上述鐘 金/鍍鎳後，利用支持遮罩加工部位的鍍金線，防止發生金屬毛 刺。 【圖式簡單說明】 圖-顯示以往半導體封裝用印刷電路板之製造方法之流 程圖。 圖-顯示以往半導騎裝用印刷電路板之製造方法中之 布線步驟之附圖。 圖一顯本發明之半導體封裝用印刷電路板之窗口加工 方法之流程圖。 圖四齡本發明之半導體封裝用印刷電路板之窗口加工 方法中之遮罩塗布步驟之附圖。 圖五顯不本發明之半導體封裳用印刷電路板之窗 口加工 方法中之遮罩剝離步驟之附圖。 【實施方式】 本發明之半導體封裳用印刷電路板之製造方法可以減少因 去除印刷電路板之引線指狀焊片之鐵金導線及加工與半導體芯 200816407 片引線接合所需之槽讀發生之金屬補(Bui：轉致之電氣干 為實現上述目的，如圖三所示，本發明由如下幾個步驟構 成：顯影步驟，在敷銅基板兩面壓附乾膜，除將形成指狀焊片 之部分外，使其他部分均暴露於外部。姓刻步驟，去除在上述 ’ 顯影步驟暴露於外部之部分之銅，形成指狀焊片。退膜步驟， 在上述細I步卿成指狀焊片後’去除上祕附之乾膜。阻焊 塗布步驟’使除通過上述退膜步驟形成之指狀焊片與焊盤之外 Γ'之區賴緣。鍍金/鍍鎳步驟，在上述阻烊塗布步射暴露之指 狀烊片與焊盤上進行錢，形成鍍金/鍍鎳層。料塗布步驟， 在上述鍍金/鍍鎳步驟進行鍍金後，利用遮罩支持鍵金線。布線 步驟，以在上述遮罩塗布步驟中被遮蓋之鍍金線為中心，加工 形成印刷電路板之外形及槽口。遮罩剝離步驟，在上述布線步 驟中加工槽口後，去除鍍金線上塗布之遮罩。 仙於上述布辭驟之遮料布步财，利職光或顯像， 在=布遮罩物質後形成遮罩區域。在上述遮罩塗布步驟中，遮 罩塗布物質使用固態或液態之物質。Chip) or FBGA (Fine Pi = 1 piece BOC (Board On column) board and 丄nd Array, finely slanted spherical array of wire mesh 丨Γ 丨Γ 丨Γ , , , , , , 所需 所需 所需 所需The gold-plated wires are arranged in the center. However, as shown in Fig. 2, in the case where the above-mentioned finger-shaped soldering piece (20) is not coated with other substances on 6 200816407, when the notch (30) is processed by the wiring method, the above-mentioned fingers The gold-plated wire (1〇) of the soldering piece (2〇) is pushed, and a metal burr (40) is generated. The metal burr (4〇) may approach or contact the 烊 line electrically connected to the semiconductor chip, if it is adjacent to the finger When the soldering piece is in contact, electrical interference may occur, causing a short circuit, resulting in a defective printed circuit board. SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a window processing for a printed circuit board for semiconductor packaging. A method for manufacturing a printed circuit board for use in a semiconductor package, in order to prevent a phenomenon in which a gold plating line is pushed toward a processing direction of the wiring during wiring processing after gold plating/nickel plating, in the above-mentioned clock gold / after nickel plating, A gold-plated wire that supports the masked portion is used to prevent metal burrs from occurring. [Simplified description of the drawings] Fig. - shows a flow chart of a conventional method for manufacturing a printed circuit board for semiconductor packaging. Fig. - shows a printed circuit board for conventional semi-guided riding BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart showing a window processing method for a printed circuit board for semiconductor package of the present invention. FIG. 4 is a view showing a window processing method for a printed circuit board for semiconductor package of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5 is a view showing a mask peeling step in a window processing method for a printed circuit board for a semiconductor package according to the present invention. [Embodiment] A printed circuit board for a semiconductor package of the present invention The manufacturing method can reduce the iron-gold wire for removing the lead finger-shaped soldering piece of the printed circuit board and the metal-filling required for the groove reading required for the wire bonding of the semiconductor core 200816407 (Bui: Turning the electrical dry to achieve the above purpose) As shown in FIG. 3, the present invention is composed of the following steps: a developing step of pressing a dry film on both sides of a copper-clad substrate, in addition to forming Outside the part of the finger-shaped soldering piece, the other parts are exposed to the outside. The surname step is to remove the copper exposed to the outer portion in the above-mentioned 'developing step, forming a finger-shaped soldering piece. The film-removing step, in the above-mentioned fine step After forming the finger-shaped soldering piece, 'removing the dry film attached to the secret. The solder resist coating step' causes the edge of the finger pad and the pad formed by the above-mentioned film-removing step to be separated. The gold plating/nickel plating step And performing the gold-plated/nickel-plated layer on the finger-shaped ruthenium and the pad exposed by the above-mentioned barrier coating step. The material coating step is performed after the gold plating/nickel plating step is performed, and the gold wire is supported by the mask. The wiring step is processed to form a printed circuit board outer shape and a notch centering on the gold plating line covered in the mask coating step. The mask peeling step is performed after the notch is processed in the wiring step, and the gold plating is removed. Line coated mask. Sin in the above-mentioned cloth, the cover of the cloth, the profit of the light or the image, the mask area after the mask is covered. In the above mask coating step, the mask coating material is a solid or liquid substance.

.驟中，在形成指狀焊片（1〇〇) L ’以上述指狀焊片Π00)斑餹合竣 在上述顯影步驟至鍛金/鍍錄步驟中， 與焊盤之印刷電路板完成後，以In the step, after forming the finger-shaped soldering piece (1〇〇) L 'to the above-mentioned finger-shaped soldering piece Π 00), the plaque is combined in the above-mentioned developing step to the wrought gold/plating step, after the printed circuit board with the pad is completed To

8 200816407 以上說明本發明之有益 實施例，在不超伽下申請本發明並雜足於上述 況下，具有本發明所屬領域常1 & =所申叙本發明要旨之情 飞吊4者均可進行多種變更實 综上所述，本發明針對以往布線加4 工時發生金屬毛刺之問題，在上述槽口加工部位排狀^ 上另行應用遮罩，防止在上述槽口處發生麵，消除因布線加 工造成之推動現象，可使上述金屬毛㈣起之錢谓最小化， 可以顯著降低印刷電路板之不良率。 f 【主要元件符號說明】 10 鍍金線 20 指狀焊片 30 槽口 (窗口） 40 至屬毛刺 100 指狀焊片 110 鍍金線 120 遮罩 130 槽口 (窗口） / 98 200816407 The above description of the beneficial embodiments of the present invention, in the case of applying the present invention without exceeding the gamma, and having the above-mentioned conditions, there are those in the field to which the present invention pertains. In view of the above, the present invention is directed to the problem of metal burrs occurring in the conventional wiring plus 4 working hours, and a mask is additionally applied to the slotted portion of the slot to prevent the surface from being formed at the slot. Eliminating the push phenomenon caused by the wiring processing, the above-mentioned metal hair (4) can be minimized, and the defective rate of the printed circuit board can be significantly reduced. f [Major component symbol description] 10 Gold-plated wire 20 Finger-shaped soldering piece 30 Notch (window) 40 to burr 100 Finger-shaped soldering piece 110 Gold-plated wire 120 Mask 130 Notch (window) / 9

Claims (1)

200816407 十、申請專利範圍： 1. -種半導體封裝用印刷電路板之窗口加 發生金屬補之半輕縣騎 對不至於 徵包括如下幾個步驟造万法，其特 除將形成指轉片之料外，财㈣乾膜， ;狀焊片；退膜步驟，在上频刻步^ =迷壓附之乾膜；阻焊塗布步驟，使除通過 = :成之指狀焊片與烊盤之外之區域絕緣;鏟金二3驟 在^述阻焊塗布步财暴露之指狀烊片與焊盤上進行電』， 形成鍵金績鎳層；遮罩塗布步驟，在上述“ =後’利用遮罩支持鍍金線;布線步帮；上= Γ卜2Γ被遮蓋之鍍錄射"，加工軸印刷電路板之 =形及槽口；遮罩剝離步驟，在上述布線步驟中加工槽口後， 去除鍍金線上塗布之遮罩。 2. 根據中請摘細第丨傭述之伟體魏用印刷電路板之 c 窗口加工方法’其特徵為’在祕上述布綠步驟之遮罩塗布 步風中’利用漏光或顯像，在塗布遮罩物質後形成遮罩區域。 3. ^據憎補顧第丨韻述之半導體魏騎刷電路板之 ‘ 口加工方法’其特徵為，在上述遮罩塗布步驟中，遮罩塗 布物質使用固態或液態之物質。200816407 X. The scope of application for patents: 1. The window of the printed circuit board for semiconductor packaging plus the occurrence of metal compensation. The semi-light county riding does not include the following steps to create the method. The special division will form the finger-turning film. Material, (4) dry film, ; welding piece; stripping step, step in the upper frequency ^ = fanned dry film; solder mask coating step, so that the pass =: into the finger solder and the plate Insulation outside the area; shovel gold 2 3 in the description of the solder mask coating the exposed fingers and pads on the power to form a key nickel layer; mask coating step, in the above "= after" use The mask supports the gold-plated wire; the wiring step; the upper = Γ 2 Γ covered cover plating ", the processing axis printed circuit board = shape and notch; the mask peeling step, the groove is processed in the above wiring step After the mouth, remove the mask coated on the gold-plated wire. 2. According to the middle of the article, please refer to the c-window processing method of the printed circuit board. In the step of the wind, 'using light leakage or imaging, forming a mask after applying the mask material Domain 3. ^ hate complement of said semiconductor according to the first Shu Yun Gu Wei brush ride 'interface processing method' circuit board wherein, in the coating step the mask, the mask coating material of solid or liquid substances.
TW095135043A 2005-04-12 2006-09-22 Window manufacture method of semiconductor package type printed circuit board TWI333265B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050030136A KR100648916B1 (en) 2005-04-12 2005-04-12 Window manufacture method of semiconductor package type printed circuit board
PCT/KR2006/001354 WO2006109997A1 (en) 2005-04-12 2006-04-12 Window manufacture method of semiconductor package type printed circuit board

Publications (2)

Publication Number Publication Date
TW200816407A true TW200816407A (en) 2008-04-01
TWI333265B TWI333265B (en) 2010-11-11

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TWI334320B (en) 2007-07-16 2010-12-01 Nanya Technology Corp Fabricating method of gold finger of circuit board
CN101488486B (en) * 2008-01-15 2010-06-02 力成科技股份有限公司 Circuit substrate capable of opening slots
KR100941982B1 (en) * 2008-04-07 2010-02-11 삼성전기주식회사 Manufacturing method of board on chip package substrate
CN102480844B (en) * 2010-11-23 2014-05-07 深南电路有限公司 Process for manufacturing diffusion coating prevention PCB (printed circuit board) gold-plated board
CN108513433A (en) * 2018-04-24 2018-09-07 苏州维信电子有限公司 A kind of flexible circuit board PAD and its manufacturing method every tin

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JP3415089B2 (en) * 1999-03-01 2003-06-09 住友金属鉱山株式会社 Manufacturing method of printed wiring board
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