TW522574B - GaInP epitaxial stacking structure, a GaInP epitaxial stacking structure for FETs and a fabrication method thereof - Google Patents

GaInP epitaxial stacking structure, a GaInP epitaxial stacking structure for FETs and a fabrication method thereof Download PDF

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Publication number
TW522574B
TW522574B TW89118328A TW89118328A TW522574B TW 522574 B TW522574 B TW 522574B TW 89118328 A TW89118328 A TW 89118328A TW 89118328 A TW89118328 A TW 89118328A TW 522574 B TW522574 B TW 522574B
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TW
Taiwan
Prior art keywords
layer
gallium
item
composition ratio
mentioned
Prior art date
Application number
TW89118328A
Other languages
English (en)
Chinese (zh)
Inventor
Akira Kasahara
Masahiro Kimura
Taichi Okano
Takashi Udagawa
Original Assignee
Showa Denko Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP27435899A external-priority patent/JP3275894B2/ja
Priority claimed from JP27871999A external-priority patent/JP3275895B2/ja
Priority claimed from JP28623499A external-priority patent/JP3371868B2/ja
Priority claimed from JP36863599A external-priority patent/JP2001185719A/ja
Application filed by Showa Denko Kk filed Critical Showa Denko Kk
Application granted granted Critical
Publication of TW522574B publication Critical patent/TW522574B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/0251—Graded layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
TW89118328A 1999-09-28 2000-09-07 GaInP epitaxial stacking structure, a GaInP epitaxial stacking structure for FETs and a fabrication method thereof TW522574B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP27435899A JP3275894B2 (ja) 1999-09-28 1999-09-28 ＧａＩｎＰ系積層構造体の製造方法
JP27871999A JP3275895B2 (ja) 1999-09-30 1999-09-30 ＧａＩｎＰ系積層構造体の製造方法
JP28623499A JP3371868B2 (ja) 1999-10-07 1999-10-07 ＧａＩｎＰ系積層構造体
JP36863599A JP2001185719A (ja) 1999-12-27 1999-12-27 ＧａＩｎＰ系積層構造体及びこれを用いて作製した電界効果型トランジスタ

Publications (1)

Publication Number Publication Date
TW522574B true TW522574B (en) 2003-03-01

Family

ID=27479023

Family Applications (1)

Application Number Title Priority Date Filing Date
TW89118328A TW522574B (en) 1999-09-28 2000-09-07 GaInP epitaxial stacking structure, a GaInP epitaxial stacking structure for FETs and a fabrication method thereof

Country Status (3)

Country Link
DE (1) DE10047659B4 (de)
GB (1) GB2358736B (de)
TW (1) TW522574B (de)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817160B2 (ja) * 1987-10-06 1996-02-21 昭和電工株式会社 気相成長方法
EP0403293B1 (de) * 1989-06-16 1995-12-06 Kabushiki Kaisha Toshiba Verfahren zur Herstellung eines III-V-Verbindungshalbleiterbauelementes
JP2539268B2 (ja) * 1989-07-12 1996-10-02 富士通株式会社 半導体装置
DE4109723A1 (de) * 1991-03-25 1992-10-01 Merck Patent Gmbh Metallorganische verbindungen
JP2994863B2 (ja) * 1992-07-24 1999-12-27 松下電器産業株式会社 ヘテロ接合半導体装置
JP3172958B2 (ja) * 1993-05-20 2001-06-04 富士通株式会社 化合物半導体薄膜の製造方法
JPH10504685A (ja) * 1994-06-29 1998-05-06 ブリテイッシュ・テレコミュニケーションズ・パブリック・リミテッド・カンパニー 半導体基板を準備すること
JPH10247727A (ja) * 1997-03-05 1998-09-14 Matsushita Electric Ind Co Ltd 電界効果型トランジスタ
JPH10335350A (ja) * 1997-06-03 1998-12-18 Oki Electric Ind Co Ltd 電界効果トランジスタ

Also Published As

Publication number Publication date
DE10047659B4 (de) 2007-12-27
GB2358736B (en) 2004-06-23
GB2358736A (en) 2001-08-01
GB0022198D0 (en) 2000-10-25
DE10047659A1 (de) 2001-04-05

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