TW507266B - Method and system for manufacturing semiconductor device - Google Patents

Method and system for manufacturing semiconductor device Download PDF

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Publication number
TW507266B
TW507266B TW090116345A TW90116345A TW507266B TW 507266 B TW507266 B TW 507266B TW 090116345 A TW090116345 A TW 090116345A TW 90116345 A TW90116345 A TW 90116345A TW 507266 B TW507266 B TW 507266B
Authority
TW
Taiwan
Prior art keywords
mentioned
processing
film
manufacturing
semiconductor device
Prior art date
Application number
TW090116345A
Other languages
English (en)
Chinese (zh)
Inventor
Toshiaki Ohmori
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW507266B publication Critical patent/TW507266B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • H01L21/31053Planarisation of the insulating layers involving a dielectric removal step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Weting (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW090116345A 2000-11-16 2001-07-04 Method and system for manufacturing semiconductor device TW507266B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000349027A JP4437611B2 (ja) 2000-11-16 2000-11-16 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW507266B true TW507266B (en) 2002-10-21

Family

ID=18822503

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090116345A TW507266B (en) 2000-11-16 2001-07-04 Method and system for manufacturing semiconductor device

Country Status (4)

Country Link
US (1) US20020056700A1 (en:Method)
JP (1) JP4437611B2 (en:Method)
KR (1) KR100437221B1 (en:Method)
TW (1) TW507266B (en:Method)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006518925A (ja) * 2002-08-28 2006-08-17 東京エレクトロン株式会社 半導体エッチング処理の力学的モデル化及び手法最適化のための方法およびシステム
US6842661B2 (en) * 2002-09-30 2005-01-11 Advanced Micro Devices, Inc. Process control at an interconnect level
US7265382B2 (en) * 2002-11-12 2007-09-04 Applied Materials, Inc. Method and apparatus employing integrated metrology for improved dielectric etch efficiency
US8257546B2 (en) 2003-04-11 2012-09-04 Applied Materials, Inc. Method and system for monitoring an etch process
JP2004319574A (ja) * 2003-04-11 2004-11-11 Trecenti Technologies Inc 半導体装置の製造方法、半導体製造装置の自動運転方法および自動運転システム、並びにcmp装置の自動運転方法
JP2007500941A (ja) * 2003-07-31 2007-01-18 エフエスアイ インターナショナル インコーポレイテッド 高度に均一な酸化物層、とりわけ超薄層の調節された成長
EP1663534A1 (en) * 2003-09-11 2006-06-07 FSI International, Inc. Acoustic diffusers for acoustic field uniformity
TW200517192A (en) * 2003-09-11 2005-06-01 Fsi Int Inc Semiconductor wafer immersion systems and treatments using modulated acoustic energy
JP4305401B2 (ja) * 2005-02-28 2009-07-29 セイコーエプソン株式会社 半導体装置
JP2006245036A (ja) * 2005-02-28 2006-09-14 Seiko Epson Corp 素子分離層の形成方法及び電子デバイスの製造方法、cmp装置
US7596421B2 (en) 2005-06-21 2009-09-29 Kabushik Kaisha Toshiba Process control system, process control method, and method of manufacturing electronic apparatus
US8070972B2 (en) * 2006-03-30 2011-12-06 Tokyo Electron Limited Etching method and etching apparatus
JP4990548B2 (ja) 2006-04-07 2012-08-01 株式会社日立製作所 半導体装置の製造方法
JP5076426B2 (ja) * 2006-09-29 2012-11-21 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4971050B2 (ja) 2007-06-21 2012-07-11 株式会社日立製作所 半導体装置の寸法測定装置
JP5401797B2 (ja) 2008-02-06 2014-01-29 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置製造システム
JP2010087300A (ja) * 2008-09-30 2010-04-15 Toshiba Corp 半導体装置の製造方法
JP5853382B2 (ja) * 2011-03-11 2016-02-09 ソニー株式会社 半導体装置の製造方法、及び電子機器の製造方法
US9005464B2 (en) * 2011-06-27 2015-04-14 International Business Machines Corporation Tool for manufacturing semiconductor structures and method of use
CN104409348B (zh) * 2014-11-10 2017-08-08 成都士兰半导体制造有限公司 沟槽器件的制作方法
WO2018211568A1 (ja) * 2017-05-15 2018-11-22 三菱電機株式会社 半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6060731A (ja) * 1983-09-14 1985-04-08 Hitachi Ltd 半導体装置の製法
US5399229A (en) * 1993-05-13 1995-03-21 Texas Instruments Incorporated System and method for monitoring and evaluating semiconductor wafer fabrication
KR19980014172A (ko) * 1996-08-08 1998-05-15 김광호 반도체 제조공정의 오버레이 측정방법
JP2867982B2 (ja) * 1996-11-29 1999-03-10 日本電気株式会社 半導体装置の製造装置
US6148239A (en) * 1997-12-12 2000-11-14 Advanced Micro Devices, Inc. Process control system using feed forward control threads based on material groups
KR100251279B1 (ko) * 1997-12-26 2000-04-15 윤종용 반도체 제조용 증착설비의 막두께 조절방법
KR100382021B1 (ko) * 2000-02-03 2003-04-26 가부시끼가이샤 도시바 반도체 장치 제조 방법, 반도체 장치 제조 지원 시스템, 및 반도체 장치 제조 시스템

Also Published As

Publication number Publication date
JP2002151465A (ja) 2002-05-24
JP4437611B2 (ja) 2010-03-24
US20020056700A1 (en) 2002-05-16
KR20020038458A (ko) 2002-05-23
KR100437221B1 (ko) 2004-06-23

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MM4A Annulment or lapse of patent due to non-payment of fees