TW475241B - Semiconductor wafer dividing method - Google Patents

Semiconductor wafer dividing method Download PDF

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TW475241B
TW475241B TW089121722A TW89121722A TW475241B TW 475241 B TW475241 B TW 475241B TW 089121722 A TW089121722 A TW 089121722A TW 89121722 A TW89121722 A TW 89121722A TW 475241 B TW475241 B TW 475241B
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semiconductor wafer
streets
photoresist
along
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TW089121722A
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Kazuma Sekiya
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Disco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Drying Of Semiconductors (AREA)

Description

經濟部智慧財產局員工消費合作社印製 475241 A7 B7 五、發明說明（1 ) 發明領域 本發明有關一種半導體晶圓分割法，其用於將一半導 體晶圓（特別是薄型半導體晶圓）分割成多個半導體晶片。本 發明特別有關一種半導體晶圓分割法，其用於沿著半導體 晶圓面上格狀排列之街道將半導體晶圓分割成多個半導體 晶片。 相關技藝的描述 熟悉本技藝者瞭解，製造半導體元件時需將一接近碟 形的半導體晶圓分割成多個長方形的半導體晶片。在半導 體晶圓面上出現有格狀街道，這些街道劃分出多個長方形 區域。在各個長方形區域中配置有一電路。半導體晶圓沿 街道分割，藉以將多個長方形區域各形成一半導體晶片。 用於沿街道分割半導體晶圓的典型方法係採用一種分 割機（dice 1·)，分割機具有沿著街道相對移動之一碟形旋轉 刀片，以沿著街道切割半導體晶圓。近來常使用一種很薄（ 譬如5 0微米或更小）的半導體晶圓，若半導體晶圓很薄，則 使用切割機的半導體晶圓切割方法具有下列問題：利用旋 轉刀片切割薄的半導體晶圓時，在切割邊緣容易產生微小 的缺口 ’且應力容易殘留在切割邊緣部份。此種缺口及/或 應力可能降低所生成半導體晶片之強度。即使作用在半導 體晶片上的是較小的外力或熱衝擊，半導體晶片仍可能破 裂。 已經提出一種以蝕刻而非以旋轉刀片切割來分割半導 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁)
-4- 經濟部智慧財產局員工消費合作社印製 475241 A7 B7__ 五、發明說明（2 ) 體晶圓之方法。此種分割法中，在半導體晶圓面上形成一 種光阻。隨後，沿著街道使光阻暴光，且沿著街道移除光 阻。然後，半導體晶圓進行蝕刻，其中沿著街道選擇性蝕 刻半導體晶圓。結果，沿著街道分割半導體晶圓。根據此 方法，可避免微小的缺口及/或應力。然而，此方法需要對 於多種半導體晶圓各自備妥將光阻沿著街道暴光所用之一 種光罩，由於上述及其他理由，分割半導體晶圓需要很高 的費用。若在街道上產生由一實質不可蝕刻物質所構成之 一種圖案，則無法沿街道蝕刻此圖案，故不可能適用一種 利用蝕刻的分割法。在矽製的半導體晶圓情形中，譬如， 若在街道上出現由譬如銅或鋁等一金屬所構成之一種圖案 ’則無法以一種矽所專用的蝕刻程序來蝕刻用於構成圖案 的金屬。 發明槪論 本發明的主要目的係提供一種新穎且改良的方法，此 方法可藉由沿著街道分割一半導體晶圓而產生一種半導體 晶片’而不會造成微小缺口及/或應力而降低所生成半導體 晶片的強度，且不需要較貴的光罩。 本發明另一目的係提供一種新穎且改良的方法，此方 法即使在街道上出現由一種無法蝕刻的物質所構成的圖案 ，仍可依需要分割半導體晶圓。 爲了達成主要目的，本發明進行一項實際移除一光阻 之獨特的物理移除步驟，此光阻已經在沿著街道延伸的區 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公爱） (請先閱讀背面之注意事項再填寫本頁)
-5- 經濟部智慧財產局員工消費合作社印製 475241 A7 B7_ 五、發明說明（3 ) 域中形成於一半導體晶圓面上。 在可達成此主要目的之半導體晶圓分割法中，本發明 提供一種用於分割半導體晶圓之半導體晶圓分割法，在半 導體晶圓面上以格狀排列的街道劃分多個長方形區域，沿 著街道將多個長方形區域各轉換成爲一半導體晶片，此方 法包含： 一光罩步驟，其用以在半導體晶圓面上形成一光阻； 一物理移除步驟，其用以在光罩步驟之後在沿著街道 延伸的區域中實際移除光阻；及 一蝕刻步驟，其在物理移除步驟之後對於半導體晶圓 施用一種蝕刻程序，以沿著街道蝕刻半導體晶圓。 在物理移除步驟中，較佳以一碟形旋轉刀片沿街道切 割光阻。可在物理移除步驟中移除光阻、並移除沿著街道 延伸的區域中之一種無法蝕刻的物質構成之一圖案，來達 成其餘的目的。一項較佳實施例中，半導體晶圓具有50微 米或更小的厚度，光阻具有5至1 5微米的厚度。 圖式簡單說明 圖1顯示一種含有根據本發明之一種半導體晶圓分割 法所分割之半導體晶圓的組件之立體圖； 圖2顯示在半導體晶圓面上所形成之一光阻之部份剖 視圖； 圖3顯示一種實際移除在沿著街道延伸的區域中已經 形成在半導體晶圓面上的光阻之方法的一項範例之部份剖 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁)
-6- 475241 A7 ______B7__ 五、發明說明（4 ) 視圖；及 圖4顯示沿著街道鈾刻而分割之半導體晶圓的部份剖 視圖。 (請先閱讀背面之注意事項再填寫本頁) 主要元件對照表 2:半導體晶圓組件 3 :分割機 4:半導體晶圓 6:框架 8 :固定帶 10:拱形主要部 1 2:線型部 14:街道 16:長方形區域 1 8 :固定開口 20:光阻 22:旋轉刀片 經濟部智慧財產局員工消費合作社印製 較佳實施例的詳細描述 現在參照圖式詳細描述本發明的半導體晶圓分割法之 較佳實施例。 圖1顯示一種半導體晶圓組件2，其包括一框架6及一 固定帶8，可利用本發明的分割法連同此固定帶8 —起分割 一半導體晶圓4。習知形狀的半導體晶圓4整體趨近碟形’ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 475241 A7 ----------B7____ 五、發明說明（5 ) 且其外周邊緣包括一拱形主要部丨〇及一較短線型部1 2(稱 爲定向平坦部）。本發明的分割法可適用於任意的半導體晶 圓。但是，較佳適用本發明分割法之半導體晶圓4係較薄 而譬如有5 0微米或更小的厚度。格狀排列的多個街道1 4係 配置於半導體晶圓4面上，這些街道丨4劃分出多個長方形 區域1 6。一種需要的電路（未圖示）係形成於各長方形區域 1 6中’如下文詳細描述，半導體晶圓4沿街道1 4分割以將 各個長方形區域1 6轉換成一半導體晶片。組件2中的框架 6係由一種塑膠或金屬材料板製成且在中心處具有一較大直 徑的圓形固定開口 1 8。延伸過框架6的固定開口 1 8之固定 帶8係結合至框架6的後面以及半導體晶圓4的後面，因此 將半導體晶圓4安裝在框架6的固定開口 1 8中，固定帶8 可由一種適當的塑膠帶所構成。 圖2至4示意顯示根據本發明之一種半導體晶圓分割法 的一項較佳實施例，在本發明的半導體晶圓分割法中，初 步進行一項光罩步驟，如圖2所示，在光罩步驟中，在半 導體晶圓組件2中的半導體晶圓4面上形成一光阻20。重 要的是，在後續進行的蝕刻步驟中，光阻20具有不受蝕刻 的性質。光阻20可由熟悉本技藝者所瞭解之一種適當的聚 合性材料製成，光阻20的厚度較佳約爲5至1 5微米，可利 用一種習知的旋轉塗佈機（未圖示）有利地構成此光阻20 ° 在採用旋轉塗佈機的光罩步驟中，以真空將半導體晶圓4 吸引至旋轉塗佈機的一旋轉夾頭，旋轉夾頭雖以高速旋轉 ，一種包含光阻用的一材料之溶液係以液滴方式施加至半 (請先閱讀背面之注意事項再填寫本頁)
本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -8- 475241 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（6 ) 導體晶圓4面而在半導體晶圓4面上形成一種溶液塗層。若 不採用旋轉塗佈機的旋轉塗佈法，則可採用譬如利用一滾 子來塗覆溶液之滾子塗佈等其他適當的方法來構成光阻20 〇 本發明的半導體晶圓分割法中，務必在光罩步驟之後 進行一項物理移除步驟。如圖3所示在物理移除步驟中’ 在半導體晶圓4面上沿著街道1 4延伸的區域中部份地移除 光阻20，而實際有效地移除光阻20。一種較佳物理移除方 法中，利用一種習知的分割機進行移除，其具有一碟形旋 轉刀片22，碟形旋轉刀片22有利地含有鑽石顆粒（圖3僅 顯示分割機3之一部份的碟形旋轉刀片22)。在使用分割機 的物理移除方法中，旋轉刀片22的一下端係位於光阻20面 以下的預定切割深度cl處。當旋轉刀片22高速旋轉時，旋 轉刀片22及半導體晶圓4沿著街道1 4相對移動，因此，旋 轉刀片22沿著街道1 4切割光阻20，可將切割深度d設定爲 與光阻20厚度實質相同（因此，光阻20整個厚度均受到切 割，但半導體晶圓4本身實質未受切割）。或者，可將切割 深度d設定爲比光阻20厚度略大（因此，光阻20整個厚度 均受切割，半導體晶圓4本身表面上亦略受切割）。可將切 割寬度w設定爲與街道1 4寬度實質相同、或略爲較小。 若一種無法由下述蝕刻程序所蝕刻的蝕刻物質（如銅或 鋁）製成之一圖案係出現在半導體晶圓4面上之街道1 4上， 則在物理移除步驟期間，需要在沿著街道1 4延伸的區域中 移除此圖案以及光阻20。 (請先閱讀背面之注意事項再填寫本頁)
. 線· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -9 - 475241 A7 B7 五、發明說明（7 ) 物理移除步驟中，需要在沿著街道1 4延伸的區域中切 割光阻20。因此，務必將旋轉刀片22與街道1 4足夠精確 地對準。若光阻20不透明而無法以普通的光學系統來偵測 街道1 4，則可以一種利用紅外線輻射的光學系統來偵測街 道1 4並將旋轉刀片22與街道1 4予以對準。 在上述物理移除步驟之後，進行一種蝕刻步驟。蝕刻 步驟期間，如圖4所示，在部份地移除光阻2 0之區域（因此 在沿著街道1 4延伸的區域）中蝕刻半導體晶圓4。半導體晶 圓4的蝕刻深度可能實質等於半導體晶圓4的厚度（因此沿 著街道1 4分割半導體晶圓4)，如圖4所示。即使在沿著街 道1 4分割半導體晶圓4時，因爲固定帶8係結合至半導體 晶圓4的後面，所以半導體晶圓組件2仍保持一體狀。若依 需要並未蝕刻半導體晶圓4的整個厚度，則可在後面旁邊 留下略具深度的未蝕刻區域，此情形中，隨後沿著街道1 4 將略微的彎折力施加至半導體晶圓4上，以折裂仍未蝕刻 的區域。可利用此方式來分割半導體晶圓4。 根據本發明的發明人的經驗，在物理移除步驟期間在 半導體晶圓4本身面中形成一略微切割時，可能因爲此切 割而對於半導體晶圓4造成某些應力，但可藉由進行蝕刻 步驟來消除此種應力。 可由一種習知的蝕刻方法來進行蝕刻步驟，可能採用 濕蝕刻，其中包含將一種蝕刻齊ij (譬如對於矽製的半導體晶 圓採用氫氟酸與硝酸的混合物或是氫氧化鉀）施加至半導體 晶圓4。若不用濕蝕刻則可採用乾蝕刻，譬如電漿蝕刻’ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) ·. 線丨丨 經濟部智慧財產局員工消費合作社印製 -10- 475241 A7 B7 五、發明說明（8 ) 其中利用對於一氣體施加高頻電場所產生之一種電漿中的 有效顆粒；或是利用加速離子之噴濺蝕刻。 在完成蝕刻步驟之後，從固定帶8拆離所產生的半導 體晶圓4之個別長方形區域1 6。隨後7或在拆離之前，施 加一種適當的液體以化學方式或以低溫燃燒方式移除半導 體晶圓4的個別長方形區域1 6表面上所出現之光阻20。可 利用此方式產生多個半導體晶片。 (請先閱讀背面之注意事項再填寫本頁)
·- 經濟部智慧財產局員工消費合作社印製 -11 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）

Claims (1)

  1. 475241 A8 B8 C8 D8 六、申請專利範圍 (請先間讀背而之注意事項再填寫本頁) 1 · 一種用於分割半導體晶圓之半導體晶圓分割法’ 在該半導體晶圓面上以格狀排列的街道劃分多個長方形區 域，沿著該等街道將該等多個長方形區域各轉換成爲一半 導體晶片，該方法包含： 一光罩步驟，其甕以在該半導體晶圓面上形成一光阻 ， 一物理移除步驟，其用以在該光罩步驟之後在沿著該 等街道延伸的區域中實際移除該光阻；及 一*触刻步驟，其在該物理移除步驟之後¥彳於該半導體 晶圓施加一蝕刻程序，以沿著該等街道蝕刻該半導體晶圓 〇 2 ·如申請專利範圍第1項之方法，其中： 在該物理移除步驟中，利用一碟形旋轉刀片沿該等街 道切割該光阻。 3 ·如申請專利範圍第1項之方法，其中： 經濟部智慧財4局3工消費合作社印製 一種圖案係出現在該等街道上，該圖案係由一實質無 法以該蝕刻程序蝕刻之物質所構成，並在該物理移除步驟 中沿著該等街道延伸之區域中移除該光阻以及該圖案。 4 ·如申請專利範圍第1項之方法，其中： 該半導體晶圓具有5〇微米或更小的厚度。 5 ;如申請專利範圍第1項之方法，其中： 該光阻具有5至1 5微米的厚度。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -12-
TW089121722A 1999-10-26 2000-10-17 Semiconductor wafer dividing method TW475241B (en)

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