TW469517B - Formation method of tungsten silicide film and manufacturing method of metal-insulating film-semiconductor type transistor - Google Patents

Formation method of tungsten silicide film and manufacturing method of metal-insulating film-semiconductor type transistor Download PDF

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Publication number
TW469517B
TW469517B TW089120316A TW89120316A TW469517B TW 469517 B TW469517 B TW 469517B TW 089120316 A TW089120316 A TW 089120316A TW 89120316 A TW89120316 A TW 89120316A TW 469517 B TW469517 B TW 469517B
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TW
Taiwan
Prior art keywords
layer
forming
tungsten silicide
scope
patent application
Prior art date
Application number
TW089120316A
Other languages
English (en)
Chinese (zh)
Inventor
Manabu Yamazaki
Yuji Maeda
Yasuyuki Kaneko
Ichiro Kawai
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of TW469517B publication Critical patent/TW469517B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H01L21/2686Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation using incoherent radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)
TW089120316A 1999-09-30 2000-09-29 Formation method of tungsten silicide film and manufacturing method of metal-insulating film-semiconductor type transistor TW469517B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27960999A JP2001110750A (ja) 1999-09-30 1999-09-30 タングステンシリサイド膜を形成する方法、および金属−絶縁膜−半導体型トランジスタを製造する方法

Publications (1)

Publication Number Publication Date
TW469517B true TW469517B (en) 2001-12-21

Family

ID=17613378

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089120316A TW469517B (en) 1999-09-30 2000-09-29 Formation method of tungsten silicide film and manufacturing method of metal-insulating film-semiconductor type transistor

Country Status (5)

Country Link
EP (1) EP1156517A1 (enExample)
JP (1) JP2001110750A (enExample)
KR (1) KR20010080635A (enExample)
TW (1) TW469517B (enExample)
WO (1) WO2001024238A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7544616B2 (en) 2007-09-03 2009-06-09 Macronix International Co., Ltd. Methods of forming nitride read only memory and word lines thereof
TWI395254B (zh) * 2006-01-25 2013-05-01 Air Water Inc Film forming device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002044437A2 (en) * 2000-11-02 2002-06-06 Composite Tool Company, Inc. High strength alloys and methods for making same
KR100669141B1 (ko) * 2005-01-17 2007-01-15 삼성전자주식회사 오믹막 및 이의 형성 방법, 오믹막을 포함하는 반도체장치 및 이의 제조 방법
KR100680969B1 (ko) * 2005-08-18 2007-02-09 주식회사 하이닉스반도체 텅스텐실리사이드 박막 형성방법
JP2011258811A (ja) * 2010-06-10 2011-12-22 Ulvac Japan Ltd 半導体装置の製造方法
KR101035738B1 (ko) * 2011-02-24 2011-05-20 주식회사 문라이트 보행자 및 자전거 도로용 조명기구
KR102349420B1 (ko) 2015-02-17 2022-01-10 삼성전자 주식회사 메탈 실리사이드층 형성방법 및 그 방법을 이용한 반도체 소자의 제조방법
JP2017022377A (ja) 2015-07-14 2017-01-26 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2657306B2 (ja) * 1988-07-29 1997-09-24 東京エレクトロン株式会社 金属シリサイド膜の形成方法
JPH06216066A (ja) * 1993-01-14 1994-08-05 Fujitsu Ltd 半導体装置の製造方法
EP0704551B1 (en) * 1994-09-27 2000-09-06 Applied Materials, Inc. Method of processing a substrate in a vacuum processing chamber
EP0746027A3 (en) * 1995-05-03 1998-04-01 Applied Materials, Inc. Polysilicon/tungsten silicide multilayer composite formed on an integrated circuit structure, and improved method of making same
JPH0917998A (ja) * 1995-06-28 1997-01-17 Sony Corp Mosトランジスタの製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI395254B (zh) * 2006-01-25 2013-05-01 Air Water Inc Film forming device
US7544616B2 (en) 2007-09-03 2009-06-09 Macronix International Co., Ltd. Methods of forming nitride read only memory and word lines thereof

Also Published As

Publication number Publication date
EP1156517A1 (en) 2001-11-21
WO2001024238A1 (fr) 2001-04-05
JP2001110750A (ja) 2001-04-20
KR20010080635A (ko) 2001-08-22

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