TW449822B - Process for etching silicon-containing layers on semiconductor substrates - Google Patents

Process for etching silicon-containing layers on semiconductor substrates Download PDF

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Publication number
TW449822B
TW449822B TW088111212A TW88111212A TW449822B TW 449822 B TW449822 B TW 449822B TW 088111212 A TW088111212 A TW 088111212A TW 88111212 A TW88111212 A TW 88111212A TW 449822 B TW449822 B TW 449822B
Authority
TW
Taiwan
Prior art keywords
gas
etching
processing
substrate
processing chamber
Prior art date
Application number
TW088111212A
Other languages
English (en)
Chinese (zh)
Inventor
Padmapani Nallan
Jeffrey D Chinn
Stephen Yuen
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of TW449822B publication Critical patent/TW449822B/zh

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08—Etching
    • C30B33/12—Etching in gas atmosphere or plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/27—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/273—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a delineation of conductive layers, e.g. by RIE
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/905—Cleaning of reaction chamber

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
TW088111212A 1998-07-16 1999-07-01 Process for etching silicon-containing layers on semiconductor substrates TW449822B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/116,621 US6322714B1 (en) 1997-11-12 1998-07-16 Process for etching silicon-containing material on substrates

Publications (1)

Publication Number Publication Date
TW449822B true TW449822B (en) 2001-08-11

Family

ID=22368266

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088111212A TW449822B (en) 1998-07-16 1999-07-01 Process for etching silicon-containing layers on semiconductor substrates

Country Status (6)

Country Link
US (1) US6322714B1 (https=)
EP (1) EP1109955A1 (https=)
JP (1) JP2002520872A (https=)
KR (1) KR100738699B1 (https=)
TW (1) TW449822B (https=)
WO (1) WO2000004213A1 (https=)

Cited By (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110785831A (zh) * 2017-06-21 2020-02-11 硅电子股份公司 用于处理半导体晶片的方法、控制系统和设备，以及半导体晶片
CN110785831B (zh) * 2017-06-21 2024-04-26 硅电子股份公司 用于处理半导体晶片的方法、控制系统和设备，以及半导体晶片

Also Published As

Publication number Publication date
US6322714B1 (en) 2001-11-27
WO2000004213A1 (en) 2000-01-27
EP1109955A1 (en) 2001-06-27
KR20010053548A (ko) 2001-06-25
KR100738699B1 (ko) 2007-07-12
JP2002520872A (ja) 2002-07-09

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