TW432468B - A method of manufacturing a thin film of solid material - Google Patents

A method of manufacturing a thin film of solid material Download PDF

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TW432468B
TW432468B TW087113280A TW87113280A TW432468B TW 432468 B TW432468 B TW 432468B TW 087113280 A TW087113280 A TW 087113280A TW 87113280 A TW87113280 A TW 87113280A TW 432468 B TW432468 B TW 432468B
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substrate
scope
thermal budget
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Bernard Aspar
Michel Bruel
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Commissariat Energie Atomique
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/012Bonding, e.g. electrostatic for strain gauges
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Physical Vapour Deposition (AREA)

Description

4 3 24-63 經濟部中央標準局員工消費合作社印製 Λ7 B7 五、發明説明(1 ) 技術領域 本發明係關於固態材料薄膜之製法。此種方法,特別 許可轉印均質或非均質固態材料薄膜至同種或不同種固態 材料製成之支持件上。 先前技術狀態 文獻FR-A-2681472敘述一種製造半導體材料薄膜之 方法。此文獻揭示植入稀有氣體或氫氣至半導體材料製造 之基材可於接近植入離子滲透平均深度之深度形成檄穴或 微泡(偶爾稱做“小板’’)。若基材經由其植入面緊密接觸加 強件及於足夠溫度施加加熱處理,則造成微穴或微泡交互 作用,結果導致半導體基材分成兩部件:一方面呈半導體 薄膜黏著於加強件,及另一方面半導體基材之其餘部份。 分離出現於微穴或微泡存在位置。加熱處理造成植入產生 之微泡或微穴間交互作用誘使基材薄膜與其餘部份間分離 。因此,由最初基材轉印一張薄膜至用做此薄膜支持件之 加強件上。 此種方法也可應用於製造半導體材料(導電或介電材 料)以外之固態材料薄膜,無論是否為結晶性。 若基材界定之薄膜本身勁度足夠(由於厚度也由於機 械性質),於轉印退火後可獲得自行支持薄膜。此乃文獻 FR-A-2738671之揭示内容。 相反地,無加強件存在下,若薄膜太薄無法誘使基材 之全寬破裂’則氣泡出現於表面輸送微裂隙存先於離子植 入平均深度。此種情況下’加熱處理無法產生自行支持層 ^_ . _ 本紙張尺度適用中國國家榇準(CNS ) A4現格(2!〇X297公釐) (請先閱讀背'面之注意事項再填寫本頁}
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I I 4 3 24 6 8 Λ7 —— -----—J__B7 五、發明説明(2 ) ,一™ ~~~-~ -- 反而僅產生薄片。 文獻FR-A-2681472中,加熱處理係由植入步驟㈣ 步驟之退火溫度界定。退火溫度高於植入溫度,故造成薄 膜與基材其餘部份間之分離。 前述文獻規定加熱處理係於高於植入溫度之溫度進行 。文獻FR-A-2681472指示,於矽製成之基材之例,植入 溫度較佳於2〇t至450°C,用於退火需要更高溫,例如5〇〇 t。 但,於某些情況下及用於某些用途,高熱處理溫度造 成缺點。事實上,較佳於低溫,特別於比植入溫度更低溫 獲得基材分裂。1此點於轉印係結合具有不同熱膨脹係數之 材料時特別顯著;。 較佳於高溫,亦即高於加熱處理溫度進行離子植入步 驟。其優點為若未限制植入溫度,則可能產生高植入電流 密度而無需冷卻基材。植入時間可極為縮短。 此外,介於離子植入步驟與造成分裂之加熱處理(或 退火步驟)間可處理植入面,例如於半導體材料製成之基 材之例,意圖形成電子電路處理植入面。此種中間處理於 退火溫度過雨時可能受不良影響D 發明說明 本發明需可解決先前技術問題》發明人事實上發現, 若考慮於方法各步驟製成(離子植入步驟,可能基材黏著 於加強件’可能中間處理及退火步驟其許可分離)期間, 若考慮供熱至基材之熱預算,則可降低退火溫度。熱預算 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公楚) I----------1r__ (請先閱讀背&之汰意事項再填寫本頁) 訂 經濟部中央標隼局員工消费合作社印製 6 經濟部中央標準局員工消贤合作社印製 :¾ 3 Η 4 S 3 - Α7 ' ____· _Β7 五、發叨説明(3 ) 一詞表示對供熱步驟(例如退火步驟)不僅需考慮溫度,也 需於施熱至基材時考慮時間與溫度的組合。 例如,對於矽及微弱攙雜之基材而言,以能量691^乂 劑量5,5 X 106離子H+/平方厘米植入於80°C歷約5分鐘時間 ’隨著熱預算出現分裂’於恒溫退火之例依據時間_溫度 組合決定。熱預算於450Ό為2小時15分。若植入劑量更大 ’例如對弱攙雜矽製成的基材使用能量69keV劑量1〇”離 子H+/平方厘米於8(TC溫度植入5分鐘,獲得分裂所需熱預 算比先前更短。此種熱預算例如於450 °C為2分22秒或300 C為1小時29分。因此於怪溫退火之例,對熱預算出現分 裂’此熱預算與前例不同但仍與時間/溫度之組合相關。 熱預算之選擇將依據材料類型及攙雜時之攙雜程度而定。 舉例言之,對強力攙雜矽(例如1 〇20硼/立方厘求)而言 ’使用能量69keV劑量5_5X 106離子H+/平方厘米於8(rc溫 度植入5分鐘’於300°C4分15秒或225°C1小時43分之熱預 算獲得分裂。 於加熱處理係使用溫度漸進升高進行微粒,於此期間 施加至基材之熱預算需考慮溫度升高原因為其可能促成分 裂。 一般而言,熱預算之選擇係依據整組應用於基本材料 或始於植入步驟之結構之熱預算而定。全部熱預算形成— 張熱平衡單而許可達成結構分裂。此種熱平衡單係由至少 兩種熱預算形成:植入熱預算及退火熱預算。 依攄用途而定,可包括其它類型預算例如:於點著界 本紙張尺度適用中國國家操準(CNS ) A4規格(2丨0·〆297公釐) (請先閱讀背*之注ί項再填寫本頁)
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五、發明説明(4 24 6 8 經濟部中央標準扃員工消贤合作社印製 面強化分子件之熱預算或形成分子件之熱預算及產生活性 元素之一種或多種熱預算。 因此,本發明之目的為一種製造固態材料薄膜之方法 ,該方法包括至少下列步驟: 一個離子植入步驟,係經由固態材料基材之—面’使 用可於基材容積_内基於接近離子滲透平均《菜度之深度產生 一層微穴或微泡層之離子進行’此步驟係於特定溫度進行 特定時間, 個退火步驟,其意圖調整微穴或微泡層至特定溫度 歷特定時間,意圖於微穴或微泡層兩面獲得基材之分裂。 其特徵為退火步驟係以關聯離子植入步驟熱預算及植 入離子劑量及能量及可能其它步驟之其它熱預算製作的熱 預算進行俾獲得基材之分裂。 刀裂巧以廣義意義表示造成任何類型的破裂。 本發明方法許可生產固態材料薄膜,包括結晶性或非 結晶性’其可為導電材料,半導體材料或介電材料。固態 材料基材可為層狀。對退火步驟製作之熱預算也可考慮植 入步驟參數如植入離子劑量及能量。 可植入之離子較佳為稀有氣體離子或氫離子。離子植 入方向為基材表面之法線方向或略為傾斜。 氫一詞包括氣態物種,包括原子形式(如H)或分子形 式(如H2)或離子形式(H+,H2+,·,)或同位素形式⑻或同 位素及離子形式等。 退火步驟之熱預算也可製作成自然獲得或藉施加應力 ΜΛ張尺刺t關家轉(規格(210X297公楚厂 (請先間讀背命之注意事項再填寫本頁) 訂. 4 3 2 4 6 3 經濟部中央標準局員工消費合作社印製 Λ7 B7 五、發明説明(5 ) , : 於基材輔助獲得基材的分裂。 退火步驟之熱預算包括至少溫度之快速上升及/或至 少溫度之快速下降。此種溫度之快速變化係以每分鐘數度 至數十度或確實^每秒數百度進行(快速退火(rta)型退火處 理)。退火處理提供某些植入條件優點,原因為其可輔助 微穴之形成(或稱凝核)。 退火步驟之熱預算亦可為零,基材之分裂可使用機械 • 應力或熱應力獲得。實際上,熱預算為施加之溫度及時間 之函數。退火步驟之熱預算之溫度,例如,為〇它至高於1〇〇〇 °C而時間可由0秒至數小時。因此若退火步驟前之熱預算 係以咼溫及/或長時間進行;及若植入離子之劑量及能量 高(例如對矽而言,約1〇ι?Η+/平方厘米具有能量1〇〇keV), 則退火熱預算,甚至就時間及溫度而言’皆可為零。單純 的應力及許可分裂。此種應力,例如可為機械應力(如剪 力及/或拉力)或熱應力(如冷卻結構)。 此外,該方法包括固定基材之植入面於支持件之步驟 。基材植入面固定於支持件可使用黏著材料進行。固定步 驟包括加熱處理。退火步驟可藉脈波式加熱進行。 本發明方法特別可應用於製造單晶矽薄膜。此種情況 下,於基材分裂前,全部或部份至少一種活性元素可於基 材之意圖形成薄臈之部份產生。若該基材表面於離子植入 步驟前被隸,則«可使離子植人步㈣成微穴或微泡 區段充份彼此接近而可獲得分裂。 根據本發明方法,同等適用於始於基材而基材表面已 本紙張又度適用—赴j----
-Q (請先閲讀背盼之注意事項再填寫本頁)
經濟部中央標準局員工消費合作社印11 • Λ 7 Β7 五、發明説明(6 ) . 精製作圖樣者生產薄膜。 本方法也適用於由包括各種不同化學材料層之基材生 產薄膜。 本方法也適用於由包括至少一層石夕藉晶膜增長所得層 之基材生產薄膜。此種增長可藉晶膜外延増長所得,可使 分裂出現於晶膜外延增長層或出現於晶膜外延增長層之另 一侧,或出現於其界面。 經由研讀後文之非限制性實例將更了解本發明。 發明具體例之詳細說明 本發明之第一具體例係於相對高溫進行植入步驟。 為了改良設備’特別改良植入裝置之生產力,顯然感 興趣地係使用可供給高電流密度之機器。例如,於1 〇〇平 方厘米表面積供給4毫安電流許可於200秒或於3分鐘獲得5 X106離子HV平方厘米劑量◊若此植入係於5〇]^乂(獲得平 均深度約500亳微米)進行,則獲得約2瓦/平方厘米功率, 此於矽之例用於未經冷卻之尋常检入裝置可得约47〇艺溫 度。 總結而言’此種情況下’獲得植入所需劑量係於約470 3C經歷約3分鐘時間進行植入。 釦加強件施用於基材及對基材進行於45〇t約1小時之 退火加熱處理,則加熱處理之熱預算為微穴可彼此交互作 用產生裂痕。因此,薄膜由石夕轉印至加強件。 本例明白驗證若於植入過程及加熱處理過程小心施加 熱預算之基材,則可於低於植入溫度之溫度獲得分裂。 本紙張尺錢财_祕-- f請先閲讀背面之注意事項再填寫本頁) -訂 .〆 10 432468 A 7 B7 五、發明説明(7 ) . 總結言之,本發明包括使用最小熱預算進行加熱處理 而獲得分裂。此種最小熱預算考慮全部熱預算最重要地為 植入提供之熱预算及退火提供之熱預算。 本發明之第二具體例可應用於具有熱膨脹係數與支持 件不同之材料之轉印,此乃非均質結構之例β 於轉印矽之純矽氧之例,加強件之熱膨脹係數與半導 體材料不同。於輕度攙雜矽之例許可轉印單晶矽之熱預算 約為於450°C數小時(6小時)。於此溫度,由基材及由支持 件(加強件)獲得之部件於退火過程緊密接觸此種分離係 發生於其緊密接觸界面而非發生於微穴或微泡所在該層。 相反地,若矽氧製成之支持件厚度夠小(例如4〇〇微米), 則總成高達250°C不會分離。該種情況下,矽被強力攙雜( 例如,p型攙雜1〇20硼原子/平方厘米),對250。〇 1小時之熱 預算及以約5 X 106H+離子/平方厘米劑量植入氫離子獲得 分裂。如前述此種劑量於植入溫度約470°C培育約15分 鐘時間獲得。 又於此種情況下,於低於植入溫度之退火溫度可獲得 分裂。 眾所周知此種方法於退火溫度高於植入溫度時效果亦 佳。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公尨) (請先閲讀背面之法意事項再填寫本頁) 訂 經濟部中失標隼局員工消費合作社印製 11

Claims (1)

  1. 六、申請專利範圍 第087113280號專利申請案申請專利範圍修正本 修正曰期:90年2月 1· 一種製造固態材料薄膜之方法,該方法包括異少下列步 驟: 一個離子植入步驟’係使用可於基材容積内以及於 接近離子潑透平均深度之深度產生一層微穴或微泡層 之離子,經由固態材料基材之一面進行,此步驟係於特 定溫度下進行特定時間, 個退火步驟’其意圖促使微穴或微泡層至特定溫 度以及歷特定時間,同時意圖於微穴或微泡層兩面獲得 基材之分裂, 其特徵為退火步驟係以關聯離子植入步驟熱預算 和植入離子之劑量與能量以及可能由其它步轉推測得 之其它熱預算製作的熱預算進行,俾獲得基材之分裂。 2·如申請專利範圍第1項之方法,其特徵為該退火步驟之 熱預算也可被製作成為了獲得該基材於自然地或於被 施加應力後分裂。 3. 如申請專利範圍第1或2項中任一項之方法,其特徵為該 退火步驟之熱預算包括至少一次溫度快速升高及/或至 少一次溫度快速下降。 4. 如申請專利範圍第1或2項中任一項之方法,其特徵為該 退火步驟之熱預算為零,該基材之分裂係使用機械及/ 或熱應力獲得。 5. 如申請專利範圍第1項之方法,其特徵為其額外包括一 本紙張尺度適用中國國家標牟(CNS ) A4規格(210X 297公着) (請先閲讀背面之注意事項再填寫本頁) -5 經濟部智慧財產局員工消費合作社印製 J.—HJW -------- 經濟部智慧財產局員工消費合作社印製 4 3 2 4 〇 B AS B8 - 穴、申請專利範圍 _ —— .個固定該基材之植A面於—支持件之步驟。 6·如申请專利範圍第5項之方法,其特徵為該基材之植入 -面固定於該支持件之完成係利用黏著物質。 7.如申請專利範圍第5之方法,其特徵為該固定步驟包括 一加熱處理。 8·如申讀專利範園第5項之方法,其特徵為該固定步驟係 藉分子黏著進行。 9·=申請專利範圍第丨項之方法,其特徵為該退火步驟孫 精脈波式加熱進行。 1〇.如申請專利範圍第1項之方法,其特徵為該離子植入步 驟係經由一種單晶矽薄膜之一面進行。 11_如申請專利範圍第〗項之方法,其特徵為該方法包括一 步驟,俾於獲得基材之分裂前,形成全部或部份之至少 一種活性元素於欲形成薄膜之基材部件上。 U·如申請專利範圍第1項之方法,其特徵為該方法包括一 步驟,俾使該基材表面於離子植入步驟前被一遮罩遮蔽 ,以及該遮蔽使離子植入步驟可形成微穴或微泡之區段 充份地彼此接近而可獲得該分裂。 13. 如申請專利範圍第丨項之方法,其特徵為該方法係始於 一基材,該基材之表面已經製作圖樣。 14. 如申請專利範圍第I項之方法,其特徵為該方法係始於 —基材,該基材包括不同化學種類層。 15. 如申請專利範圍第〗項之方法,其特徵為該方法係始於 一基材,該基材包括至少一層藉增長所得之層。 本紙張尺度適用中國國家楯準(CNS > A4規格(2丨0X297公釐) (請先閱讀背面之注意事項再填寫本頁)
    ' 2 - A8 B8 C8 D8 六、申請專利範圍 16.如申請專利範圍第15項之方法,其特徵為該增長係籍磊 晶獲得。 <請先閲讀背面之注意事項再填寫本頁) 訂---------線丨 經濟部智慧財產局員工消費合作社印製 -3 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)
    六、申請專利範圍 第087113280號專利申請案申請專利範圍修正本 修正曰期:90年2月 1· 一種製造固態材料薄膜之方法,該方法包括異少下列步 驟: 一個離子植入步驟’係使用可於基材容積内以及於 接近離子潑透平均深度之深度產生一層微穴或微泡層 之離子,經由固態材料基材之一面進行,此步驟係於特 定溫度下進行特定時間, 個退火步驟’其意圖促使微穴或微泡層至特定溫 度以及歷特定時間,同時意圖於微穴或微泡層兩面獲得 基材之分裂, 其特徵為退火步驟係以關聯離子植入步驟熱預算 和植入離子之劑量與能量以及可能由其它步轉推測得 之其它熱預算製作的熱預算進行,俾獲得基材之分裂。 2·如申請專利範圍第1項之方法,其特徵為該退火步驟之 熱預算也可被製作成為了獲得該基材於自然地或於被 施加應力後分裂。 3. 如申請專利範圍第1或2項中任一項之方法,其特徵為該 退火步驟之熱預算包括至少一次溫度快速升高及/或至 少一次溫度快速下降。 4. 如申請專利範圍第1或2項中任一項之方法,其特徵為該 退火步驟之熱預算為零,該基材之分裂係使用機械及/ 或熱應力獲得。 5. 如申請專利範圍第1項之方法,其特徵為其額外包括一 本紙張尺度適用中國國家標牟(CNS ) A4規格(210X 297公着) (請先閲讀背面之注意事項再填寫本頁) -5 經濟部智慧財產局員工消費合作社印製 J.—HJW --------
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KR100528258B1 (ko) 2005-11-15
DE69839427T2 (de) 2009-06-04
MY122498A (en) 2006-04-29
FR2767416B1 (fr) 1999-10-01
WO1999008316A1 (fr) 1999-02-18
JP4369040B2 (ja) 2009-11-18
JP2001512906A (ja) 2001-08-28
US6303468B1 (en) 2001-10-16
KR20010022284A (ko) 2001-03-15

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