TW368727B - Manufacturing method for shallow trench isolation structure - Google Patents

Manufacturing method for shallow trench isolation structure

Info

Publication number
TW368727B
TW368727B TW087103891A TW87103891A TW368727B TW 368727 B TW368727 B TW 368727B TW 087103891 A TW087103891 A TW 087103891A TW 87103891 A TW87103891 A TW 87103891A TW 368727 B TW368727 B TW 368727B
Authority
TW
Taiwan
Prior art keywords
shallow trench
oxide
trench isolation
substrate
manufacturing
Prior art date
Application number
TW087103891A
Other languages
English (en)
Inventor
zhi-rong Chen
yun-ming Zou
Yong-Fen Xie
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW087103891A priority Critical patent/TW368727B/zh
Priority to US09/098,251 priority patent/US6093618A/en
Application granted granted Critical
Publication of TW368727B publication Critical patent/TW368727B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
TW087103891A 1998-03-17 1998-03-17 Manufacturing method for shallow trench isolation structure TW368727B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW087103891A TW368727B (en) 1998-03-17 1998-03-17 Manufacturing method for shallow trench isolation structure
US09/098,251 US6093618A (en) 1998-03-17 1998-06-16 Method of fabricating a shallow trench isolation structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW087103891A TW368727B (en) 1998-03-17 1998-03-17 Manufacturing method for shallow trench isolation structure

Publications (1)

Publication Number Publication Date
TW368727B true TW368727B (en) 1999-09-01

Family

ID=21629694

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087103891A TW368727B (en) 1998-03-17 1998-03-17 Manufacturing method for shallow trench isolation structure

Country Status (2)

Country Link
US (1) US6093618A (zh)
TW (1) TW368727B (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11274287A (ja) * 1998-03-24 1999-10-08 Sharp Corp 素子分離領域の形成方法
US6238997B1 (en) * 1999-01-25 2001-05-29 United Microelectronics Corp. Method of fabricating shallow trench isolation
US6297128B1 (en) * 1999-01-29 2001-10-02 Vantis Corporation Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress
KR100281192B1 (ko) * 1999-03-04 2001-01-15 황인길 반도체 소자 분리를 위한 얕은 트렌치 제조 방법
US6303043B1 (en) * 1999-07-07 2001-10-16 United Microelectronics Corp. Method of fabricating preserve layer
JP2001085511A (ja) * 1999-09-14 2001-03-30 Toshiba Corp 素子分離方法
US6740555B1 (en) * 1999-09-29 2004-05-25 Infineon Technologies Ag Semiconductor structures and manufacturing methods
TW448537B (en) * 1999-10-29 2001-08-01 Taiwan Semiconductor Mfg Manufacturing method of shallow trench isolation
JP2001144170A (ja) * 1999-11-11 2001-05-25 Mitsubishi Electric Corp 半導体装置およびその製造方法
TW478099B (en) 2000-11-03 2002-03-01 Applied Materials Inc Shallow trench isolation manufacture method
KR20020042251A (ko) * 2000-11-30 2002-06-05 박종섭 반도체 소자의 분리구조 제조방법
JP3577024B2 (ja) * 2001-10-09 2004-10-13 エルピーダメモリ株式会社 半導体装置及びその製造方法
EP1336899A1 (en) * 2002-02-15 2003-08-20 ASML Netherlands B.V. Lithographic apparatus, alignment method and device manufacturing method
US7494894B2 (en) * 2002-08-29 2009-02-24 Micron Technology, Inc. Protection in integrated circuits
JP4369379B2 (ja) * 2005-02-18 2009-11-18 富士通マイクロエレクトロニクス株式会社 半導体装置
US20090041952A1 (en) 2007-08-10 2009-02-12 Asm Genitech Korea Ltd. Method of depositing silicon oxide films

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW312821B (en) * 1996-11-19 1997-08-11 United Microelectronics Corp Manufacturing method of shallow trench isolation
US5970363A (en) * 1997-12-18 1999-10-19 Advanced Micro Devices, Inc. Shallow trench isolation formation with improved trench edge oxide
TW389982B (en) * 1998-01-26 2000-05-11 United Microelectronics Corp Method of manufacturing shallow trench isolation
TW395015B (en) * 1998-08-18 2000-06-21 United Microelectronics Corp Method for aligning shallow trench isolation

Also Published As

Publication number Publication date
US6093618A (en) 2000-07-25

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