TW346662B - Process for producing polybuffered spacer LOCOS isolation - Google Patents

Process for producing polybuffered spacer LOCOS isolation

Info

Publication number
TW346662B
TW346662B TW086105081A TW86105081A TW346662B TW 346662 B TW346662 B TW 346662B TW 086105081 A TW086105081 A TW 086105081A TW 86105081 A TW86105081 A TW 86105081A TW 346662 B TW346662 B TW 346662B
Authority
TW
Taiwan
Prior art keywords
layer
forming
silicon nitride
nitride layer
silicon
Prior art date
Application number
TW086105081A
Other languages
Chinese (zh)
Inventor
Jyh-Shyan Wang
Cherng-Tsong Ni
Jyh-Yau Hwang
Original Assignee
Mos Electronics Taiwan Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mos Electronics Taiwan Inc filed Critical Mos Electronics Taiwan Inc
Priority to TW086105081A priority Critical patent/TW346662B/en
Application granted granted Critical
Publication of TW346662B publication Critical patent/TW346662B/en

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  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

A process for producing polybuffered spacer LOCOS isolation, which at least comprising the following steps: forming a pad oxide layer on a silicon substrate; forming a first silicon nitride layer on the pad oxide layer; forming a photoresist layer on the first silicon nitride layer thereby defining an active region; dry etching the first silicon nitride layer using the photoresist layer as a mask; wet etching the pad oxide layer thereby forming a cavity; forming a silicon dioxide layer on the silicon substrate; forming a polysilicon layer on the silicon dioxide layer and the first silicon nitride layer; forming a second silicon nitride layer on the polysilicon layer; anisotropically etching the second silicon nitride layer; growing a field oxidation layer by a wet oxidation method thereby forming a polysilicon oxidation layer; and etching to remove the second silicon nitride layer, the polysilicon oxidation layer, the first silicon nitride layer, the silicon dioxide layer and the pad oxide layer.
TW086105081A 1997-04-18 1997-04-18 Process for producing polybuffered spacer LOCOS isolation TW346662B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW086105081A TW346662B (en) 1997-04-18 1997-04-18 Process for producing polybuffered spacer LOCOS isolation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086105081A TW346662B (en) 1997-04-18 1997-04-18 Process for producing polybuffered spacer LOCOS isolation

Publications (1)

Publication Number Publication Date
TW346662B true TW346662B (en) 1998-12-01

Family

ID=58263921

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086105081A TW346662B (en) 1997-04-18 1997-04-18 Process for producing polybuffered spacer LOCOS isolation

Country Status (1)

Country Link
TW (1) TW346662B (en)

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees