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Application filed by Yuh Chuang Technology Corp, Ind Tech Res InstfiledCriticalYuh Chuang Technology Corp
Priority to TW82101030ApriorityCriticalpatent/TW263597B/en
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A method for forming oxide isolation region on silicon wafer surface comprises the steps of: forming one thin oxide layer on the above wafer; forming one impurity doped polysilicon on the above oxide layer; forming one silicon nitride layer on the above silicon layer; patterning the above silicon nitride layer; utilizing thermal oxidization process to form the above oxide isolation region; utilizing one contiguous etching step with phosphoric acid as etching component, and under the condition of over 150 centigrade temperature removing the above silicon nitride layer and polysilicon layer to complete the above oxide isolation region on the above wafer surface.
TW82101030A1993-02-111993-02-11Oxide isolation process of pit-free polysilicon buffer
TW263597B
(en)