KR970009616B1 - Fabricating method of semiconductor device - Google Patents
Fabricating method of semiconductor device Download PDFInfo
- Publication number
- KR970009616B1 KR970009616B1 KR93031903A KR930031903A KR970009616B1 KR 970009616 B1 KR970009616 B1 KR 970009616B1 KR 93031903 A KR93031903 A KR 93031903A KR 930031903 A KR930031903 A KR 930031903A KR 970009616 B1 KR970009616 B1 KR 970009616B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- oxide film
- nitride
- etched
- transition metal
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 150000004767 nitrides Chemical class 0.000 abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 229920005591 polysilicon Polymers 0.000 abstract 3
- 229910052723 transition metal Inorganic materials 0.000 abstract 2
- 150000003624 transition metals Chemical class 0.000 abstract 2
- 239000005380 borophosphosilicate glass Substances 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
- 229910000314 transition metal oxide Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A gate oxide film(28), a polysilicon(29), a nitride film(30) are deposited in succession on the upper part of the whole structure, then a photoresist film pattern(31) being formed. The first nitride pattern is etched as the same size as that of an upper part of the remaining polysilicon, forming a second nitride pattern(30") and the remaining polysilicon is etched, forming a gate electrode(29"). A low temperature oxide film is deposited on the upper part of the whole structure, then a nitride film(10") and an oxide film being etched at same speed, a transition metal film(33) and thermal oxide film(34) being formed in succession, then thermally processed at high temperature, thereby the transition metal film being transformed into a transition metal oxide film(33'). An oxide film for an interlayer insulation and BPSG film are formed on the upper part of the whole structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93031903A KR970009616B1 (en) | 1993-12-31 | 1993-12-31 | Fabricating method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93031903A KR970009616B1 (en) | 1993-12-31 | 1993-12-31 | Fabricating method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021133A KR950021133A (en) | 1995-07-26 |
KR970009616B1 true KR970009616B1 (en) | 1997-06-14 |
Family
ID=19374820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR93031903A KR970009616B1 (en) | 1993-12-31 | 1993-12-31 | Fabricating method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970009616B1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100773537B1 (en) | 2003-06-03 | 2007-11-07 | 삼성전자주식회사 | Nonvolatile memory device composing one switching device and one resistant material and method of manufacturing the same |
KR101051704B1 (en) | 2004-04-28 | 2011-07-25 | 삼성전자주식회사 | Memory device using multilayer with resistive gradient |
-
1993
- 1993-12-31 KR KR93031903A patent/KR970009616B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950021133A (en) | 1995-07-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW364169B (en) | Improved process for silicide layer of MOS device | |
WO2002097889A3 (en) | Semiconductor device and a method therefor | |
EP0395072A3 (en) | Bonding pad used in semiconductor device | |
EP0354717A3 (en) | Semi-conductor device and method of manufacturing such a device | |
EP0399141A3 (en) | Method of fabricating a semiconductor device by capping a conductive layer with a nitride layer | |
EP0526212A3 (en) | Method of forming isolated regions of oxide | |
EP0782181A3 (en) | Method of manufacturing VDMOS with a termination structure | |
EP0315422A3 (en) | Semiconductor memory device having an ohmic contact between an aluminum-silicon alloy metallization film and a silicon substrate | |
US4985746A (en) | Semiconductor device and method of production | |
JPH0855982A (en) | Semiconductor device and manufacture thereof | |
US6150220A (en) | Insulation layer structure and method for making the same | |
TW356572B (en) | Method for forming metal wiring of semiconductor devices | |
TW288205B (en) | Process of fabricating high-density flat cell mask read only memory | |
GB2180991A (en) | Silicide electrode for semiconductor device | |
KR970009616B1 (en) | Fabricating method of semiconductor device | |
EP0186296A3 (en) | Method of producing a contact on a semiconductor device | |
WO1996030940A3 (en) | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH BiCMOS CIRCUIT | |
TW362259B (en) | Method for forming an isolation region in a semiconductor device and resulting structure | |
KR960008564B1 (en) | Gate electrode-forming method | |
TW332928B (en) | Producing method of semiconductor device | |
JPS6489457A (en) | Manufacture of semiconductor device | |
JPS52124860A (en) | Electrode formation method for semiconductor devices | |
TW355841B (en) | Manufacturing method for semiconductor formed of titanium/tangsten silicon | |
JPS6430252A (en) | Semiconductor device | |
JPS57134971A (en) | Mis type simiconductor device and manufacture of the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20100920 Year of fee payment: 14 |
|
LAPS | Lapse due to unpaid annual fee |