TW375776B - Process for forming self-aligned twin well region having planar surface - Google Patents

Process for forming self-aligned twin well region having planar surface

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Publication number
TW375776B
TW375776B TW086104188A TW86104188A TW375776B TW 375776 B TW375776 B TW 375776B TW 086104188 A TW086104188 A TW 086104188A TW 86104188 A TW86104188 A TW 86104188A TW 375776 B TW375776 B TW 375776B
Authority
TW
Taiwan
Prior art keywords
ion
substrate
well region
forming
region
Prior art date
Application number
TW086104188A
Other languages
Chinese (zh)
Inventor
Shye-Lin Wu
Original Assignee
Powerchip Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Powerchip Semiconductor Corp filed Critical Powerchip Semiconductor Corp
Priority to TW086104188A priority Critical patent/TW375776B/en
Application granted granted Critical
Publication of TW375776B publication Critical patent/TW375776B/en

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Abstract

A process for forming self-aligned twin well region having planar surface, comprising at least forming pad oxide on substrate and forming photoresist layer thereon to define a first well region; subsequently, implanting a first ion having a first conduction pattern inside the substrate using photoresist layer as mask, and then implanting a second ion having first conduction pattern inside the substrate using again photoresist layer as mask; forming a silicon oxide layer on the portion of pad oxide layer not covered by photoresist layer by liquid deposition; after removing photoresist layer, driving the first ion and second ion into the substrate to form a first well region; using silicon oxide layer as mask, implanting a third ion having a second conduction pattern inside the substrate, and driving in the third ion inside the substrate to form a second well region; then forming a silicon nitride region on pad oxide layer to define an active element region, and oxidizing by high temperature the portion of pad oxide not covered by silicon oxide region to form a field oxide region; and finally, implanting a fourth ion having a second conduction pattern into the substrate.
TW086104188A 1997-04-01 1997-04-01 Process for forming self-aligned twin well region having planar surface TW375776B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW086104188A TW375776B (en) 1997-04-01 1997-04-01 Process for forming self-aligned twin well region having planar surface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086104188A TW375776B (en) 1997-04-01 1997-04-01 Process for forming self-aligned twin well region having planar surface

Publications (1)

Publication Number Publication Date
TW375776B true TW375776B (en) 1999-12-01

Family

ID=57941928

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086104188A TW375776B (en) 1997-04-01 1997-04-01 Process for forming self-aligned twin well region having planar surface

Country Status (1)

Country Link
TW (1) TW375776B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI603433B (en) * 2015-09-08 2017-10-21 鴻海精密工業股份有限公司 Complementary metal oxide semiconductor device and method making same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI603433B (en) * 2015-09-08 2017-10-21 鴻海精密工業股份有限公司 Complementary metal oxide semiconductor device and method making same

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees