TW358997B - Method and apparatus for performing operative testing on an IC - Google Patents

Method and apparatus for performing operative testing on an IC

Info

Publication number
TW358997B
TW358997B TW086118182A TW86118182A TW358997B TW 358997 B TW358997 B TW 358997B TW 086118182 A TW086118182 A TW 086118182A TW 86118182 A TW86118182 A TW 86118182A TW 358997 B TW358997 B TW 358997B
Authority
TW
Taiwan
Prior art keywords
wafer
operative testing
performing operative
testing
block
Prior art date
Application number
TW086118182A
Other languages
English (en)
Inventor
Bernard J Pappert
Clark Shepard
Alfred L Crouch
Robert Ash
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW358997B publication Critical patent/TW358997B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G01R31/3008—Quiescent current [IDDQ] test or leakage current test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
TW086118182A 1997-02-04 1997-12-03 Method and apparatus for performing operative testing on an IC TW358997B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/795,030 US5929650A (en) 1997-02-04 1997-02-04 Method and apparatus for performing operative testing on an integrated circuit

Publications (1)

Publication Number Publication Date
TW358997B true TW358997B (en) 1999-05-21

Family

ID=25164448

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086118182A TW358997B (en) 1997-02-04 1997-12-03 Method and apparatus for performing operative testing on an IC

Country Status (7)

Country Link
US (1) US5929650A (zh)
EP (1) EP0856794A1 (zh)
JP (1) JPH10223716A (zh)
KR (1) KR19980071048A (zh)
CN (1) CN1190255A (zh)
SG (1) SG78283A1 (zh)
TW (1) TW358997B (zh)

Families Citing this family (96)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020157082A1 (en) * 1997-09-30 2002-10-24 Jeng-Jye Shau Inter-dice wafer level signal transfer methods for integrated circuits
US6278956B1 (en) * 1998-04-30 2001-08-21 International Business Machines Corporation Method of locating a failed latch in a defective shift register
WO2000011486A1 (fr) * 1998-08-24 2000-03-02 Hitachi, Ltd. Circuit integre a semi-conducteur
JP2000074986A (ja) * 1998-08-31 2000-03-14 Ando Electric Co Ltd デバイス試験装置
DE19839807C1 (de) * 1998-09-01 1999-10-07 Siemens Ag Verfahren zum Betrieb einer integrierten Schaltung
DE19908379A1 (de) * 1999-02-26 2000-09-14 Orga Kartensysteme Gmbh Einrichtung zum Testen der elektrischen Funktionstüchtigkeit einer kontaktbehafteten Chipkarte
DE19917586C2 (de) * 1999-04-19 2002-01-17 Infineon Technologies Ag Anordnung zur Durchführung von Burn-In-Behandlungen von Halbleitervorrichtungen auf Waferebene
US6262585B1 (en) * 1999-06-14 2001-07-17 Intel Corporation Apparatus for I/O leakage self-test in an integrated circuit
KR100701374B1 (ko) * 2000-01-12 2007-03-28 동부일렉트로닉스 주식회사 반도체 소자의 아이디디큐 불량분석 방법
US6429677B1 (en) * 2000-02-10 2002-08-06 International Business Machines Corporation Method and apparatus for characterization of gate dielectrics
US7173444B2 (en) * 2000-04-04 2007-02-06 Ali Pourkeramati Structure and method for parallel testing of dies on a semiconductor wafer
US6410350B1 (en) * 2000-06-29 2002-06-25 Advanced Micro Devices Detecting die speed variations
EP1180691A1 (en) * 2000-08-08 2002-02-20 Motorola, Inc. Circuit and method for stress testing a transistor in an integrated circuit device
US6844751B2 (en) * 2000-09-30 2005-01-18 Texas Instruments Incorporated Multi-state test structures and methods
CA2407766C (en) * 2000-11-22 2010-06-29 Ecole De Technologie Superieure Vddq integrated circuit testing system and method
JP2002181893A (ja) * 2000-12-11 2002-06-26 Mitsubishi Electric Corp 半導体装置の検査方法および検査装置
US6677774B2 (en) * 2001-06-26 2004-01-13 International Business Machines Corporation Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester
JP4041663B2 (ja) * 2001-09-12 2008-01-30 株式会社ルネサステクノロジ 半導体装置及びその検査装置
DE10146177C2 (de) * 2001-09-19 2003-12-11 Infineon Technologies Ag Wafer mit zusätzlichen Schaltungsteilen im Kerfbereich zum Testen von integrierten Schaltungen auf dem Wafer
US7076699B1 (en) 2001-09-19 2006-07-11 Lsi Logic Corporation Method for testing semiconductor devices having built-in self repair (BISR) memory
TW546804B (en) * 2001-11-16 2003-08-11 Advanced Semiconductor Eng Electric testing method for bumps
US6623992B1 (en) * 2002-03-08 2003-09-23 Lsi Logic Corporation System and method for determining a subthreshold leakage test limit of an integrated circuit
JP4373111B2 (ja) * 2002-03-14 2009-11-25 パナソニック株式会社 テスト回路
US7089473B2 (en) * 2002-03-29 2006-08-08 Intel Corporation Method and apparatus for testing a circuit using a die frame logic analyzer
KR100466984B1 (ko) * 2002-05-15 2005-01-24 삼성전자주식회사 테스트 소자 그룹 회로를 포함하는 집적 회로 칩 및 그것의 테스트 방법
EP1403767A1 (en) * 2002-09-26 2004-03-31 Hewlett-Packard Company Method and apparatus for dynamically varying the processor performance
US6980116B2 (en) * 2002-12-20 2005-12-27 Motorola, Inc. Method for failure detection in a radio frequency device
WO2004077638A1 (en) * 2003-02-20 2004-09-10 International Business Machines Coporation Testing using independently controllable voltage islands
JP3986989B2 (ja) 2003-03-27 2007-10-03 松下電器産業株式会社 半導体装置
KR20060019552A (ko) * 2003-05-22 2006-03-03 테세다 코포레이션 반도체 집적회로 테스트용 테스터 구조
US7289659B2 (en) * 2003-06-20 2007-10-30 International Business Machines Corporation Method and apparatus for manufacturing diamond shaped chips
US6930500B2 (en) * 2003-08-01 2005-08-16 Board Of Supervisors Of Louisiana State University And Agricultural And Mechanical College IDDQ testing of CMOS mixed-signal integrated circuits
EP1685417B1 (en) * 2003-11-05 2009-08-05 International Business Machines Corporation Hot switchable voltage bus for iddq current measurements
DE102004014644A1 (de) * 2004-03-25 2005-10-13 Atmel Germany Gmbh Integrierter Schaltkreis
US7437641B1 (en) * 2004-04-01 2008-10-14 Pmc-Sierra, Inc. Systems and methods for signature circuits
JP2005302809A (ja) * 2004-04-07 2005-10-27 Toshiba Corp 半導体装置
US7239163B1 (en) * 2004-06-23 2007-07-03 Ridgetop Group, Inc. Die-level process monitor and method
DE102004060369A1 (de) 2004-12-15 2006-06-29 Infineon Technologies Ag Halbleiterscheibe mit Teststruktur
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US7392338B2 (en) 2006-07-31 2008-06-24 Metaram, Inc. Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US7590796B2 (en) 2006-07-31 2009-09-15 Metaram, Inc. System and method for power management in memory systems
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US8169233B2 (en) 2009-06-09 2012-05-01 Google Inc. Programming of DIMM termination resistance values
US7495254B2 (en) * 2005-08-30 2009-02-24 International Business Machines Corporation Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices
GB2444663B (en) 2005-09-02 2011-12-07 Metaram Inc Methods and apparatus of stacking drams
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
JP2007287770A (ja) * 2006-04-13 2007-11-01 Matsushita Electric Ind Co Ltd 半導体集積回路
US7382149B2 (en) * 2006-07-24 2008-06-03 International Business Machines Corporation System for acquiring device parameters
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US20080088325A1 (en) * 2006-09-01 2008-04-17 Murray David W Method and system for performing embedded diagnostic application at subassembly and component level
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
US7733109B2 (en) * 2007-10-15 2010-06-08 International Business Machines Corporation Test structure for resistive open detection using voltage contrast inspection and related methods
CN101452042B (zh) * 2007-11-30 2011-06-15 中芯国际集成电路制造(上海)有限公司 场效应管负温度不稳定性的晶片级可靠性平行测试方法
US7719299B2 (en) * 2008-04-02 2010-05-18 Texas Instruments Incorporated Process and temperature insensitive flicker noise monitor circuit
JP5454994B2 (ja) * 2008-04-07 2014-03-26 ピーエスフォー ルクスコ エスエイアールエル 半導体集積回路ウエハ、半導体集積回路チップ及び半導体集積回路ウエハのテスト方法
JP5269896B2 (ja) * 2008-06-02 2013-08-21 株式会社アドバンテスト 試験用ウエハユニット、および、試験システム
WO2010007472A1 (en) * 2008-07-17 2010-01-21 Freescale Semiconductor, Inc. An integrated circuit die, an integrated circuit package and a method for connecting an integrated circuit die to an external device
US20110050273A1 (en) * 2009-08-25 2011-03-03 Ssu-Pin Ma Fast testable wafer and wafer test method
CN102097287B (zh) * 2009-12-15 2012-07-25 北大方正集团有限公司 一种监控芯片沟槽深度的方法及晶圆
US8587288B2 (en) 2010-06-25 2013-11-19 International Business Machines Corporation Digital interface for fast, inline, statistical characterization of process, MOS device and circuit variations
WO2012125719A2 (en) 2011-03-14 2012-09-20 Rambus Inc. Methods and apparatus for testing inaccessible interface circuits in a semiconductor device
CN102967821A (zh) * 2012-12-14 2013-03-13 上海华岭集成电路技术股份有限公司 使用测试机数字通道作为芯片电源的系统及方法
CN103064005A (zh) * 2012-12-21 2013-04-24 上海宏力半导体制造有限公司 低功耗芯片的性能测试方法
US9331059B2 (en) * 2013-12-10 2016-05-03 Infineon Technologies Ag Chip, chip package and die
CN105092995B (zh) * 2014-04-30 2017-11-14 中芯国际集成电路制造(北京)有限公司 芯片中静态电流失效器件的检测方法和装置
CN105092930B (zh) * 2014-05-06 2020-10-30 恩智浦美国有限公司 片上电流测试电路
CN105242191A (zh) * 2015-09-01 2016-01-13 北京华大信安科技有限公司 一种防止soc芯片测试模式反向激活的方法及装置
KR102593109B1 (ko) * 2015-09-23 2023-10-26 삼성전자주식회사 반도체 소자 형성 방법, 그의 구조
US10002829B2 (en) * 2015-11-30 2018-06-19 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
US10156609B2 (en) * 2016-12-13 2018-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Device and method for robustness verification
CN111081677A (zh) * 2018-10-19 2020-04-28 长鑫存储技术有限公司 半导体器件及其制造方法和测试方法
US11251139B2 (en) * 2019-01-22 2022-02-15 X-Celeprint Limited Secure integrated-circuit systems
US11322460B2 (en) * 2019-01-22 2022-05-03 X-Celeprint Limited Secure integrated-circuit systems

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
US5279975A (en) * 1992-02-07 1994-01-18 Micron Technology, Inc. Method of testing individual dies on semiconductor wafers prior to singulation
US5442282A (en) * 1992-07-02 1995-08-15 Lsi Logic Corporation Testing and exercising individual, unsingulated dies on a wafer
US5389556A (en) * 1992-07-02 1995-02-14 Lsi Logic Corporation Individually powering-up unsingulated dies on a wafer
JPH06230086A (ja) * 1992-09-22 1994-08-19 Nec Corp Ｌｓｉのテスト回路
DE4305288A1 (de) * 1993-02-20 1994-08-25 Bosch Gmbh Robert Selbsttestverfahren für nicht-reguläre CMOS-Schaltstrukturen mit hoher Defekterfassung

Also Published As

Publication number Publication date
JPH10223716A (ja) 1998-08-21
CN1190255A (zh) 1998-08-12
EP0856794A1 (en) 1998-08-05
US5929650A (en) 1999-07-27
KR19980071048A (ko) 1998-10-26
SG78283A1 (en) 2001-02-20

Similar Documents

Publication Publication Date Title
TW358997B (en) Method and apparatus for performing operative testing on an IC
EP0699912A3 (en) Apparatus, method and semiconductor wafer used for testing integrated circuits on a product wafer
GB9925586D0 (en) Programmable JTAG network architecture to support proprietary debug protocol
TW332259B (en) System for detecting troubles in a CMOS integrated circuit
TW333678B (en) Method and apparatus for testing a semiconductor wafer
ATE296463T1 (de) Vorrichtung zum parallelen prüfen von halbleiterschaltkreisen
EP0841571A3 (en) Wafer level burn-in base unit substrate and assembly
DE69019402D1 (de) Prüfverfahren und -gerät für integrierte Schaltungen.
MY123280A (en) Method and apparatus for securely holding a substrate during dicing.
EP0841568A3 (en) A method of wafer level burn-in
MY112147A (en) Process and apparatus for etching semiconductor wafers
ATE262195T1 (de) Vorrichtung und verfahren zur fernen datenrückgewinnung
EP0841695A3 (en) High planarity, low CTE base and method of making the same
EP0614089A3 (en) Method and device for in-situ testing of clips with integrated circuits.
GB2382663A (en) System and method for testing integrated circuit devices
EP0817057A3 (en) Method and apparatus for efficient self testing of on-chip memory
TW200741212A (en) Probe card covering system and method for testing integrated circuits
EP0747717A3 (en) Method and device for testing an integrated circuit device
AU8406598A (en) Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die
TW350114B (en) Method and apparatus for semiconductor device optimization using on-chip verification
MY114471A (en) Ic testing method and apparatus
AU7736396A (en) Method and apparatus for use in iddq integrated circuit testing
TW334607B (en) Method for high speed testing a semiconductor device
MY135660A (en) A modular integrated circuit chip carrier
NO961303L (no) Fremgangsmåte og anordning for å teste en integrert krets

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees