TW325599B - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
TW325599B
TW325599B TW085110421A TW85110421A TW325599B TW 325599 B TW325599 B TW 325599B TW 085110421 A TW085110421 A TW 085110421A TW 85110421 A TW85110421 A TW 85110421A TW 325599 B TW325599 B TW 325599B
Authority
TW
Taiwan
Prior art keywords
conductive
type mos
mos transistor
gate
integrated circuit
Prior art date
Application number
TW085110421A
Other languages
English (en)
Inventor
Tadahiro Kuroda
Tetsuya Fujita
Original Assignee
Toshiba Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Co Ltd filed Critical Toshiba Co Ltd
Application granted granted Critical
Publication of TW325599B publication Critical patent/TW325599B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/09—Resistor-transistor logic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
TW085110421A 1995-09-01 1996-08-27 Semiconductor integrated circuit device TW325599B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22557695 1995-09-01

Publications (1)

Publication Number Publication Date
TW325599B true TW325599B (en) 1998-01-21

Family

ID=16831481

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085110421A TW325599B (en) 1995-09-01 1996-08-27 Semiconductor integrated circuit device

Country Status (3)

Country Link
US (1) US5834967A (zh)
KR (1) KR100223120B1 (zh)
TW (1) TW325599B (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6262585B1 (en) * 1999-06-14 2001-07-17 Intel Corporation Apparatus for I/O leakage self-test in an integrated circuit
GB2387445A (en) * 2002-04-10 2003-10-15 Zarlink Semiconductor Ltd Measuring junction leakage in a semiconductor device
JP4303930B2 (ja) * 2002-09-11 2009-07-29 Ｏｋｉセミコンダクタ株式会社 電圧発生装置
US7132874B2 (en) * 2003-04-23 2006-11-07 The Regents Of The University Of Michigan Linearizing apparatus and method
JP4221274B2 (ja) * 2003-10-31 2009-02-12 株式会社東芝 半導体集積回路および電源電圧・基板バイアス制御回路
US7019508B2 (en) * 2004-06-24 2006-03-28 Anadigics Inc. Temperature compensated bias network
US7173406B2 (en) * 2004-06-24 2007-02-06 Anadigics, Inc. Method and apparatus for gain control
US7023233B1 (en) * 2004-10-12 2006-04-04 Advantest Corporation Test apparatus and test method
JP4337709B2 (ja) * 2004-11-01 2009-09-30 日本電気株式会社 半導体集積回路装置
US7253678B2 (en) * 2005-03-07 2007-08-07 Analog Devices, Inc. Accurate cascode bias networks
JP4764086B2 (ja) * 2005-07-27 2011-08-31 パナソニック株式会社 半導体集積回路装置
JP4814705B2 (ja) * 2005-10-13 2011-11-16 パナソニック株式会社 半導体集積回路装置及び電子装置
US7692442B2 (en) * 2005-11-17 2010-04-06 Taiwan Semiconductor Manufacturing Co., Ltd. Apparatus for detecting a current and temperature for an integrated circuit
US7573306B2 (en) * 2006-01-31 2009-08-11 Kabushiki Kaisha Toshiba Semiconductor memory device, power supply detector and semiconductor device
JP5529450B2 (ja) * 2009-07-15 2014-06-25 スパンション エルエルシー ボディバイアス制御回路及びボディバイアス制御方法
KR20160001948A (ko) * 2014-06-30 2016-01-07 에스케이하이닉스 주식회사 반도체 장치 및 이를 포함하는 반도체 시스템
CN104993574B (zh) * 2015-07-06 2017-06-06 上海巨微集成电路有限公司 一种适用于otp存储器的电源切换电路
CN108318727B (zh) * 2017-01-18 2020-11-27 中芯国际集成电路制造(上海)有限公司 一种标准单元漏电流的测试电路及测试方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4686449A (en) * 1986-04-07 1987-08-11 The United States Of America As Represented By The Secretary Of The Navy JFET current source with high power supply rejection
US5260646A (en) * 1991-12-23 1993-11-09 Micron Technology, Inc. Low power regulator for a voltage generator circuit
JPH06223568A (ja) * 1993-01-29 1994-08-12 Mitsubishi Electric Corp 中間電位発生装置
US5384739A (en) * 1993-06-10 1995-01-24 Micron Semiconductor, Inc. Summing circuit with biased inputs and an unbiased output
US5530395A (en) * 1995-04-03 1996-06-25 Etron Technology Inc. Supply voltage level control using reference voltage generator and comparator circuits

Also Published As

Publication number Publication date
KR970018596A (ko) 1997-04-30
KR100223120B1 (ko) 1999-10-15
US5834967A (en) 1998-11-10

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees