TW317029B - - Google Patents
Download PDFInfo
- Publication number
- TW317029B TW317029B TW085115939A TW85115939A TW317029B TW 317029 B TW317029 B TW 317029B TW 085115939 A TW085115939 A TW 085115939A TW 85115939 A TW85115939 A TW 85115939A TW 317029 B TW317029 B TW 317029B
- Authority
- TW
- Taiwan
- Prior art keywords
- gate
- source
- drain
- mos transistor
- signal
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims description 54
- 239000013078 crystal Substances 0.000 claims description 13
- 230000002079 cooperative effect Effects 0.000 claims description 11
- 238000011161 development Methods 0.000 claims description 4
- 238000012856 packing Methods 0.000 claims description 2
- 235000012054 meals Nutrition 0.000 claims 2
- 238000004321 preservation Methods 0.000 claims 2
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 1
- 101100027969 Caenorhabditis elegans old-1 gene Proteins 0.000 claims 1
- 241000233866 Fungi Species 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 12
- 238000012545 processing Methods 0.000 description 11
- 239000000872 buffer Substances 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 8
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 5
- 230000006378 damage Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- HCUOEKSZWPGJIM-IYNMRSRQSA-N (e,2z)-2-hydroxyimino-6-methoxy-4-methyl-5-nitrohex-3-enamide Chemical compound COCC([N+]([O-])=O)\C(C)=C\C(=N\O)\C(N)=O HCUOEKSZWPGJIM-IYNMRSRQSA-N 0.000 description 2
- 101150110971 CIN7 gene Proteins 0.000 description 2
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 2
- 101150110298 INV1 gene Proteins 0.000 description 2
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 2
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33886995 | 1995-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW317029B true TW317029B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1997-10-01 |
Family
ID=18322165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW085115939A TW317029B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1995-12-26 | 1996-12-24 |
Country Status (5)
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6144221A (en) * | 1998-07-02 | 2000-11-07 | Seiko Epson Corporation | Voltage tolerant interface circuit |
| US6545506B1 (en) * | 1999-03-12 | 2003-04-08 | Silable, Inc. | CMOS output driver that can tolerant a high input voltage |
| US6313661B1 (en) * | 2000-03-31 | 2001-11-06 | Intel Corporation | High voltage tolerant I/O buffer |
| US6882188B1 (en) * | 2003-09-30 | 2005-04-19 | Faraday Technology Corp. | Input/output buffer |
| US7046493B2 (en) * | 2003-12-12 | 2006-05-16 | Faraday Technology Corp. | Input/output buffer protection circuit |
| JP4568096B2 (ja) * | 2004-11-25 | 2010-10-27 | Ｏｋｉセミコンダクタ株式会社 | 入出力回路 |
| US7521975B2 (en) * | 2005-01-20 | 2009-04-21 | Advanced Micro Devices, Inc. | Output buffer with slew rate control utilizing an inverse process dependent current reference |
| KR20100116253A (ko) * | 2009-04-22 | 2010-11-01 | 삼성전자주식회사 | 입출력 회로 및 이를 포함하는 집적회로 장치 |
| US8044684B1 (en) | 2010-04-15 | 2011-10-25 | Stmicroelectronics Pvt. Ltd. | Input and output buffer including a dynamic driver reference generator |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01161916A (ja) * | 1987-12-18 | 1989-06-26 | Toshiba Corp | 半導体集積回路 |
| US5151619A (en) * | 1990-10-11 | 1992-09-29 | International Business Machines Corporation | Cmos off chip driver circuit |
| US5227673A (en) * | 1990-11-13 | 1993-07-13 | Vlsi Technology, Inc. | Differential output buffer with feedback |
| US5144165A (en) * | 1990-12-14 | 1992-09-01 | International Business Machines Corporation | CMOS off-chip driver circuits |
| JP2623374B2 (ja) * | 1991-02-07 | 1997-06-25 | ローム株式会社 | 出力回路 |
| US5276364A (en) * | 1991-12-13 | 1994-01-04 | Texas Instruments Incorporated | BiCMOS bus interface output driver compatible with a mixed voltage system environment |
| JPH05167427A (ja) * | 1991-12-13 | 1993-07-02 | Toshiba Corp | レベルシフト回路 |
| US5266849A (en) * | 1992-02-19 | 1993-11-30 | Hal Computer Systems, Inc. | Tri state buffer circuit for dual power system |
| US5300828A (en) * | 1992-08-31 | 1994-04-05 | Sgs-Thomson Microelectronics, Inc. | Slew rate limited output buffer with bypass circuitry |
| US5338978A (en) * | 1993-02-10 | 1994-08-16 | National Semiconductor Corporation | Full swing power down buffer circuit with multiple power supply isolation |
| US5387826A (en) * | 1993-02-10 | 1995-02-07 | National Semiconductor Corporation | Overvoltage protection against charge leakage in an output driver |
| US5381061A (en) * | 1993-03-02 | 1995-01-10 | National Semiconductor Corporation | Overvoltage tolerant output buffer circuit |
| JP2888722B2 (ja) * | 1993-04-12 | 1999-05-10 | 株式会社東芝 | インターフェース回路 |
| US5406140A (en) * | 1993-06-07 | 1995-04-11 | National Semiconductor Corporation | Voltage translation and overvoltage protection |
| US5381062A (en) * | 1993-10-28 | 1995-01-10 | At&T Corp. | Multi-voltage compatible bidirectional buffer |
| JP3311133B2 (ja) * | 1994-02-16 | 2002-08-05 | 株式会社東芝 | 出力回路 |
| US5467031A (en) * | 1994-09-22 | 1995-11-14 | Lsi Logic Corporation | 3.3 volt CMOS tri-state driver circuit capable of driving common 5 volt line |
| US5444397A (en) * | 1994-10-05 | 1995-08-22 | Pericom Semiconductor Corp. | All-CMOS high-impedance output buffer for a bus driven by multiple power-supply voltages |
| US5721508A (en) * | 1996-01-24 | 1998-02-24 | Cypress Semiconductor Corporation | 5 Volt tolerant 3.3 volt output buffer |
-
1996
- 1996-11-15 DE DE69621576T patent/DE69621576T2/de not_active Expired - Fee Related
- 1996-11-15 EP EP96118387A patent/EP0782269B1/en not_active Expired - Lifetime
- 1996-11-27 US US08/757,562 patent/US6084431A/en not_active Expired - Fee Related
- 1996-12-24 TW TW085115939A patent/TW317029B/zh active
- 1996-12-24 KR KR1019960071473A patent/KR100300687B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0782269A2 (en) | 1997-07-02 |
| EP0782269B1 (en) | 2002-06-05 |
| DE69621576T2 (de) | 2002-12-19 |
| KR100300687B1 (ko) | 2001-11-30 |
| DE69621576D1 (de) | 2002-07-11 |
| US6084431A (en) | 2000-07-04 |
| KR970051174A (ko) | 1997-07-29 |
| EP0782269A3 (en) | 1998-01-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW448620B (en) | Level adjusting circuit and the data output circuit thereof | |
| JP3152867B2 (ja) | レベルシフト半導体装置 | |
| US4477737A (en) | Voltage generator circuit having compensation for process and temperature variation | |
| US7554379B2 (en) | High-speed, low-power level shifter for mixed signal-level environments | |
| US7696805B2 (en) | Level shifter circuit incorporating transistor snap-back protection | |
| TW402841B (en) | Complementary MOS semiconductor circuit | |
| JP4981816B2 (ja) | 酸化物薄膜電界効果トランジスタを使用したデジタル出力ドライバおよび入力バッファー | |
| TW401657B (en) | Input circuit, output circuit and input/output circuit | |
| JP5285773B2 (ja) | 入出力回路 | |
| US20080238522A1 (en) | Method for incorporating transistor snap-back protection in a level shifter circuit | |
| EP2132873A2 (en) | Level shifter circuit incorporating transistor snap-back protection | |
| US5973530A (en) | Low power, high voltage-tolerant bus holder circuit in low voltage technology | |
| TW317029B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| TW501343B (en) | Level-shifter for extremely low power supply | |
| TW392107B (en) | Self-resetting dynamic logic circuits and method for resetting the circuits | |
| TWI376096B (en) | Pad circuit for the programming and i/o operations | |
| WO2006033638A1 (en) | A digital voltage level shifter | |
| JP3556533B2 (ja) | レベルシフタ回路 | |
| TW517346B (en) | Level shift circuit | |
| EP1360765A2 (en) | Buffers with reduced voltage input/output signals | |
| TW313702B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| TW306055B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| TW392359B (en) | Bi-directional buffer with different voltage interfaces by using active pull-up or latch circuit | |
| TW498617B (en) | Fast switching input buffer | |
| JP2985673B2 (ja) | 遅延回路 |