TW262584B - - Google Patents
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- TW262584B TW262584B TW084101628A TW84101628A TW262584B TW 262584 B TW262584 B TW 262584B TW 084101628 A TW084101628 A TW 084101628A TW 84101628 A TW84101628 A TW 84101628A TW 262584 B TW262584 B TW 262584B
- Authority
- TW
- Taiwan
- Prior art keywords
- drain
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- Prior art date
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- 239000001301 oxygen Substances 0.000 claims description 25
- 229910052760 oxygen Inorganic materials 0.000 claims description 25
- 230000000694 effects Effects 0.000 claims description 24
- 230000003068 static effect Effects 0.000 claims description 22
- 239000013078 crystal Substances 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 16
- 230000001066 destructive effect Effects 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 12
- 230000005611 electricity Effects 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 238000000926 separation method Methods 0.000 claims description 7
- 239000007789 gas Substances 0.000 claims description 5
- 230000008901 benefit Effects 0.000 claims description 4
- 150000002500 ions Chemical class 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 3
- 230000002441 reversible effect Effects 0.000 claims description 3
- 230000009471 action Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 claims 7
- 238000009434 installation Methods 0.000 claims 6
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 3
- 230000000903 blocking effect Effects 0.000 claims 1
- 239000013256 coordination polymer Substances 0.000 claims 1
- 238000005474 detonation Methods 0.000 claims 1
- 238000002309 gasification Methods 0.000 claims 1
- 230000010354 integration Effects 0.000 claims 1
- 238000012423 maintenance Methods 0.000 claims 1
- 239000002344 surface layer Substances 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 229910021332 silicide Inorganic materials 0.000 description 40
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical group [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 39
- 125000006850 spacer group Chemical group 0.000 description 23
- 230000000873 masking effect Effects 0.000 description 15
- 238000005530 etching Methods 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 12
- 238000000034 method Methods 0.000 description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 230000000306 recurrent effect Effects 0.000 description 3
- 230000002829 reductive effect Effects 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 2
- 210000000941 bile Anatomy 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 241001523681 Dendrobium Species 0.000 description 1
- 241000196324 Embryophyta Species 0.000 description 1
- 235000005206 Hibiscus Nutrition 0.000 description 1
- 235000007185 Hibiscus lunariifolius Nutrition 0.000 description 1
- 241001075721 Hibiscus trionum Species 0.000 description 1
- 241000283973 Oryctolagus cuniculus Species 0.000 description 1
- 239000006096 absorbing agent Substances 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000037237 body shape Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002079 cooperative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 235000015110 jellies Nutrition 0.000 description 1
- 239000008274 jelly Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 125000000864 peroxy group Chemical group O(O*)* 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000011514 reflex Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000010187 selection method Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000010257 thawing Methods 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US18071694A | 1994-01-12 | 1994-01-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW262584B true TW262584B (de) | 1995-11-11 |
Family
ID=22661485
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW084101628A TW262584B (de) | 1994-01-12 | 1995-02-22 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5493142A (de) |
| EP (1) | EP0739542B1 (de) |
| JP (1) | JPH09507723A (de) |
| KR (1) | KR100320354B1 (de) |
| CN (1) | CN1047027C (de) |
| DE (1) | DE69526569T2 (de) |
| TW (1) | TW262584B (de) |
| WO (1) | WO1995019646A1 (de) |
Families Citing this family (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5374565A (en) * | 1993-10-22 | 1994-12-20 | United Microelectronics Corporation | Method for ESD protection improvement |
| US5675168A (en) * | 1994-04-01 | 1997-10-07 | Matsushita Electric Industrial Co., Ltd. | Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device |
| JPH0951078A (ja) * | 1995-05-29 | 1997-02-18 | Mitsubishi Electric Corp | 半導体記憶装置および半導体装置 |
| KR100402672B1 (ko) * | 1995-10-31 | 2004-06-04 | 텍사스 인스트루먼츠 인코포레이티드 | CMOS/BiCMOS기술에서ESD방지를위한집적화된횡형구조 |
| US5869869A (en) * | 1996-01-31 | 1999-02-09 | Lsi Logic Corporation | Microelectronic device with thin film electrostatic discharge protection structure |
| US6071768A (en) * | 1996-05-17 | 2000-06-06 | Texas Instruments Incorporated | Method of making an efficient NPN turn-on in a high voltage DENMOS transistor for ESD protection |
| JPH1070266A (ja) * | 1996-08-26 | 1998-03-10 | Nec Corp | 半導体装置およびその製造方法 |
| US5953601A (en) * | 1998-02-17 | 1999-09-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | ESD implantation scheme for 0.35 μm 3.3V 70A gate oxide process |
| US6171891B1 (en) | 1998-02-27 | 2001-01-09 | Taiwan Semiconductor Manufacturing Company | Method of manufacture of CMOS device using additional implant regions to enhance ESD performance |
| FR2779574B1 (fr) * | 1998-06-03 | 2003-01-31 | Sgs Thomson Microelectronics | Procede de fabrication de transistors haute et basse tension |
| TW399337B (en) | 1998-06-09 | 2000-07-21 | Koninkl Philips Electronics Nv | Semiconductor device |
| US6100125A (en) * | 1998-09-25 | 2000-08-08 | Fairchild Semiconductor Corp. | LDD structure for ESD protection and method of fabrication |
| JP4589468B2 (ja) * | 1998-11-06 | 2010-12-01 | セイコーエプソン株式会社 | Ｍｏｓトランジスタの製造方法およびｍｏｓトランジスタ |
| US6268639B1 (en) | 1999-02-11 | 2001-07-31 | Xilinx, Inc. | Electrostatic-discharge protection circuit |
| TW409392B (en) * | 1999-05-10 | 2000-10-21 | United Microelectronics Corp | Fabrication method of improving the electrostatic discharge ability of the device and increasing the gain of connected bipolar transistor |
| US6285062B1 (en) * | 1999-05-12 | 2001-09-04 | Micron Technology, Inc. | Adjustable high-trigger-voltage electrostatic discharge protection device |
| US6646324B1 (en) * | 2000-06-30 | 2003-11-11 | Intel Corporation | Method and apparatus for a linearized output driver and terminator |
| US6444404B1 (en) | 2000-08-09 | 2002-09-03 | Taiwan Semiconductor Manufacturing Company | Method of fabricating ESD protection device by using the same photolithographic mask for both the ESD implantation and the silicide blocking regions |
| US6704180B2 (en) | 2002-04-25 | 2004-03-09 | Medtronic, Inc. | Low input capacitance electrostatic discharge protection circuit utilizing feedback |
| US8089129B2 (en) * | 2002-08-14 | 2012-01-03 | Advanced Analogic Technologies, Inc. | Isolated CMOS transistors |
| US7825488B2 (en) | 2006-05-31 | 2010-11-02 | Advanced Analogic Technologies, Inc. | Isolation structures for integrated circuits and modular methods of forming the same |
| JP2004111746A (ja) * | 2002-09-19 | 2004-04-08 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP3808026B2 (ja) * | 2002-10-23 | 2006-08-09 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP2005109389A (ja) * | 2003-10-02 | 2005-04-21 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| US7508038B1 (en) | 2005-04-29 | 2009-03-24 | Zilog, Inc. | ESD protection transistor |
| US7646063B1 (en) | 2005-06-15 | 2010-01-12 | Pmc-Sierra, Inc. | Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions |
| JP4711061B2 (ja) | 2005-09-13 | 2011-06-29 | セイコーエプソン株式会社 | 半導体装置 |
| US7385263B2 (en) * | 2006-05-02 | 2008-06-10 | Atmel Corporation | Low resistance integrated MOS structure |
| TWI339886B (en) * | 2006-09-14 | 2011-04-01 | Novatek Microelectronics Corp | Layout structure of electrostatic discharge protection circuit and production method thereof |
| JP5217180B2 (ja) * | 2007-02-20 | 2013-06-19 | 富士通セミコンダクター株式会社 | 静電放電保護装置の製造方法 |
| JP2007194656A (ja) * | 2007-03-16 | 2007-08-02 | Seiko Epson Corp | Ｍｏｓトランジスタの製造方法およびｍｏｓトランジスタ |
| KR100976793B1 (ko) * | 2007-12-31 | 2010-08-20 | 주식회사 동부하이텍 | 모스 트랜지스터의 제조 방법 |
| US8354710B2 (en) * | 2008-08-08 | 2013-01-15 | Infineon Technologies Ag | Field-effect device and manufacturing method thereof |
| KR101051684B1 (ko) * | 2008-12-02 | 2011-07-25 | 매그나칩 반도체 유한회사 | 정전기 방전 보호소자 및 그 제조방법 |
| JP5202473B2 (ja) * | 2009-08-18 | 2013-06-05 | シャープ株式会社 | 半導体装置の製造方法 |
| CN101807605B (zh) * | 2010-02-05 | 2015-05-06 | 上海华虹宏力半导体制造有限公司 | 一种半导体器件及其制造方法 |
| GB2540904B (en) * | 2010-10-08 | 2017-05-24 | Dnae Group Holdings Ltd | Electrostatic discharge protection |
| US8536648B2 (en) | 2011-02-03 | 2013-09-17 | Infineon Technologies Ag | Drain extended field effect transistors and methods of formation thereof |
| JP5705593B2 (ja) * | 2011-03-08 | 2015-04-22 | セイコーインスツル株式会社 | 半導体装置および半導体装置の製造方法 |
| US8643111B1 (en) * | 2012-08-22 | 2014-02-04 | Vanguard International Semiconductor Corporation | Electrostatic discharge (ESD) protection device |
| US9177924B2 (en) | 2013-12-18 | 2015-11-03 | Taiwan Semiconductor Manufacturing Company Limited | Vertical nanowire transistor for input/output structure |
| US20240154406A1 (en) * | 2022-11-08 | 2024-05-09 | Qualcomm Incorporated | Symmetric radio frequency (rf) electrostatic discharge (esd) dissipation switch |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5276346A (en) * | 1983-12-26 | 1994-01-04 | Hitachi, Ltd. | Semiconductor integrated circuit device having protective/output elements and internal circuits |
| US4692781B2 (en) * | 1984-06-06 | 1998-01-20 | Texas Instruments Inc | Semiconductor device with electrostatic discharge protection |
| JPS62274767A (ja) * | 1986-05-23 | 1987-11-28 | Fujitsu Ltd | 高耐圧半導体装置及びその製造方法 |
| US4855620A (en) * | 1987-11-18 | 1989-08-08 | Texas Instruments Incorporated | Output buffer with improved ESD protection |
| JP2698645B2 (ja) * | 1988-05-25 | 1998-01-19 | 株式会社東芝 | Ｍｏｓｆｅｔ |
| US5248892A (en) * | 1989-03-13 | 1993-09-28 | U.S. Philips Corporation | Semiconductor device provided with a protection circuit |
| US5283449A (en) * | 1990-08-09 | 1994-02-01 | Nec Corporation | Semiconductor integrated circuit device including two types of MOSFETS having source/drain region different in sheet resistance from each other |
| US5208475A (en) * | 1991-01-30 | 1993-05-04 | National Semiconductor Corporation | Electrostatic discharge protection device and a method for simultaneously forming MOS devices with both lightly doped and non lightly doped source and drain regions |
| KR930010124B1 (ko) * | 1991-02-27 | 1993-10-14 | 삼성전자 주식회사 | 반도체 트랜지스터의 제조방법 및 그 구조 |
| US5146298A (en) * | 1991-08-16 | 1992-09-08 | Eklund Klas H | Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor |
-
1995
- 1995-01-12 KR KR1019960701888A patent/KR100320354B1/ko not_active IP Right Cessation
- 1995-01-12 JP JP7519171A patent/JPH09507723A/ja not_active Ceased
- 1995-01-12 DE DE69526569T patent/DE69526569T2/de not_active Expired - Fee Related
- 1995-01-12 CN CN95190969A patent/CN1047027C/zh not_active Expired - Fee Related
- 1995-01-12 EP EP95910093A patent/EP0739542B1/de not_active Expired - Lifetime
- 1995-01-12 WO PCT/US1995/000580 patent/WO1995019646A1/en active IP Right Grant
- 1995-02-22 TW TW084101628A patent/TW262584B/zh not_active IP Right Cessation
- 1995-03-02 US US08/397,584 patent/US5493142A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR960705364A (ko) | 1996-10-09 |
| KR100320354B1 (ko) | 2002-06-24 |
| WO1995019646A1 (en) | 1995-07-20 |
| US5493142A (en) | 1996-02-20 |
| DE69526569D1 (de) | 2002-06-06 |
| CN1136367A (zh) | 1996-11-20 |
| EP0739542A4 (de) | 1997-04-16 |
| EP0739542B1 (de) | 2002-05-02 |
| EP0739542A1 (de) | 1996-10-30 |
| JPH09507723A (ja) | 1997-08-05 |
| CN1047027C (zh) | 1999-12-01 |
| DE69526569T2 (de) | 2002-12-19 |
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