DE69526569T2 - Eingangs-/ausgangs-transistor mit optimierten schutz gegen esd - Google Patents

Eingangs-/ausgangs-transistor mit optimierten schutz gegen esd

Info

Publication number
DE69526569T2
DE69526569T2 DE69526569T DE69526569T DE69526569T2 DE 69526569 T2 DE69526569 T2 DE 69526569T2 DE 69526569 T DE69526569 T DE 69526569T DE 69526569 T DE69526569 T DE 69526569T DE 69526569 T2 DE69526569 T2 DE 69526569T2
Authority
DE
Germany
Prior art keywords
input
protection against
output transistor
against esd
optimized protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69526569T
Other languages
English (en)
Other versions
DE69526569D1 (de
Inventor
A Randazzo
J Larsen
S Gongwer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Application granted granted Critical
Publication of DE69526569D1 publication Critical patent/DE69526569D1/de
Publication of DE69526569T2 publication Critical patent/DE69526569T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69526569T 1994-01-12 1995-01-12 Eingangs-/ausgangs-transistor mit optimierten schutz gegen esd Expired - Fee Related DE69526569T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US18071694A 1994-01-12 1994-01-12
PCT/US1995/000580 WO1995019646A1 (en) 1994-01-12 1995-01-12 Input/output transistors with optimized esd protection

Publications (2)

Publication Number Publication Date
DE69526569D1 DE69526569D1 (de) 2002-06-06
DE69526569T2 true DE69526569T2 (de) 2002-12-19

Family

ID=22661485

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69526569T Expired - Fee Related DE69526569T2 (de) 1994-01-12 1995-01-12 Eingangs-/ausgangs-transistor mit optimierten schutz gegen esd

Country Status (8)

Country Link
US (1) US5493142A (de)
EP (1) EP0739542B1 (de)
JP (1) JPH09507723A (de)
KR (1) KR100320354B1 (de)
CN (1) CN1047027C (de)
DE (1) DE69526569T2 (de)
TW (1) TW262584B (de)
WO (1) WO1995019646A1 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5374565A (en) * 1993-10-22 1994-12-20 United Microelectronics Corporation Method for ESD protection improvement
US5675168A (en) * 1994-04-01 1997-10-07 Matsushita Electric Industrial Co., Ltd. Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device
JPH0951078A (ja) * 1995-05-29 1997-02-18 Mitsubishi Electric Corp 半導体記憶装置および半導体装置
KR100402672B1 (ko) * 1995-10-31 2004-06-04 텍사스 인스트루먼츠 인코포레이티드 CMOS/BiCMOS기술에서ESD방지를위한집적화된횡형구조
US5869869A (en) * 1996-01-31 1999-02-09 Lsi Logic Corporation Microelectronic device with thin film electrostatic discharge protection structure
US6071768A (en) * 1996-05-17 2000-06-06 Texas Instruments Incorporated Method of making an efficient NPN turn-on in a high voltage DENMOS transistor for ESD protection
JPH1070266A (ja) * 1996-08-26 1998-03-10 Nec Corp 半導体装置およびその製造方法
US5953601A (en) * 1998-02-17 1999-09-14 Taiwan Semiconductor Manufacturing Company, Ltd. ESD implantation scheme for 0.35 μm 3.3V 70A gate oxide process
US6171891B1 (en) 1998-02-27 2001-01-09 Taiwan Semiconductor Manufacturing Company Method of manufacture of CMOS device using additional implant regions to enhance ESD performance
FR2779574B1 (fr) * 1998-06-03 2003-01-31 Sgs Thomson Microelectronics Procede de fabrication de transistors haute et basse tension
TW399337B (en) 1998-06-09 2000-07-21 Koninkl Philips Electronics Nv Semiconductor device
US6100125A (en) * 1998-09-25 2000-08-08 Fairchild Semiconductor Corp. LDD structure for ESD protection and method of fabrication
JP4589468B2 (ja) * 1998-11-06 2010-12-01 セイコーエプソン株式会社 Ｍｏｓトランジスタの製造方法およびｍｏｓトランジスタ
US6268639B1 (en) 1999-02-11 2001-07-31 Xilinx, Inc. Electrostatic-discharge protection circuit
TW409392B (en) * 1999-05-10 2000-10-21 United Microelectronics Corp Fabrication method of improving the electrostatic discharge ability of the device and increasing the gain of connected bipolar transistor
US6285062B1 (en) 1999-05-12 2001-09-04 Micron Technology, Inc. Adjustable high-trigger-voltage electrostatic discharge protection device
US6646324B1 (en) * 2000-06-30 2003-11-11 Intel Corporation Method and apparatus for a linearized output driver and terminator
US6444404B1 (en) 2000-08-09 2002-09-03 Taiwan Semiconductor Manufacturing Company Method of fabricating ESD protection device by using the same photolithographic mask for both the ESD implantation and the silicide blocking regions
US6704180B2 (en) 2002-04-25 2004-03-09 Medtronic, Inc. Low input capacitance electrostatic discharge protection circuit utilizing feedback
US8089129B2 (en) * 2002-08-14 2012-01-03 Advanced Analogic Technologies, Inc. Isolated CMOS transistors
US7825488B2 (en) 2006-05-31 2010-11-02 Advanced Analogic Technologies, Inc. Isolation structures for integrated circuits and modular methods of forming the same
JP2004111746A (ja) * 2002-09-19 2004-04-08 Fujitsu Ltd 半導体装置及びその製造方法
JP3808026B2 (ja) * 2002-10-23 2006-08-09 株式会社ルネサステクノロジ 半導体装置
JP2005109389A (ja) * 2003-10-02 2005-04-21 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US7508038B1 (en) 2005-04-29 2009-03-24 Zilog, Inc. ESD protection transistor
US7646063B1 (en) 2005-06-15 2010-01-12 Pmc-Sierra, Inc. Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions
JP4711061B2 (ja) 2005-09-13 2011-06-29 セイコーエプソン株式会社 半導体装置
US7385263B2 (en) * 2006-05-02 2008-06-10 Atmel Corporation Low resistance integrated MOS structure
TWI339886B (en) * 2006-09-14 2011-04-01 Novatek Microelectronics Corp Layout structure of electrostatic discharge protection circuit and production method thereof
JP5217180B2 (ja) 2007-02-20 2013-06-19 富士通セミコンダクター株式会社 静電放電保護装置の製造方法
JP2007194656A (ja) * 2007-03-16 2007-08-02 Seiko Epson Corp Ｍｏｓトランジスタの製造方法およびｍｏｓトランジスタ
KR100976793B1 (ko) * 2007-12-31 2010-08-20 주식회사 동부하이텍 모스 트랜지스터의 제조 방법
US8354710B2 (en) 2008-08-08 2013-01-15 Infineon Technologies Ag Field-effect device and manufacturing method thereof
KR101051684B1 (ko) * 2008-12-02 2011-07-25 매그나칩 반도체 유한회사 정전기 방전 보호소자 및 그 제조방법
JP5202473B2 (ja) * 2009-08-18 2013-06-05 シャープ株式会社 半導体装置の製造方法
CN101807605B (zh) * 2010-02-05 2015-05-06 上海华虹宏力半导体制造有限公司 一种半导体器件及其制造方法
GB2540904B (en) * 2010-10-08 2017-05-24 Dnae Group Holdings Ltd Electrostatic discharge protection
US8536648B2 (en) 2011-02-03 2013-09-17 Infineon Technologies Ag Drain extended field effect transistors and methods of formation thereof
JP5705593B2 (ja) * 2011-03-08 2015-04-22 セイコーインスツル株式会社 半導体装置および半導体装置の製造方法
US8643111B1 (en) * 2012-08-22 2014-02-04 Vanguard International Semiconductor Corporation Electrostatic discharge (ESD) protection device
US9177924B2 (en) 2013-12-18 2015-11-03 Taiwan Semiconductor Manufacturing Company Limited Vertical nanowire transistor for input/output structure
US20240154406A1 (en) * 2022-11-08 2024-05-09 Qualcomm Incorporated Symmetric radio frequency (rf) electrostatic discharge (esd) dissipation switch

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276346A (en) * 1983-12-26 1994-01-04 Hitachi, Ltd. Semiconductor integrated circuit device having protective/output elements and internal circuits
US4692781B2 (en) * 1984-06-06 1998-01-20 Texas Instruments Inc Semiconductor device with electrostatic discharge protection
JPS62274767A (ja) * 1986-05-23 1987-11-28 Fujitsu Ltd 高耐圧半導体装置及びその製造方法
US4855620A (en) * 1987-11-18 1989-08-08 Texas Instruments Incorporated Output buffer with improved ESD protection
JP2698645B2 (ja) * 1988-05-25 1998-01-19 株式会社東芝 Ｍｏｓｆｅｔ
US5248892A (en) * 1989-03-13 1993-09-28 U.S. Philips Corporation Semiconductor device provided with a protection circuit
US5283449A (en) * 1990-08-09 1994-02-01 Nec Corporation Semiconductor integrated circuit device including two types of MOSFETS having source/drain region different in sheet resistance from each other
US5208475A (en) * 1991-01-30 1993-05-04 National Semiconductor Corporation Electrostatic discharge protection device and a method for simultaneously forming MOS devices with both lightly doped and non lightly doped source and drain regions
KR930010124B1 (ko) * 1991-02-27 1993-10-14 삼성전자 주식회사 반도체 트랜지스터의 제조방법 및 그 구조
US5146298A (en) * 1991-08-16 1992-09-08 Eklund Klas H Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor

Also Published As

Publication number Publication date
WO1995019646A1 (en) 1995-07-20
KR960705364A (ko) 1996-10-09
CN1047027C (zh) 1999-12-01
EP0739542A4 (de) 1997-04-16
EP0739542B1 (de) 2002-05-02
JPH09507723A (ja) 1997-08-05
TW262584B (de) 1995-11-11
CN1136367A (zh) 1996-11-20
DE69526569D1 (de) 2002-06-06
US5493142A (en) 1996-02-20
EP0739542A1 (de) 1996-10-30
KR100320354B1 (ko) 2002-06-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee