TW202023835A - 用於接合基板之方法 - Google Patents
用於接合基板之方法 Download PDFInfo
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- TW202023835A TW202023835A TW108132829A TW108132829A TW202023835A TW 202023835 A TW202023835 A TW 202023835A TW 108132829 A TW108132829 A TW 108132829A TW 108132829 A TW108132829 A TW 108132829A TW 202023835 A TW202023835 A TW 202023835A
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Abstract
本發明係關於一種用於接合一第一基板(4)與一第二基板(4’)之方法,其特徵為該第一基板(4)及/或該第二基板(4’)在該接合之前經薄化。
Description
本發明係關於一種根據技術方案1之用於接合之方法。
在半導體產業中,藉由所謂的接合程序使基板永久或臨時地彼此連接。
舉例而言,藉由一接合程序,可將具有不同功能單元之基板(例如,具有記憶體晶片及微控制器之基板)堆疊於彼此頂部上。藉由具有不同性質之多個基板之堆疊及永久附接而獲得具有更複雜性質之一基板堆疊。因此,所產生之基板堆疊具有幾百微米之一厚度。
然而,接合技術亦可用於一基板及/或一基板堆疊之臨時附接。在此情況中,藉由一黏著劑在壓力及/或溫度下將一產品基板附接至一載體基板。在處理產品基板之後,再次自載體基板卸離產品基板。
最先進技術中之最大問題在於多個極薄基板之對準及永久附接。此等薄基板之堆疊產生一基板堆疊,一所謂的「多堆疊」。為避免薄基板之困難及麻煩處理,對具有一定義標準厚度之基板執行對準及接合程序。在將一第二基板接合至一第一基板之後,實行第二基板之背薄化。藉由背薄化程序,由一先前厚基板產生一薄基板。視情況,將另一第三厚基板(其之厚度在另一背部薄化程序中減小)接合於此第二背薄化基板上。因此,可藉由理論上通常可隨意重複之程序產生具有任何功能性之基板堆疊。
一技術問題在於,一永久接合不可逆轉使得在一未對準及/或損壞之情況中,建構至該點之整個基板堆疊無法使用。由多個基板構成之一基板堆疊可值數萬歐元。
因此,本發明係基於指示至少部分(較佳,主要)解決上述問題之一方法之目標。另外,本發明之目標在於使經濟且特定言之儘可能無廢料之一接合生產變成可能。
使用技術方案1之特徵達成此目標。在子技術方案中指示本發明之有利進一步開發方案。在說明書、申請專利範圍及/或圖中指示之特徵之至少兩者之所有組合亦落於本發明之範疇內。在所指示之值範圍中,如處於上述限制內之邊界值之值亦經揭示且可以任何組合主張。
本發明之基本理念係在背離先前實踐之情況下在(特定言之,永久)接合之前背薄化待接合之至少一個且較佳全部基板。
因此,本發明特定言之係關於一種用於接合已薄化基板之方法。在此情況中,本發明較佳係基於將薄化基板(較佳晶圓)附接(且在此狀態中運輸、對準及接合)至一載體(特定言之,一膜,其在一框架上伸展)(基板附件)之理念。因此,基板在運輸及/或對準及/或接合程序期間較佳薄化至其期望厚度。在根據本發明之特殊實施例中,將厚基板附接至載體且僅在對準(較佳)前一刻或接合前一刻背薄化該基板,使得在一特定距離內運輸較厚基板亦係可能的。在下文中,為簡明起見,假定始終薄化基板,除非明確描述另一狀態。
在一較佳實施例中,可將一薄化基板接合至未薄化之一基板或(甚至更較佳)一基板堆疊。為更好地避免含有廢料之基板堆疊,僅可將根據本發明之薄化基板彼此接合。
根據本發明之一有利實施例,將第一基板及/或第二基板薄化為小於1,000μm,特定言之小於500 μm,較佳小於100 μm,更佳小於50 μm,且最佳小於30 μm之一厚度。
在本發明之進一步開發方案中,規定將用於薄化及/或接合之第一基板及/或第二基板附接於具有特定言之一環形框架之一載體之一載體表面上。特定言之,當使用相同載體進行薄化及接合時,可消除載體之一交換,使得薄基板始終具有一支撐,且因此防止(特定言之,在薄化之後)浪費。
有利地,根據本發明之一實施例,規定第一基板及/或第二基板在形狀上較佳完全一致(特定言之,至少相對於在各情況中平行於一接合表面之第一基板及/或第二基板之一橫截表面)及/或具有類似幾何尺寸。特定言之,本發明應用為一晶圓至晶圓(W2W)方法,從而導致處理速度及處理量方面之優勢。
就第一基板與第二基板在基於基板之對應對準標記之接合之前(特定言之)以優於100 μm,較佳優於50 μm,更佳優於1 μm,最佳優於500 nm且極佳優於200 nm之一對準精確度彼此對準且接著經預附接(特定言之,磁性地)而言,可事實上消除對載體彼此對準之影響。
然而,亦將預期,將多個小第二基板(特定言之,規則地)配置於一載體上且特定言之亦背薄化該等小第二基板,以便同時接合至一第一基板。因此,獲得根據本發明之一晶粒至晶圓(D2W)方法,藉此小基板(遵循半導體產業中之命名法)被稱為晶片(英文:die(晶粒)),但其等不必為晶片,即,其等不必具有一電功能性。特定言之,在接合之前根據本發明背薄化小基板。
在根據本發明之一特殊第三實施例中,甚至將多個小基板同時接合至多個小基板將為可能的,此將對應於一晶片至晶片(C2C)方法。特定言之,在接合之前根據本發明背薄化小基板。
在下文中,為簡明起見,僅參考特定言之在形狀上一致且根據本發明進行處置之兩個大基板。
有利地,可直接接合根據本發明之薄化基板。更佳地,在運輸之前及/或對準之前及/或接合之前執行隨後處理步驟之一或多者。
- 研磨,及/或
- 拋光,及/或
- 蝕刻,及/或
- 分離(英文:dicing(切割))
- 清潔
- 塗佈,特定言之藉由
○ 物理方法,特定言之
▪ PVD
○ 化學方法,特定言之
▪ CVD、PE-CVD
- 功能化,特定言之具有電子結構,及/或特定言之
○ 塗漆
○ 微影
○ 壓印
○ 顯影
- 測試。
僅完整(即,在上述步驟之後測試)薄化基板較佳係待接合之一新基板堆疊之部分。可自程序鏈移除具有缺陷之薄化基板(特定言之,功能化薄化基板,其中一主要部分或甚至所有功能單元皆不運作)。因此,大幅減小毀壞整個基板堆疊之可能性。藉由根據本發明之程序,僅在對準及/或接合步驟之後實行基板堆疊之毀壞。然而,亦在最先進技術中使用此兩個步驟,以便產生基板堆疊且因此並不表示接合之後的任何額外程序步驟。
根據本發明,特定言之,提供一種基板附件,其因此經設計以將一薄化基板特定言之附接至基板附件之一載體。基板類型
根據本發明,所有標準類型之基板係合適的,特定言之,晶圓。基板可具有任何形狀,但較佳係圓形。特定言之,在產業上標準化基板之直徑。對於晶圓,產業標準直徑係1英寸、2英寸、3英寸、4英寸、5英寸、6英寸、8英寸、12英寸及18英寸。根據本發明之方法對於處理矩形基板(特定言之,玻璃或藍寶石基板)亦可為尤其有利的。
基板可為半導體基板、金屬基板、陶瓷基板、礦物基板(特定言之藍寶石基板、玻璃基板或聚合物基板)。在陶瓷或礦物基板之情況中,較佳使用藍寶石基板。
根據本發明,經薄化基板之附接或基板堆疊之附接(其等由已彼此對準且彼此接合之多個經薄化基板構建)係可行的。因此,在下文中,基板亦被理解為基板堆疊之一同義詞。基板附接
在本發明之一進一步開發方案中,基板附件係由一框架(英文:frame)及在框架上方伸展以作為一載體之一彈性膜(英文:tape(帶))構成。
該膜形成特定言之黏著性基板附接表面(基板可附接至該表面)。該膜代表一附接元件。該框架形成一載體附接表面(載體附接區域),其特定言之磁性地作用以將基板附件附接至一第二(特定言之,對應之)基板附件。
在一第一較佳實施例中,該等基板附件可因此彼此磁性地附接。因此,該框架較佳係磁性或可磁化。框架之磁通量密度特定言之大於10-5
T,較佳大於10-4
T,更佳大於10-3
T,最佳大於10-1
T且極佳大於1 T。
有利地,由彼此磁性地黏著之兩個框架在基板之接觸表面上所產生之壓力大於10-5
N/m2
,較佳大於10-3
N/m2
,更佳大於1 N/m2
,最佳大於101
N/m2
且極佳大於103
N/m2
。
在根據本發明之一第二實施例中,基板附件(特定言之,來自外側)可經由夾鉗彼此附接。
在根據本發明之一第三實施例中,基板附件可經由一插入系統彼此附接。插入系統較佳經擴展,使得插入元件及凹槽(其等用於接納相對基板附件之插入元件)整體上沿著一周邊交替。
在根據本發明之一第四實施例中,基板附件可彼此靜電地附接。在此情況中,對應板(可將其等引至一電位)經定位沿著基板附件均勻地分佈。該等板較佳藉由剩餘基板附件電絕緣。
在本發明之一進一步開發方案中,基板附件具有一固態基底元件,其具有特定言之可控制附接元件以將基板附接至基底元件之一平坦基板附接表面。另外,可根據本發明之上述實施例將基板附件附接於彼此下方。
在一進一步開發方案中,基板附件可彼此磁性地附接。因此,基底元件在其基板附接表面上特定言之係磁性或可磁化。基底元件之磁通量密度(特定言之,在載體附接區域中)特定言之大於10-5
T,較佳大於10-4
T,更佳大於10-3
T,最佳大於10-1
T,且極佳大於1 T。
有利地,藉由彼此磁性地黏著之兩個基板附件在基板之接觸表面上產生之壓力大於10-5
N/m2
,較佳大於10-3
N/m2
,更佳大於1 N/m2
,最佳大於103
N/m2
,且極佳大於103
N/m2
。
用於兩個相關基底元件、框架及/或基板附件之間的黏著之基底元件、框架及/或基板附件(特定言之,在載體附接表面或一載體附接區域上)之附接(特定言之,磁性)性質較佳獨立於用於附接基板之附接元件之下文提及之附接性質。
根據本發明之一第一實施例,附接元件係至少一黏著性表面。黏著性表面較佳係可電及/或磁性切換的,使得可(特定言之)藉由一控制系統而在高黏著性之一狀態與低黏著性之一狀態之間交替。
在根據本發明之一第二實施例中,附接元件係至基板附接表面之至少一真空附件。真空附件較佳係由穿過載體表面之多個真空饋送線構成。真空饋送線較佳連接至定位於基板附件中或載體中之一真空腔室。
可經由一饋送線密封真空腔室,饋送線可經由一閥(較佳藉由一控制系統)以一流體動態方式與周圍區域分離。因此,根據本發明可藉由施加一真空而將特定言之背薄化基板附接至載體基板且在抽真空程序期間關閉該閥。因此,在真空饋送線及真空腔室中產生一永久負壓。因此,自外部作用之常壓表示相對於載體中之負壓區域之一超壓,且基板因此附接至載體。
在根據本發明之一第三實施例中,附接元件係至少一靜電附件。特定言之,靜電附件係由對準且定向至彼此之多個特殊形成之電極構成,可藉由一電線在其上設定一定義電位。在待附接之一基板之導電區域中,可藉由所產生之電荷分離產生一電荷分離(特定言之,一電感應),此感應導致基板附接表面上之載體與基板之間的一靜電吸引。特定言之,此可藉由一控制系統予以控制。
在根據本發明之一第四實施例中,附接元件係至少一磁性附件。磁性附件較佳係可切換的且與基底元件之(特定言之)永久磁化區分。可切換磁性附件較佳係磁性線圈,其等藉由一電流通量構建一磁場以用於將基板附接至基板附接表面。因此,待附接之基板具有至少部分磁性質。
在根據本發明之一第五實施例之情況中,附接元件係至少一機械附件。特定言之,機械附件係由夾鉗元件構成。夾鉗元件沿著待接合之基板表面附接基板。夾鉗元件可在根據本發明之對準程序期間且甚至在兩個基板朝向彼此移動時亦保持在附接位置中。接著,可在基板接觸前不久、期間或甚至之後移除夾鉗元件。
因此,基板附件較佳具有一基板附接表面及圍繞基板附接表面之一載體附接表面(或載體附接區域)。
基板可在附接至基板附件之前及/或之後背薄化。若基板在附接至基板附件之前背薄化,則基板附件不受污染。然而,必須接著實行一背薄化基板至基板附件之一傳送。若基板在附接至基板附件之後背薄化,則較佳在背部薄化之後清潔基板附件。然而,由於待背薄化之基板之立即附接,將出現穩定性之優勢。另外,根據本發明無需將一背薄化基板傳送至基板附件。程序
根據本發明之程序之一第一實施例,將待藉由根據本發明之一第一附件接合之兩個薄化基板配置成彼此相距一距離,而不使基板之接觸表面首先接觸或臨時連接(預接合)。因此,在各情況中,將基板附接至特定言之基板附件之對應相對基板附接表面。
在一第一程序步驟中,基於基板之對準標記實行兩個基板彼此之一對準。儘管根據本發明之附接至基板附件之基板之對準基於其等之對準標記,但在基板附件未與各自基板相同對準之情況下可導致不完美的根據本發明之基板附件彼此之一對準。舉例而言,可使用來自US 6,214,692 B1、PCT/EP 2013/075831或PCT/EP 2013/062473之附件之一者實行對準。在多個較小基板至一大基板之對準或多個較小基板至多個小基板之對準之情況中,對準程序亦可經受一誤差最小化程序,其中藉由一誤差最小化實行基板附件及因此定位於其上之小基板之最佳對準。在公開案WO2013/182236A1中描述此等程序。
特定言之,當兩個對應基板附件圍繞彼此之法線之一定向角特定言之小於5° (較佳小於1°,更佳小於0.1°,最佳小於0.01°,且極佳小於0.0001°)及/或兩個對應基板附件相對於彼此之一平移位移特定言之小於5 mm (較佳小於1 mm,更佳小於100 μm,最佳小於1 μm,且極佳小於100 nm)時實行進一步處理。可使用一測試系統判定上述值。
在根據本發明之一第二程序步驟中,實行使根據本發明之基板附件朝向彼此移動。在組裝物件之情況中,視情況,可實行基板之對準標記及/或特性特徵對彼此或對其他特徵之一連續控制,使得可在組裝階段期間發生基板位置之一連續檢查。因此,確保在組裝階段期間,未實行兩個基板朝向彼此之位移。在程序步驟結束時,特定言之磁性基板附件(此處,框架)之表面與載體附接表面接觸。使框架彼此附接。較佳經由至少在載體附接表面上之兩個框架之至少一者之(特定言之)固有磁化實行附接。然而,亦可設想藉由一黏著劑(其施加至載體附接表面之至少一者)之附接。另一可設想附接選項係藉由應用於外部上之夾鉗元件之夾鉗。
在根據本發明之一第三程序步驟中,藉由使兩個基板朝向彼此而實行一預接合或接合程序,該等基板附接至載體上之基板附接表面。特定言之,亦可藉由用於組裝物件之構件(特定言之,一中心定向之壓力裝置)(特定言之,藉由一心軸)而自根據本發明之基板附件之反面實行藉由使兩個基板朝向彼此移動之接合程序。在公開案PCT/EP 2011/064353中更詳細描述用於組裝物件之此等構件及特定言之適用於固持基板附件之樣本固持器。
在此實施例中,係藉由載體(特定言之,在框架中伸展之膜)之變形實行物件之組裝。可藉由一中心定向之壓力裝置或藉由背向基板之側上之膜之一滾筒使膜變形。在公開案WO2014037044A1中,描述具有一滾筒之一裝置,在其幫助下可執行一壓印。熟習此項技術者可由公開案WO2014037044A1中之裝置建構一附件,此附件產生根據本發明之基板附件(特定言之,膜)之一對應線形負載且因此起始一對應接觸及/或接合程序。在根據本發明之特殊實施例中,可適當地藉由載體之變形使兩個基板之一者朝向以一尤其平面方式固持之第二基板移動。特定言之,主要可設想一中心負載,其使用一插銷(英文:pin)以起始自動傳播之一接合波。根據本發明之此實施例主要適合於預接合或接合待藉由一融合接合程序彼此連接之基板。
在根據本發明之程序之一第二實施例中,藉由第二上述基板附件將兩個基板彼此附接。
在一第一程序步驟中,基於兩個基板之對準標記實行該等基板彼此之一對準。關於程序之第一實施例之上文備註主要應用於第二實施例。雖然在第一實施例中,可在薄膜因機械及/或熱應力扭曲時發生在基板之附接之後發生之基板相對於框架之一位移,但此事實上在第二實施例之情況中被排除。
類似於第一實施例般實行第二程序步驟,藉此較佳磁性地(特定言之,彼此相距一距離)實行基板附件較佳至一載體附接區域之附接(而非直接藉由在一載體附接表面上接觸)。
若兩個基板已藉由一預接合彼此預附接,則根據本發明可規定在一熱處理之前及/或期間執行一額外全表面接合,以便在兩個基板上施加一額外(特定言之,全表面且均勻)壓力負載。在此情況中,所施加力特定言之大於100 N,較佳大於1 kN,更佳大於10 kN,最佳大於100 kN且極佳大於1,000 kN。藉由以待接合之基板之表面除所施加力而計算壓力。因此,作用於一圓形200 mm基板上之壓力在1 N之一壓力負載下為約3.2 Pa且在10 kN之一壓力負載下為約320,000 Pa。
基板附件可使用一樣本固持器及/或一機器人進行處置且在各種程序及站之間運輸。熱處理
根據本發明之基板附件之所有實施例較佳適合於耐受一熱處理程序(特定言之,用於接合)。然而,第一實施例可受限於載體或基板附件之一最大操作溫度(特定言之,當載體係一膜時)。
基板可經受一熱處理,以便提供一永久連接(永久接合)。永久接合之接合強度特定言之大於1.0 J/m2
,較佳大於1.5 J/m2
,更佳大於2.0 J/m2
,且最佳大於或等於2.5 J/m2
。在此情況中,根據本發明,當基板定位於根據本發明之基板附件上時係有利的。因此,換言之,可在一質量程序(英文:batch process(分批程序))中加熱基板附件。較佳在一連續爐中實行加熱。在一替代實施例之情況中,在由數個模組構成之一叢集之一模組中實行熱處理。根據本發明亦可設想至一熱板之接合。在此一熱處理程序中使用之溫度特定言之小於700°C,較佳小於500°C,更佳小於300°C,最佳小於100°C,且極佳小於50°C。在特殊情況中(其中所附接基板具有特別製備之表面),基板在室溫下接觸時可已彼此緊密接合,使得不再需要一額外熱處理。
若根據本發明之基板附件具有一鐵磁性材料,則較佳不超過居里溫度,以免損失根據本發明之基板附件之磁性質。
然而,在根據本發明之另一實施例中,特定言之,在超過居里溫度之情況下根據本發明之基板附件之鐵磁性之消失可描述根據本發明之另一態樣。若兩個基板之間的永久接合之接合強度僅在高於一特定溫度時達成其最大值,且此溫度至少接近於居里溫度,則可藉由高於居里溫度之另一加熱實行基板附件藉由鐵磁性之損失之一自動分離。有利地,接著,在溫度再次下降至低於居里溫度(此導致鐵磁性之恢復)之前分離根據本發明之基板固持裝置或至少藉由額外分離元件使該等基板固持裝置彼此分離,使得在未能達到居里溫度時,其等至少不再彼此連接或至少可更容易地分離。此等自動分離程序主要在全自動分批程序中係有利的。
根據圖1a之第一實施例涉及由一框架2及在框架2上方伸展之一載體3 (此處,一彈性膜)形成之一基板附件1。亦可設想,伸展載體3係處於無支撐狀態之一十分薄而剛性之板,因此無法被解釋為膜。接著,特定言之,載體3亦可藉由加負載於其載體表面3o而彈性地變形。在其載體表面3o上,基板附件1具有一基板附接表面9 (或基板附接區域)及圍繞基板附接表面9之一(特定言之)環形載體附接表面8 (或載體附接區域)。
框架2及載體3一起形成用於接納一(特定言之)薄化第一基板4之一接納區域,藉此第一基板4背向載體3之一側較佳相對於載體附接表面8後移。
將背薄化第一基板4附接至在框架2上方伸展之載體3 (此處,一彈性膜)之基板附接表面9 (此處,一膜表面)。載體表面3o具有黏著性以用於附接第一基板4且用於將載體3附接至框架2。
在根據圖1b之實施例中,展示一(特定言之)單片基板附件1’。該單片基板附件1’具有含有一載體表面3o’之一剛性載體3’,剛性載體3’具有作為一附接元件5之一真空附件。
附接元件5可具有真空條帶(如展示);然而,代替此,其亦可具有靜電附件、磁性附件、黏著性表面或機械夾鉗。特定言之,在運輸載體3’之情況中,附接元件5亦在廣泛距離內/長時間作用。當使用一真空附接第一基板4時,可藉由關閉一閥6而在一真空腔室及/或真空條內維持真空。在根據本發明之其他附件之情況中,通常可將閥6解釋為經由一控制系統控制之一控制單元。代替此,在一靜電及/或磁性附件之情況中,亦將設想用於電流之一饋送線。
薄化第一基板4之層厚度係小的,使得根據本發明藉由一載體3、3’穩定化第一基板4係有利的,以便避免對第一基板4之損壞。
在上文針對第一基板陳述之事物類似地應用於一第二基板4’或其他基板(若其他基板經相同地設計)。所描述基板附件1、1’之組合亦可用於第二或其他基板。
在下列圖中,基於兩個實例說明根據本發明之程序,藉此在各情況中相同地設計待接合之基板(第一、第二及某一其他基板)及基板附件。根據本發明可設想針對第一基板4及第二基板4’或其他基板使用不同基板附件及/或基板。
圖2a展示一對準程序,其中兩個基板4、4’在各情況中附接至基板附件1之載體3,該等基板附件1配置於相對側上且彼此對準。較佳經由一對準單元(英文:aligner(對準器))(未展示)實行對準。較佳在基板4、4’之基板表面4o、4o’上之對應對準標記之間以此項技術中已知之一方式實行對準。
由於對基板4、4’之對準標記實行對準,故基板附件1可朝向彼此位移。然而,此位移通常係微小的且可以忽略。特定言之,根據本發明之位移小於5 mm,較佳小於1 mm,更佳小於100 μm,最佳小於10 μm,且極佳小於1 μm。在此連接中,決定將對應載體附接區域或載體附接表面8定位成彼此相對,使得用於基板附件1之相互附接之一足構力傳送變得可能。
圖2b展示一接觸程序,其中兩個框架2之表面2o (載體附接表面8)彼此接觸。特定言之,藉由固有磁力(由磁場線7描繪)使兩個框架2彼此直接附接。亦可設想,基板表面4o位於表面2o上方。在此情況中,基板表面4o在表面2o之前接觸。特定言之,表面2o藉由磁力獨立地彼此吸引。
在根據圖2c之程序步驟中,發生兩個基板4、4’之間的一接觸。可藉由在相反方向上將力施加於基板4、4’上之任何元件(特定言之,藉由中心且徑向對稱之壓力元件或藉由滾筒)完成接觸。藉由施加力,彈性載體3在相對載體3之方向上擴展。特定言之,如描繪,可設想使兩個載體3彼此抵靠而變形。若基板表面4o突出於表面2o上方,則在此程序步驟中實行外框架2之一接觸。特定言之,在磁性框架之情況中,藉由其等之磁性吸引獨立地完成接觸。
在圖3a中,類似於圖2a般展示具有根據圖1b之基板附件1’之一對準程序。
在圖3b中,描繪一接觸程序,其中兩個基板4、4’之基板表面4o、4o’在基板附件1’可接觸之前彼此接觸。在此實施例中,因此,基板附件1’在不接觸之情況下操作。因此,特定言之,藉由載體3’之固有磁力附接所形成之基板堆疊。
根據本發明,兩個基板4、4’之至少一者係一薄化基板4、4’。因此,接合程序不再限於使用厚且尺寸穩定之基板。
1:基板附件
1’:基板附件
2:框架
2o:表面
3:載體
3’:載體
3o:載體表面
3o’:載體表面
4:基板
4’:基板
4o:基板表面
4o’:基板表面
5:附接元件(特定言之,真空附件)
6:控制單元(特定言之,閥)
7:磁場線
8:載體附接區域/載體附接表面
9:基板附接表面
自較佳實施例之後續描述且基於圖式產生本發明之進一步優勢、特徵及細節;該等圖式在各情況中以圖解視圖展示:
圖1a係根據本發明之一裝置之一第一實施例之一圖解橫截面描繪(不按比例),
圖1b係根據本發明之裝置之一第二實施例之一圖解橫截面描繪(不按比例),
圖2a係根據本發明之程序之一第一實施例之一第一程序步驟之一圖解橫截面描繪(不按比例),
圖2b係第一實施例之一第二程序步驟之一圖解橫截面描繪(不按比例),
圖2c係第一實施例之一第三程序步驟之一圖解橫截面描繪(不按比例),
圖3a係根據本發明之程序之一第二實施例之一第一程序步驟之一圖解橫截面描繪(不按比例),及
圖3b係第二實施例之一第二程序步驟之一圖解橫截面描繪(不按比例)。
在圖式中,使用相同元件符號識別相同組件或具有相同功能之組件。
1’:基板附件
3’:載體
3o’:載體表面
4:基板
4o:基板表面
5:附接元件(特定言之,真空附件)
6:控制單元(特定言之,閥)
8:載體附接區域/載體附接表面
9:基板附接表面
Claims (7)
- 一種用於接合一第一基板(4)與一第二基板(4’)之方法,其特徵為該第一基板(4)及/或該第二基板(4’)在該接合之前經薄化。
- 如請求項1之方法,其中將該第一基板(4)及/或該第二基板(4’)薄化至小於1,000 μm,特定言之小於500 μm,較佳小於100 μm,更較佳小於50 μm,且極佳小於30 μm之一厚度。
- 如請求項1或2中之一項之方法,其中該第一基板(4)及/或該第二基板(4’)經附接用於薄化及/或接合於具有特定言之一環形框架(2)之一載體(3、3’)之一載體表面(3o、3o’)上。
- 如請求項1或2中之一項之方法,其中該第一基板(4)及該第二基板(4’)特定言之至少相對於在各情況中平行於一接合表面之一橫截表面而在形狀上較佳完全一致,及/或具有類似幾何尺寸。
- 如請求項1或2中之一項之方法,其中該第一基板(4)及該第二基板(4’)在基於該等基板之對應對準標記之接合之前特定言之以大於100 μm,較佳大於50 μm,更佳大於1 μm,最佳大於500 nm,且極佳大於50 nm之一對準精確度彼此對準,且接著特定言之經磁性地預附接。
- 如請求項1或2中之一項之方法,其中在各情況中之基板附件具有用於在各情況中附接一基板(4、4’)之一基板附接表面(9)及在各情況中圍繞該基板附接表面(9)之一載體附接表面(8)或用於該等基板附件之相互附接之一載體附接區域。
- 如請求項6之方法,其中該載體附接表面(8)或該載體附接區域經磁化或可磁化。
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WOPCT/EP2014/078585 | 2014-12-18 | ||
PCT/EP2014/078585 WO2016096025A1 (de) | 2014-12-18 | 2014-12-18 | Verfahren zum bonden von gedünnten substraten |
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TWI720613B TWI720613B (zh) | 2021-03-01 |
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JP (1) | JP6509208B2 (zh) |
KR (1) | KR102115067B1 (zh) |
CN (1) | CN105960706B (zh) |
AT (1) | AT518738B1 (zh) |
DE (1) | DE112014003660B4 (zh) |
SG (1) | SG11201603148VA (zh) |
TW (2) | TWI720613B (zh) |
WO (1) | WO2016096025A1 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG11201603148VA (en) * | 2014-12-18 | 2016-07-28 | Ev Group E Thallner Gmbh | Method for bonding substrates |
EP3690926B1 (de) | 2016-09-29 | 2022-08-17 | EV Group E. Thallner GmbH | Vorrichtung und verfahren zum bonden zweier substrate |
KR20200134708A (ko) | 2019-05-23 | 2020-12-02 | 삼성전자주식회사 | 웨이퍼 본딩 장치 |
JP7339905B2 (ja) * | 2020-03-13 | 2023-09-06 | キオクシア株式会社 | 貼合装置および貼合方法 |
KR102415588B1 (ko) * | 2021-02-25 | 2022-06-30 | 아주대학교산학협력단 | 판 부재 정렬 장치 및 이를 구비하는 판 부재 적층 시스템 |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5843832A (en) * | 1995-03-01 | 1998-12-01 | Virginia Semiconductor, Inc. | Method of formation of thin bonded ultra-thin wafers |
US6399143B1 (en) * | 1996-04-09 | 2002-06-04 | Delsys Pharmaceutical Corporation | Method for clamping and electrostatically coating a substrate |
AT405775B (de) | 1998-01-13 | 1999-11-25 | Thallner Erich | Verfahren und vorrichtung zum ausgerichteten zusammenführen von scheibenförmigen halbleitersubstraten |
US7160105B2 (en) * | 2001-06-01 | 2007-01-09 | Litrex Corporation | Temperature controlled vacuum chuck |
JP2005093528A (ja) * | 2003-09-12 | 2005-04-07 | Canon Inc | 近接場露光用マスクの支持固定構造、該支持固定構造を有する近接場露光装置 |
US7479441B2 (en) * | 2005-10-14 | 2009-01-20 | Silicon Genesis Corporation | Method and apparatus for flag-less water bonding tool |
US7611671B2 (en) | 2005-10-14 | 2009-11-03 | Aperon Biosystems Corp. | Reduction of carbon monoxide interference in gaseous analyte detectors |
KR100832696B1 (ko) * | 2008-01-18 | 2008-05-28 | 임권현 | 진공척 |
JP5370903B2 (ja) * | 2008-02-18 | 2013-12-18 | 株式会社ニコン | 基板貼り合わせ方法 |
US9390974B2 (en) * | 2012-12-21 | 2016-07-12 | Qualcomm Incorporated | Back-to-back stacked integrated circuit assembly and method of making |
TW201131689A (en) * | 2009-07-21 | 2011-09-16 | Nikon Corp | Substrate holder system, substrate joining apparatus and method for manufacturing a device |
EP2706562A3 (de) * | 2009-09-01 | 2014-09-03 | EV Group GmbH | Vorrichtung und Verfahren zum Ablösen eines Halbleiterwafers von einem Trägersubstrat mittels Kippens eines Filmrahmens |
EP3731258A1 (de) * | 2009-09-22 | 2020-10-28 | EV Group E. Thallner GmbH | Vorrichtung zum ausrichten zweier substrate |
EP2325121B1 (de) * | 2009-11-18 | 2013-06-05 | EV Group E. Thallner GmbH | Transportsystem zur Aufnahme und zum Transport von flexiblen Substraten |
US9064686B2 (en) * | 2010-04-15 | 2015-06-23 | Suss Microtec Lithography, Gmbh | Method and apparatus for temporary bonding of ultra thin wafers |
EP2381464B1 (de) * | 2010-04-23 | 2012-09-05 | EV Group GmbH | Vorrichtung und Verfahren zum Ablösen eines Produktsubstrats von einem Trägersubstrat |
US20130270756A1 (en) * | 2010-12-14 | 2013-10-17 | Ev Group E. Thallner Gmbh | Retaining system for retaining and holding a wafer |
US8946058B2 (en) * | 2011-03-14 | 2015-02-03 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
WO2012147343A1 (ja) * | 2011-04-26 | 2012-11-01 | 株式会社ニコン | 基板貼り合わせ装置、基板保持装置、基板貼り合わせ方法、基盤保持方法、積層半導体装置および重ね合わせ基板 |
JP5754261B2 (ja) * | 2011-06-23 | 2015-07-29 | 株式会社ニコン | 基板貼り合わせ装置、基板貼り合わせ方法および積層半導体装置の製造方法 |
KR20130016682A (ko) | 2011-08-08 | 2013-02-18 | 에스케이하이닉스 주식회사 | 듀얼 레이어 구조의 반도체칩과 듀얼 레이어 구조의 반도체칩을 갖는 패키지들 및 그 제조방법 |
KR102350216B1 (ko) * | 2011-08-12 | 2022-01-11 | 에베 그룹 에. 탈너 게엠베하 | 기판의 접합을 위한 장치 및 방법 |
JP5485958B2 (ja) * | 2011-09-16 | 2014-05-07 | 東京エレクトロン株式会社 | 接合方法、プログラム、コンピュータ記憶媒体、接合装置及び接合システム |
US9012265B2 (en) * | 2012-03-26 | 2015-04-21 | Ge Yi | Magnet assisted alignment method for wafer bonding and wafer level chip scale packaging |
EP3373328A1 (de) | 2012-06-06 | 2018-09-12 | EV Group E. Thallner GmbH | Vorrichtung und verfahren zur ermittlung von ausrichtungsfehlern |
US8765578B2 (en) * | 2012-06-06 | 2014-07-01 | International Business Machines Corporation | Edge protection of bonded wafers during wafer thinning |
EP3901698A1 (de) | 2012-09-06 | 2021-10-27 | EV Group E. Thallner GmbH | Strukturstempel, vorrichtung und verfahren zum prägen |
CN105074898B (zh) | 2013-03-27 | 2019-11-12 | Ev集团E·索尔纳有限责任公司 | 用于处理基底堆叠的保持系统、装置及方法 |
SG2014014054A (en) | 2013-06-17 | 2014-10-30 | Ev Group E Thallner Gmbh | Device and Method for Alignment of substrates |
KR20150080449A (ko) | 2013-12-06 | 2015-07-09 | 에베 그룹 에. 탈너 게엠베하 | 기질들을 정렬하기 위한 장치 및 방법 |
KR101640743B1 (ko) * | 2014-10-14 | 2016-07-19 | 안성룡 | 자유변형 흡착척 |
SG11201603148VA (en) * | 2014-12-18 | 2016-07-28 | Ev Group E Thallner Gmbh | Method for bonding substrates |
-
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- 2014-12-18 AT ATA9333/2014A patent/AT518738B1/de active
- 2014-12-18 DE DE112014003660.9T patent/DE112014003660B4/de active Active
- 2014-12-18 KR KR1020167008434A patent/KR102115067B1/ko active IP Right Grant
- 2014-12-18 US US14/917,318 patent/US9859246B2/en active Active
- 2014-12-18 WO PCT/EP2014/078585 patent/WO2016096025A1/de active Application Filing
- 2014-12-18 CN CN201480057663.5A patent/CN105960706B/zh active Active
- 2014-12-18 JP JP2016525094A patent/JP6509208B2/ja active Active
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2015
- 2015-11-12 TW TW108132829A patent/TWI720613B/zh active
- 2015-11-12 TW TW104137404A patent/TW201634289A/zh unknown
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2017
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AT518738A5 (de) | 2017-12-15 |
JP6509208B2 (ja) | 2019-05-08 |
KR102115067B1 (ko) | 2020-05-26 |
TWI720613B (zh) | 2021-03-01 |
US20180096962A1 (en) | 2018-04-05 |
DE112014003660A5 (de) | 2016-09-29 |
JP2018503239A (ja) | 2018-02-01 |
US20160358881A1 (en) | 2016-12-08 |
DE112014003660B4 (de) | 2019-06-13 |
WO2016096025A1 (de) | 2016-06-23 |
TW201634289A (zh) | 2016-10-01 |
CN105960706B (zh) | 2021-07-23 |
CN105960706A (zh) | 2016-09-21 |
KR20170096938A (ko) | 2017-08-25 |
US9859246B2 (en) | 2018-01-02 |
AT518738B1 (de) | 2023-06-15 |
SG11201603148VA (en) | 2016-07-28 |
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