CN105960706A - 用于接合薄化基片的方法 - Google Patents

用于接合薄化基片的方法 Download PDF

Info

Publication number
CN105960706A
CN105960706A CN201480057663.5A CN201480057663A CN105960706A CN 105960706 A CN105960706 A CN 105960706A CN 201480057663 A CN201480057663 A CN 201480057663A CN 105960706 A CN105960706 A CN 105960706A
Authority
CN
China
Prior art keywords
substrate
attachment
carrier
substrates
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201480057663.5A
Other languages
English (en)
Other versions
CN105960706B (zh
Inventor
A.费库里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EV Group E Thallner GmbH
Original Assignee
EV Group E Thallner GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EV Group E Thallner GmbH filed Critical EV Group E Thallner GmbH
Publication of CN105960706A publication Critical patent/CN105960706A/zh
Application granted granted Critical
Publication of CN105960706B publication Critical patent/CN105960706B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0046—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by constructional aspects of the apparatus
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/18—Handling of layers or the laminate
    • B32B38/1825—Handling of layers or the laminate characterised by the control or constructional features of devices for tensioning, stretching or registration
    • B32B38/1833—Positioning, e.g. registration or centering
    • B32B38/1841—Positioning, e.g. registration or centering during laying up
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/18—Handling of layers or the laminate
    • B32B38/1858—Handling of layers or the laminate using vacuum
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2309/00—Parameters for the laminating or treatment process; Apparatus details
    • B32B2309/08—Dimensions, e.g. volume
    • B32B2309/10—Dimensions, e.g. volume linear, e.g. length, distance, width
    • B32B2309/105—Thickness
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/14—Semiconductor wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02233—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body not in direct contact with the bonding area
    • H01L2224/0224—Alignment aids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0381—Cleaning, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0382—Applying permanent coating, e.g. in-situ coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0383—Reworking, e.g. shaping
    • H01L2224/03831—Reworking, e.g. shaping involving a chemical process, e.g. etching the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0383—Reworking, e.g. shaping
    • H01L2224/0384—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H01L2224/081—Disposition
    • H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/08121—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the connected bonding areas being not aligned with respect to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H01L2224/081—Disposition
    • H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/08135—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/08145—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75272—Oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75701—Means for aligning in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75702—Means for aligning in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75703—Mechanical holding means
    • H01L2224/75704—Mechanical holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75703—Mechanical holding means
    • H01L2224/75705—Mechanical holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75723—Electrostatic holding means
    • H01L2224/75724—Electrostatic holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75723—Electrostatic holding means
    • H01L2224/75725—Electrostatic holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75733—Magnetic holding means
    • H01L2224/75734—Magnetic holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75733—Magnetic holding means
    • H01L2224/75735—Magnetic holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75744—Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80003—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80003—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/80006—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H01L2224/80011—Chemical cleaning, e.g. etching, flux
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8001—Cleaning the bonding area, e.g. oxide removal step, desmearing
    • H01L2224/80013—Plasma cleaning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8002—Applying permanent coating to the bonding area in the bonding apparatus, e.g. in-situ coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/8003—Reshaping the bonding area in the bonding apparatus, e.g. flattening the bonding area
    • H01L2224/80047—Reshaping the bonding area in the bonding apparatus, e.g. flattening the bonding area by mechanical means, e.g. severing, pressing, stamping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80009—Pre-treatment of the bonding area
    • H01L2224/80051—Forming additional members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80053—Bonding environment
    • H01L2224/80091—Under pressure
    • H01L2224/80093—Transient conditions, e.g. gas-flow
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80053—Bonding environment
    • H01L2224/80095—Temperature settings
    • H01L2224/80099—Ambient temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/8012—Aligning
    • H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/8013—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/8012—Aligning
    • H01L2224/80121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/80132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/802—Applying energy for connecting
    • H01L2224/80201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/802—Applying energy for connecting
    • H01L2224/80201—Compression bonding
    • H01L2224/80203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/802—Applying energy for connecting
    • H01L2224/80201—Compression bonding
    • H01L2224/80209—Compression bonding applying unidirectional static pressure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/802—Applying energy for connecting
    • H01L2224/80213—Applying energy for connecting using a reflow oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80905—Combinations of bonding methods provided for in at least two different groups from H01L2224/808 - H01L2224/80904
    • H01L2224/80907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06565—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having the same size and there being no auxiliary carrier between the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Recrystallisation Techniques (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

本发明涉及用于使第一基片(4)与第二基片(4')接合的方法，其中，第一基片(4)和/或第二基片(4')在接合之前薄化。基片(4,4')可为晶片、半导体基片、金属基片、矿物基片，尤其是蓝宝石基片、玻璃基片或聚合物基片。第一基片(4)和/或第二基片(4')被固定以用于在尤其是具有环形框架(2)的载体(3,3')的载体表面(3o,3o')上薄化和/或接合。第一基片(4)和第二基片(4')在基于基片(4,4')的对应对准标记接合之前与彼此对准且随后尤其是磁性地预固定。基片固定相应地具有用于相应地固定基片(4,4')的基片固定表面(9)，以及相应地具有围绕基片固定表面(9)的载体固定表面(8)或载体固定区域以用于基片固定的相互固定，其中尤其是载体固定表面(8)或载体固定区域为磁化的或可磁化的，或作为备选基片固定可借助于粘合物、借助于夹具、借助于插销系统或者静电地固定至彼此。

Description

用于接合薄化基片的方法
本发明涉及一种根据权利要求1的用于接合的方法。
在半导体行业中，基片由所谓的接合过程永久地或暂时地彼此连接。
通过接合过程，例如，具有不同功能单元的基片(例如，具有存储器芯片和微控制器的基片)可堆叠在彼此顶部上。具有更复杂性质的基片堆叠通过具有不同性质的多个基片的堆叠和永久附接来获得。由此产生的基片堆叠具有几百微米的厚度。
然而，接合技术也可用于基片和/或基片堆叠的暂时附接。在此情况下，产品基片借助于粘合剂在压力和/或温度下附接到载体基片。在处理产品基片之后，再使产品基片从载体基片分离。
现有技术水平中的最大问题在于多个极薄的基片的对准和永久附接。此薄基片的堆叠产生基片堆叠，所谓的"多堆叠"。为了避免薄基片的困难且麻烦的处理，对准和接合过程在具有限定的标准厚度的基片上执行。在将第二基片接合到第一基片上之后，执行第二基片的背薄化。通过背薄化过程，由之前较厚的基片产生薄基片。可选地，另一个第三厚基片(其厚度在另一个背薄化过程中减小)将接合到该第二背薄化基片上。因此可通过理论上通常可按期望重复的过程产生任何功能的基片堆叠。
技术问题在于，永久接合不可逆转，使得在失准和/或破坏的情况下，构建到该点的整个基片堆叠不可用。由多个基片构成的基片堆叠可值数万欧元。
因此，本发明基于指出至少部分地(优选显著地)解决上述问题的方法的目的。此外，本发明的目的在于使经济且特别是尽可能无废料的接合生产变成可能。
该目的利用权利要求1的特征实现。本发明的有利的其它发展方案在从属权利要求中指出。说明书、权利要求和/或附图中指出的至少两个特征的所有组合也落入了本发明的范围内。在指出的值范围中，作为位于上述限制内的边界值的值也将公开，且可以以任何组合提出。
本发明的基本构想在于，在(尤其是永久)接合之前，脱离先前实践使待接合的至少一个且优选所有基片背薄化。
因此，本发明尤其涉及用于接合已经薄化的基片的方法。在此情况下，本发明优选基于将薄化的基片(优选晶片)附接(且在此状态下，运输、对准和接合)到在框架(基片附接物)上展开的载体(尤其是膜)上的构想。因此，基片优选在运输和/或对准和/或接合过程期间薄化至其预期厚度。在根据本发明的特殊实施例中，厚基片附接到载体上，且在对准(优选)之前不久或接合之前不久背薄化，使得在一定距离内运输较厚的基片也是可能的。在下文中，为了简单起见，假定始终薄化基片，除非明确描述另一状态。
在优选实施例中，薄化的基片可接合到未薄化的基片，或甚至更优选接合到基片堆叠。为了更好地避免含废料的基片堆叠，可仅将根据本发明的薄化基片接合到彼此。
根据本发明的有利实施例，第一基片和/或第二基片薄化至小于1000μm的厚度，具体是小于500μm，优选小于100μm，甚至更优选小于50μm，且最优选小于30μm。
在本发明的另一个发展方案中，设置为使用于薄化和/或接合的第一基片和/或第二基片附接在具有尤其是环形框架的载体的载体表面上。特别而言，当使用相同的载体进行薄化和接合时，可消除载体的更换，以便薄基片总是具有支承物，且因此防止了尤其是在薄化之后的损耗。
有利地，根据本发明的实施例，设置为使第一基片和/或第二基片在形状上优选完全一致，尤其是至少关于在各种情况下平行于接合表面的第一基片和/或第二基片的截面表面，且/或具有类似的几何尺寸。特别而言，本发明用作晶片到晶片(W2W)方法，导致了处理速度和处理量方面的优点。
就第一基片和第二基片与彼此对准且然后在基于基片的对应对准标记的接合之前(尤其是以好于100μm的对准准确度，优选好于50μm，甚至更优选好于1μm，最优选好于500nm，且更加优选好于200nm)尤其是磁性地预先附接而言，可实质上消除对载体在彼此上的对准的影响。
然而，将构想出的是，多个小的第二基片特别规则地布置在载体上，且尤其是也背薄化以便同时接合到第一基片。结果，获得了根据本发明的晶粒到晶片(D2W)方法，由此按照半导体行业中的术语，小基片称为芯片(英文：die，晶粒)，但它们不一定必须是芯片，即，它们不一定必须是电学功能的。特别而言，在接合之前根据本发明背薄化小基片。
在根据本发明的特殊的第三实施例中，甚至将多个小基片与多个小基片同时接合是可能的，这将对应于芯片到芯片(C2C)方法。特别而言，在接合之前根据本发明背薄化小基片。
在下文中，为了简单起见，将只参照特别而言在形状上一致且根据本发明处理的两个大基片。
有利地，根据本发明的薄化的基片可直接地接合。甚至更优选地，一个或多个后续处理步骤在运输之前和/或在对准之前和/或在接合之前执行：
-研磨，和/或
-抛光，和/或
-蚀刻，和/或
-分离(英文：dicing，分割)
-清洁
-涂布，特别是通过
○物理方法，特别是
■ PVD
○化学方法，特别是
■CVD、PE-CVD
-功能化，特别是以电子结构提供，和/或特别而言
○瓷漆
○光刻
○压印
○显影
-测试。
仅无损(即，在上述步骤之后测试)的薄化基片优选为待接合的新基片堆叠的部分。具有缺陷的薄化基片(特别是功能化的薄化基片，其中主要部分或甚至所有功能单元不起作用)可从处理链除去。结果，大幅降低整个基片堆叠被破坏的可能性。通过根据本发明的过程，仅可此后在对准和/或接合步骤中进行基片堆叠的破坏。然而，这两个步骤也在现有技术水平下使用，以便产生基片堆叠，且因此不代表接合之后的任何额外的处理步骤。
根据本发明，特别而言，提供了基片附接物，其因此设计成将薄化的基片特别而言附接到基片附接物的载体。
基片类型
根据本发明，所有标准类型的基片都适合，特别是晶片。基片可具有任何形状，但优选圆形。基片的直径特别是工业标准化的。对于晶片，工业标准直径为1英寸、2英寸、3英寸、4英寸、5英寸、6英寸、8英寸、12英寸和18英寸。根据本发明的方法对于处理矩形基片(特别是玻璃或蓝宝石基片)可能是尤其有利的。
基片可为半导体基片、金属基片、陶瓷基片、矿物基片(特别是蓝宝石基片、玻璃基片或聚合物基片)。在陶瓷或矿物基片的情况下，优选使用蓝宝石基片。
根据本发明，薄化的基片的附接或基片堆叠的附接(由已经与彼此对准且彼此接合的多个薄化的基片构成)是可能的。因此，在下文中，基片也理解为基片堆叠的同义词。
基片附接
在本发明的另一个发展方案中，基片附接物由框架(英文：frame)和在框架上展开作为载体的弹性膜(英文：tape，带)构成。
膜形成特别是粘性的基片附接表面，基片可附接到基片附接表面。膜代表附接元件。框架形成载体附接表面(载体附接区域)，其特别而言磁性地作用，以用于将基片附接物附接到第二(特别是对应的)基片附接物。
在第一优选实施例中，基片附接物因此可彼此磁性地附接。因此，框架优选为磁性或可磁化的。框架磁通量密度特别而言大于10-5T，优选大于10-4T，甚至更优选大于10-3T，最优选大于10-1T，且更加优选大于1T。
有利地，由彼此磁性地粘附的两个框架在基片的接触表面上产生的压力大于10-5N/m2，优选大于10-3N/m2，甚至更优选大于1N/m2，最优选大于101N/m2，且更加优选大于103N/m2。
在根据本发明的第二实施例中，基片附接物可特别而言从外侧经由夹具彼此附接。
在根据本发明的第三实施例中，基片附接物可经由插入系统彼此附接。插入系统优选地扩展，以便插入元件和凹口(其用于接纳相对的基片附接物的插入元件)整体上沿外周交替。
在根据本发明的第四实施例中，基片附接物可彼此静电地附接。在此情况中，可带来电势的对应的板沿基片附接物均匀分布地定位。板优选由其余基片附接物电绝缘。
在本发明的另一个发展方案中，基片附接物具有固态基底元件，其特别而言具有可控制的附接元件以用于将基片附接到基底元件的平基片附接表面。此外，可根据本发明的上述实施例将基片附接物附接到彼此下方。
在另一个发展方案中，基片附接物可彼此磁性地附接。因此，基底元件特别而言在其基片附接表面上为磁性的或可磁化。特别而言，基底元件的磁通量密度(特别而言，在载体附接区域中)大于10-5T，优选大于10-4T，甚至更优选大于10-3T，最优选大于10-1T，且更加优选大于1T。
有利地，由彼此磁性地粘附的两个基片附接物在基片的接触表面上产生的压力大于10-5N/m2，优选大于10-3N/m2，甚至更优选大于1N/m2，最优选大于103N/m2，且更加优选大于103N/m2。
用于两个相关基底元件、框架和/或基片附接物之间(特别而言，在载体附接表面或载体附接区域上)的附接的基底元件、框架和/或基片附接物的附接(特别而言，磁性)性质优选独立于用于附接基片的附接元件的下文提到的附接性质。
根据按照本发明的第一实施例，附接元件至少为粘性表面。粘性表面优选可电性地和/或磁性地切换，使得可能特别而言借助于控制系统在高粘性状态与低粘性状态之间交替。
在根据本发明的第二实施例中，附接元件为与基片附接表面的至少一个真空附接物。真空附接物优选由延伸穿过载体表面的多个真空给送线构成。真空给送线优选连接到位于基片附接物或载体中的真空室。
真空室可经由给送线密封，给送线可经由阀(优选通过控制系统)以流体动力方式与周围区域分开。结果，有可能根据本发明通过施加真空将特别而言背薄化的基片附接到载体表面，且在抽空过程期间关闭阀。结果，在真空给送线和真空室中产生永久负压。从外部作用的正常压力因此代表相对于载体中的负压区域的超压，且基片因此附接至载体。
在根据本发明的第三实施例中，附接元件至少是静电附接物。特别而言，静电附接物由对准且彼此定向的多个特殊形成的电极构成，限定的电势可由电线设置在其上。在待附接的基片的导电区域中，电荷分离(特别是电感应)可由生成的电荷分离产生，该感应导致基片附接表面上的载体与基片之间的静电吸引。特别而言，这可由控制系统控制。
在根据本发明的第四实施例中，附接元件至少为磁性附接物。磁性附接物优选可切换，且特别而言与基底元件的永磁化区分开。可切换的磁性附接物优选为磁性线圈，其通过电流通量构建磁场以用于将基片附接到基片附接表面。因此，待附接的基片具有至少部分磁性性质。
在根据本发明的第五实施例的情况中，附接元件至少为机械附接物。特别而言，机械附接物由夹持元件构成。夹持元件沿待接合的基片表面附接基片。夹持元件可在根据本发明的对准过程期间且甚至在两个基片朝彼此移动时保持在附接位置中。然后可在基片进行接触之前不久、期间或甚至之后除去夹持元件。
基片附接物因此优选具有基片附接表面和包绕基片附接表面的载体附接表面(或载体附接区域)。
基片可在附接到基片附接物之前和/或之后背薄化。如果基片在附接到基片附接物之前背薄化，则基片附接物不受污染。然而，然后必须执行背薄化的基片至基片附接物的传送。如果基片在附接到基片附接物之后背薄化，则优选在背薄化之后清洁基片附接物。然而，由于待背薄化的基片的立即附接，故稳定性的优点将出现。此外，不需要将背薄化的基片传送至根据本发明的基片附接物。
过程
根据本发明的过程的第一实施例，将借助于根据本发明的第一附接物接合的两个薄化的基片布置成彼此相距一定距离，而不使基片的接触表面首先接触或暂时地连接(预接合)。因此，在各种情况中，基片附接到具体而言在基片附接物的对应的相对基片附接表面。
在第一过程步骤中，两个基片与彼此的对准基于基片的对准标记执行。尽管基片的对准(附接到根据本发明的基片附接物上)基于其对准标记，但在基片附接物并未与相应基片相同对准的情况下，可导致不完美的根据本发明的基片附接物与彼此的对准。例如，可利用来自US 6214692 B1、PCT/EP 2013/075831或PCT/EP 2013/062473中的一个附接物来执行对准。在多个较小基片与大基片对准或多个较小基片与多个小基片对准的情况下，对准过程也可经历误差最小化过程，其中通过误差最小化执行基片附接物以及因此位于其上的小基片的最佳对准。此过程在出版物WO2013/182236A1中描述。
特别而言，当两个对应基片附接物围绕与彼此的法线的定向角特别而言小于5°(优选小于1°，甚至更优选小于0.1°，最优选小于0.01°，且更加优选小于0.0001°)和/或两个对应基片附接物与彼此的平移移位特别而言小于5mm(优选小于1mm，甚至更优选小于100μm，最优选小于1μm，且更加优选小于100nm)时，执行进一步处理。上述值可利用测试系统确定。
在根据本发明的第二过程步骤中，执行根据本发明的基片附接物朝彼此的移动。将物体聚集在一起的情况下，可执行基片与彼此或与其它特征的对准标记和/或特点特征的连续控制，使得可在聚集阶段期间发生基片位置的连续检查。结果，确保了在聚集阶段期间，不执行两个基片朝彼此的移位。在过程步骤结束时，特别而言，磁性基片附接物(这里是框架)的表面与载体附接表面进行接触。框架彼此附接。附接优选经由特别而言至少在载体附接表面的两个框架中的至少一个的固有磁化来执行。然而，也可构想出借助于施加到载体附接表面中的至少一个上的粘合剂的附接。另一个可构想出的附接选项为借助于应用于外侧上的夹持元件的夹持。
在根据本发明的第三过程步骤中，预接合或接合过程通过使两个基片朝向彼此来执行，基片附接到载体上的基片附接表面上。通过使两个基片朝彼此移动的接合过程还可借助于用于将物体聚集在一起的器件而从根据本发明的基片附接物的相反侧执行，特别是中心定向的压力装置，特别是通过心轴。用于将物体且特别是适合用于保持基片附接物的样本固持器聚集在一起的此器件在出版物PCT/EP 2011/064353中更详细描述。
在该实施例中，物体聚集在一起通过载体(特别是在框架中展开的膜)的变形来执行。膜可通过中心定向的压力装置变形，或通过背对基片的侧部上的膜的滚筒变形。在出版物WO2014037044A1中，描述了具有滚筒的装置，借助于其可执行压印。本领域的技术人员可从出版物WO2014037044A1中的装置构建附接物，该附接物产生根据本发明的基片附接物(特别是膜)的对应线形负载，且因此开始对应的接触和/或接合过程。在根据本发明的特殊实施例中，可能适合通过载体的变形来使两个基片中的一个朝以尤其平面方式保持的第二基片移动。特别而言，主要可构想出使用销(英文：pin)的中心负载，以开始自动地传播的接合波。根据本发明的该实施例主要适合用于预接合或接合将通过熔化接合过程彼此连接的基片。
在根据本发明的过程的第二实施例中，两个基片借助于第二上述基片附接物彼此附接。
在第一过程步骤中，基于两个基片的对准标记执行其与彼此的对准。关于过程的第一实施例的以上备注主要应用于第二实施例。尽管在第一实施例中，可在膜由机械和/或热应力扭曲时发生在基片的附接之后发生基片相对于框架的移位，但这实质上在第二实施例的情况中排除。
类似于第一实施例执行第二过程步骤，由此优选磁性地(特别而言在彼此相距一定距离处)执行基片附接物优选与载体附接区域(而非直接通过在载体附接表面上进行接触)的附接。
如果两个基片通过预接合彼此预附接，则可根据本发明的实施例提供在热处理之前和/或期间执行额外的全表面接合，以便在两个基片上施加额外的(特别是全表面且均匀的)压力负载。在此情况中施加的力特别而言大于100N，优选大于1kN，甚至更优选大于10kN，最优选大于100kN，且更加优选大于1000kN。通过施加的力除以待接合的基片的表面来计算压力。因此，作用于圆形的200mm基片上的压力在1N的压力负载下为大约3.2Pa，且在10kN的压力负载下为大约320000Pa。
基片附接物可利用样本固持器和/或机器人处理且在各种过程和站点之间运输。
热处理
根据本发明的基片附接物的所有实施例优选适于经受热处理过程(特别而言，用于接合)。然而，第一实施例可由载体或基片附接物的最高操作温度限制，特别是在载体为膜时。
基片可经历热处理，以便提供永久连接(永久接合)。永久接合的接合强度特别而言大于1.0 J/m2，优选大于1.5 J/m2，甚至更优选大于2.0 J/m2，且最优选大于或等于2.5 J/m2。在此情况下，根据本发明，当基片位于根据本发明的基片附接物上时是有利的。因此，换言之，有可能在大规模过程(英文：batch process，批量过程)中加热基片附接物。加热优选在连续式炉中执行。在备选实施例的情况中，热处理在由若干模块构成的群集的模块中执行。根据本发明，还可构想出与热板的接合。在此热处理过程中使用的温度特别而言小于700℃，优选小于500℃，甚至更优选小于300℃，最优选小于100℃，且更加优选小于50℃。在特殊情况下，其中附接的基片具有特别制备的表面，基片在室温下接触时可彼此紧密地接合，使得不再需要额外的热处理。
如果根据本发明的基片附接物具有铁磁性材料，则优选不超过居里温度，以免损失根据本发明的基片附接物的磁性性质。
然而，在根据本发明的另一个实施例中，特别而言，在超过居里温度的情况下根据本发明的基片附接物的铁磁性的消失可描述根据本发明的另一个方面。如果两个基片之间的永久接合的接合强度仅在高于某一温度达到其最大值，且该温度至少接近居里温度，则可通过高于居里温度的另一加热执行基片附接物由于铁磁性失去的自动分离。有利地，根据本发明的基片保持装置然后在温度又下降到低于居里温度(这导致铁磁性的恢复)之前分离，或以一种方式通过额外分离元件与彼此分离，使得在降低到居里温度以下时，它们至少不再彼此连接或至少可更容易分离。此自动分离过程主要在全自动批量过程中有利。
本发明的其它优点、特征和细节遵循优选实施例的后续描述且基于附图；附图在各种情况下以图解视图示出：
图1a为根据本发明的装置的第一实施例的图解截面图(不按比例)，
图1b为根据本发明的装置的第二实施例的图解截面图(不按比例)，
图2a为根据本发明的过程的第一实施例的第一过程步骤的图解截面图(不按比例)，
图2b为第一实施例的第二过程步骤的图解截面图(不按比例)，
图2c为第一实施例的第三构成步骤的图解截面图(不按比例)，
图3a为根据本发明的过程的第二实施例的第一过程步骤的图解截面图(不按比例)，以及
图3b为第二实施例的第二过程步骤的图解截面图(不按比例)。
在附图中，相同构件或具有相同功能的构件以相同参考标号标出。
根据图1a的第一实施例涉及由框架2和在框架2上展开的载体3(这里是弹性膜)形成的基片附接物1。还可构想出的是，展开的载体3很薄，但在未支承状态中为刚性板，因此其不可解释为膜。然后，特别而言，载体3通过加载其载体表面3o而弹性地变形。在其载体表面3o上，基片附接物1具有基片附接表面9(或基片附接区域)，且特别是包绕基片附接表面9的环形载体附接表面8(或载体附接区域)。
框架2和载体3一起形成用于接纳特别而言薄化的第一基片4的收纳区域，由此第一基片4的背对载体3的一侧优选相对于载体附接表面8后退。
背薄化的第一基片4附接到在框架2上展开的载体3(这里是弹性膜)的基片附接表面9(这里是膜表面)。载体表面3o为粘性的，以用于附接第一基片4和用于将载体3附接至框架2。
在根据图1b的实施例中，示出了特别而言整体的基片附接物1'。该基片附接物1'具有带载体表面3o'的刚性载体3'，其具有作为附接元件5的真空附接物。
附接元件5可具有真空条(未示出)；然而，替代真空条，其还可具有静电附接物、磁性附接物、粘性表面或机械夹具。特别而言，在运输载体3'的情况中，附接元件5还在较宽距离内/长时间作用。当使用真空用于附接第一基片4时，真空可通过关闭阀6而保持在真空室和/或真空条内。在根据本发明的其它附接物的情况中，大体上可将阀6解释为经由控制系统控制的控制单元。替代其，在静电和/或磁性附接的情况下也将构想出用于电流的给送线。
薄化的第一基片4的层厚度较小，使得根据本发明通过载体3、3'稳定第一基片4是有利的，以便避免对第一基片4的破坏。
上文针对第一基片指出的内容类似地适用于第二基片4'或其它基片(如果其它基片也相同地设计)。所述基片附接物1、1'的组合还可用于第二基片或其它基片。
在下图中，根据本发明的过程基于两个实例阐释，由此在各种情况下相同地设计待接合的基片(第一基片、第二基片和一些其它基片)和基片附接物。根据本发明，可构想出使用不同基片附接物和/或基片来用于第一基片4和第二基片4'或其它基片。
图2a示出了对准过程，其中两个基片4、4'在各种情况下附接到基片附接物1的载体3上，其布置在相对侧上且彼此对准。优选经由未示出的对准单元(英文：aligner，对准器)执行对准。优选在基片4、4'的基片表面4o、4o'上的对应的对准标记之间以本领域中已知的一种方式执行对准。
由于在基片4、4'的对准标记上执行对准，故基片附接物1可朝彼此移位。然而，该移位一般是微小的且可忽略。特别而言，根据本发明的移位小于5mm，优选小于1mm，甚至更优选小于100μm，最优选小于10μm，且更加优选小于1μm。在此方面，决定性的是对应的载体附接区域或载体附接表面8以一种方式定位成彼此相对，使得基片附接物1的相互附接的足够力传递是可能的。
图2b示出了接触过程，其中两个框架2的表面2o(载体附接表面8)与彼此接触。特别而言，两个框架2通过固有的磁力(由磁场线7绘出)彼此直接地附接。还可构想出基片表面4o位于表面2o上方。在此情况下，基片表面4o在表面2o之前接触。特别而言，表面2o由磁力独立地彼此吸引。
在根据图2c的过程步骤中，发生两个基片4、4'之间的接触。可通过沿相反方向施加力到基片4、4'上的任何元件(特别而言，通过中心和径向对称压力元件或通过滚筒)完成接触。通过施加力，弹性载体3沿相对载体3的方向扩展。特别而言，如图所示，可构想出使两个载体3相对于彼此变形。如果基片表面4o突出于表面2o上，则在此过程步骤中执行外框架2的接触。特别而言，在磁性框架的情况中，通过其磁性吸引独立地完成接触。
在图3a中，类似于图2a示出具有根据图1b的基片附接物1'的对准过程。
在图3b中，绘出了接触过程，其中两个基片4、4'的基片表面4o、4o'在基片附接物1'可接触之前彼此接触。在该实施例中，基片附接物1'因此在不接触的情况下操作。由此，特别而言，形成的基片堆叠由载体3'的固有磁力附接。
根据本发明，两个基片4、4'中的至少一个为薄化的基片4、4'。因此，接合过程不再限于使用厚且大小稳定的基片。
参考标号列表
1,1' 基片附接物
2 框架
2o 表面
3,3' 载体
3o,3o' 载体表面
4,4' 基片
4o,4o' 基片表面
5 附接元件，特别是真空附接物
6 控制单元，特别是阀
7 磁场线
8 载体附接区域/载体附接表面
9 基片附接表面。

Claims (7)

1. 用于使第一基片(4)与第二基片(4')接合的方法，其特征在于，所述第一基片(4)和/或所述第二基片(4')在所述接合之前薄化。
2. 根据权利要求1所述的方法，其特征在于，将所述第一基片(4)和/或所述第二基片(4')薄化至小于1000μm的厚度，特别而言小于500μm，优选小于100μm，甚至更优选小于50μm，且更加优选小于30μm。
3. 根据权利要求1或2中的任一项所述的方法，其特征在于，所述第一基片(4)和/或所述第二基片(4')附接在具有特别而言环形框架(2)的载体(3,3')的载体表面(3o,3o')上用于薄化和/或接合。
4. 根据前述权利要求中的任一项所述的方法，其特征在于，所述第一基片(4)和所述第二基片(4')特别而言至少相对于各种情况中的平行于接合表面的截面表面在形状上优选完全一致，且/或具有类似的几何尺寸。
5. 根据前述权利要求中的任一项所述的方法，其特征在于，所述第一基片(4)和所述第二基片(4')在基于所述基片的对应对准标记的接合之前特别而言以好于100μm，优选好于50μm，甚至更优选好于1μm，最优选好于500nm，且更加优选好于50nm的对准精确度彼此对准，且然后特别而言磁性地预附接。
6. 根据前述权利要求中的任一项所述的方法，其特征在于，在各种情况下，基片附接物具有用于在各种情况下附接一个基片(4,4')的基片附接表面(9)和在各种情况下包绕所述基片附接表面(9)的载体附接表面(8)或用于所述基片附接物的相互附接的载体附接区域。
7. 根据权利要求6所述的方法，其特征在于，所述载体附接表面(8)或所述载体附接区域为磁化的或可磁化。
CN201480057663.5A 2014-12-18 2014-12-18 用于接合薄化基片的方法 Active CN105960706B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2014/078585 WO2016096025A1 (de) 2014-12-18 2014-12-18 Verfahren zum bonden von gedünnten substraten

Publications (2)

Publication Number Publication Date
CN105960706A true CN105960706A (zh) 2016-09-21
CN105960706B CN105960706B (zh) 2021-07-23

Family

ID=52282714

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480057663.5A Active CN105960706B (zh) 2014-12-18 2014-12-18 用于接合薄化基片的方法

Country Status (9)

Country Link
US (2) US9859246B2 (zh)
JP (1) JP6509208B2 (zh)
KR (1) KR102115067B1 (zh)
CN (1) CN105960706B (zh)
AT (1) AT518738B1 (zh)
DE (1) DE112014003660B4 (zh)
SG (1) SG11201603148VA (zh)
TW (2) TWI720613B (zh)
WO (1) WO2016096025A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109791898A (zh) * 2016-09-29 2019-05-21 Ev 集团 E·索尔纳有限责任公司 用于结合两个基板的装置和方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG11201603148VA (en) * 2014-12-18 2016-07-28 Ev Group E Thallner Gmbh Method for bonding substrates
KR20200134708A (ko) 2019-05-23 2020-12-02 삼성전자주식회사 웨이퍼 본딩 장치
JP7339905B2 (ja) * 2020-03-13 2023-09-06 キオクシア株式会社 貼合装置および貼合方法
KR102415588B1 (ko) * 2021-02-25 2022-06-30 아주대학교산학협력단 판 부재 정렬 장치 및 이를 구비하는 판 부재 적층 시스템

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070087531A1 (en) * 2005-10-14 2007-04-19 Silicon Genesis Corporation Method and apparatus for flag-less water bonding tool
JP2009194265A (ja) * 2008-02-18 2009-08-27 Nikon Corp 基板貼り合わせ方法
CN102598206A (zh) * 2009-09-22 2012-07-18 Ev集团E·索尔纳有限责任公司 用于对准两个衬底的设备
JP2013008804A (ja) * 2011-06-23 2013-01-10 Nikon Corp 基板貼り合わせ装置、基板貼り合わせ方法および積層半導体装置の製造方法
US20130071996A1 (en) * 2011-09-16 2013-03-21 Tokyo Electron Limited Joint method, joint apparatus and joint system
CN103238212A (zh) * 2010-12-14 2013-08-07 Ev集团E·索尔纳有限责任公司 用于容纳和保持晶片的容纳装置
US20130252375A1 (en) * 2012-03-26 2013-09-26 Ge Yi Magnet Assisted Alignment Method for Wafer Bonding and Wafer Level Chip Scale Packaging
US20130328174A1 (en) * 2012-06-06 2013-12-12 International Business Machines Corporation Edge Protection of Bonded Wafers During Wafer Thinning

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5843832A (en) * 1995-03-01 1998-12-01 Virginia Semiconductor, Inc. Method of formation of thin bonded ultra-thin wafers
US6399143B1 (en) * 1996-04-09 2002-06-04 Delsys Pharmaceutical Corporation Method for clamping and electrostatically coating a substrate
AT405775B (de) 1998-01-13 1999-11-25 Thallner Erich Verfahren und vorrichtung zum ausgerichteten zusammenführen von scheibenförmigen halbleitersubstraten
US7160105B2 (en) * 2001-06-01 2007-01-09 Litrex Corporation Temperature controlled vacuum chuck
JP2005093528A (ja) * 2003-09-12 2005-04-07 Canon Inc 近接場露光用マスクの支持固定構造、該支持固定構造を有する近接場露光装置
US7611671B2 (en) 2005-10-14 2009-11-03 Aperon Biosystems Corp. Reduction of carbon monoxide interference in gaseous analyte detectors
KR100832696B1 (ko) * 2008-01-18 2008-05-28 임권현 진공척
US9390974B2 (en) * 2012-12-21 2016-07-12 Qualcomm Incorporated Back-to-back stacked integrated circuit assembly and method of making
TW201131689A (en) * 2009-07-21 2011-09-16 Nikon Corp Substrate holder system, substrate joining apparatus and method for manufacturing a device
EP2706562A3 (de) * 2009-09-01 2014-09-03 EV Group GmbH Vorrichtung und Verfahren zum Ablösen eines Halbleiterwafers von einem Trägersubstrat mittels Kippens eines Filmrahmens
EP2325121B1 (de) * 2009-11-18 2013-06-05 EV Group E. Thallner GmbH Transportsystem zur Aufnahme und zum Transport von flexiblen Substraten
US9064686B2 (en) * 2010-04-15 2015-06-23 Suss Microtec Lithography, Gmbh Method and apparatus for temporary bonding of ultra thin wafers
EP2381464B1 (de) * 2010-04-23 2012-09-05 EV Group GmbH Vorrichtung und Verfahren zum Ablösen eines Produktsubstrats von einem Trägersubstrat
US8946058B2 (en) * 2011-03-14 2015-02-03 Plasma-Therm Llc Method and apparatus for plasma dicing a semi-conductor wafer
WO2012147343A1 (ja) * 2011-04-26 2012-11-01 株式会社ニコン 基板貼り合わせ装置、基板保持装置、基板貼り合わせ方法、基盤保持方法、積層半導体装置および重ね合わせ基板
KR20130016682A (ko) 2011-08-08 2013-02-18 에스케이하이닉스 주식회사 듀얼 레이어 구조의 반도체칩과 듀얼 레이어 구조의 반도체칩을 갖는 패키지들 및 그 제조방법
KR102350216B1 (ko) * 2011-08-12 2022-01-11 에베 그룹 에. 탈너 게엠베하 기판의 접합을 위한 장치 및 방법
EP3373328A1 (de) 2012-06-06 2018-09-12 EV Group E. Thallner GmbH Vorrichtung und verfahren zur ermittlung von ausrichtungsfehlern
EP3901698A1 (de) 2012-09-06 2021-10-27 EV Group E. Thallner GmbH Strukturstempel, vorrichtung und verfahren zum prägen
CN105074898B (zh) 2013-03-27 2019-11-12 Ev集团E·索尔纳有限责任公司 用于处理基底堆叠的保持系统、装置及方法
SG2014014054A (en) 2013-06-17 2014-10-30 Ev Group E Thallner Gmbh Device and Method for Alignment of substrates
KR20150080449A (ko) 2013-12-06 2015-07-09 에베 그룹 에. 탈너 게엠베하 기질들을 정렬하기 위한 장치 및 방법
KR101640743B1 (ko) * 2014-10-14 2016-07-19 안성룡 자유변형 흡착척
SG11201603148VA (en) * 2014-12-18 2016-07-28 Ev Group E Thallner Gmbh Method for bonding substrates

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070087531A1 (en) * 2005-10-14 2007-04-19 Silicon Genesis Corporation Method and apparatus for flag-less water bonding tool
JP2009194265A (ja) * 2008-02-18 2009-08-27 Nikon Corp 基板貼り合わせ方法
CN102598206A (zh) * 2009-09-22 2012-07-18 Ev集团E·索尔纳有限责任公司 用于对准两个衬底的设备
CN103238212A (zh) * 2010-12-14 2013-08-07 Ev集团E·索尔纳有限责任公司 用于容纳和保持晶片的容纳装置
JP2013008804A (ja) * 2011-06-23 2013-01-10 Nikon Corp 基板貼り合わせ装置、基板貼り合わせ方法および積層半導体装置の製造方法
US20130071996A1 (en) * 2011-09-16 2013-03-21 Tokyo Electron Limited Joint method, joint apparatus and joint system
US20130252375A1 (en) * 2012-03-26 2013-09-26 Ge Yi Magnet Assisted Alignment Method for Wafer Bonding and Wafer Level Chip Scale Packaging
US20130328174A1 (en) * 2012-06-06 2013-12-12 International Business Machines Corporation Edge Protection of Bonded Wafers During Wafer Thinning

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109791898A (zh) * 2016-09-29 2019-05-21 Ev 集团 E·索尔纳有限责任公司 用于结合两个基板的装置和方法
TWI662639B (zh) * 2016-09-29 2019-06-11 奧地利商Ev集團E塔那有限公司 結合兩基材之裝置與方法
JP2019535128A (ja) * 2016-09-29 2019-12-05 エーファウ・グループ・エー・タルナー・ゲーエムベーハー ２つの基板をボンディングするための装置および方法
TWI691010B (zh) * 2016-09-29 2020-04-11 奧地利商Ev集團E塔那有限公司 結合兩基材之裝置與方法
TWI721797B (zh) * 2016-09-29 2021-03-11 奧地利商Ev集團E塔那有限公司 結合兩基材之裝置與方法
US10964562B2 (en) 2016-09-29 2021-03-30 Ev Group E. Thallner Gmbh Device and method for bonding of two substrates
US11276589B2 (en) 2016-09-29 2022-03-15 Ev Group E. Thallner Gmbh Device and method for bonding of two substrates
US11562912B2 (en) 2016-09-29 2023-01-24 Ev Group E. Thallner Gmbh Device and method for bonding of two substrates
CN109791898B (zh) * 2016-09-29 2023-02-03 Ev 集团 E·索尔纳有限责任公司 用于结合两个基板的装置和方法
TWI801800B (zh) * 2016-09-29 2023-05-11 奧地利商Ev集團E塔那有限公司 結合兩基材之裝置與方法
US11862487B2 (en) 2016-09-29 2024-01-02 Ev Group E. Thallner Gmbh Device and method for bonding of two substrates

Also Published As

Publication number Publication date
AT518738A5 (de) 2017-12-15
JP6509208B2 (ja) 2019-05-08
KR102115067B1 (ko) 2020-05-26
TWI720613B (zh) 2021-03-01
US20180096962A1 (en) 2018-04-05
DE112014003660A5 (de) 2016-09-29
JP2018503239A (ja) 2018-02-01
US20160358881A1 (en) 2016-12-08
TW202023835A (zh) 2020-07-01
DE112014003660B4 (de) 2019-06-13
WO2016096025A1 (de) 2016-06-23
TW201634289A (zh) 2016-10-01
CN105960706B (zh) 2021-07-23
KR20170096938A (ko) 2017-08-25
US9859246B2 (en) 2018-01-02
AT518738B1 (de) 2023-06-15
SG11201603148VA (en) 2016-07-28

Similar Documents

Publication Publication Date Title
CN105960706A (zh) 用于接合薄化基片的方法
JP6316402B2 (ja) 基板スタックを取り扱うための、収容システム及び装置及び方法
US10770426B2 (en) Micro device transferring method, and micro device substrate manufactured by micro device transferring method
US20100170086A1 (en) Device, unit, system and method for the magnetically-assisted assembling of chip-scale, and nano and micro-scale components onto a substrate
JP2006332563A (ja) ウェハ搬送装置、ウェハ積層体搬送装置及び積層型半導体装置製造方法
JP5305220B2 (ja) 基板張り合わせ装置
KR101385444B1 (ko) 반도체 칩 픽업 이송용 콜렛
EP3483925A1 (en) Chuck plate for semiconductor post-processing, chuck structure having same chuck plate and chip separating apparatus having same chuck structure
US20180261570A1 (en) Methods and systems for parallel assembly, transfer, and bonding of ferromagnetic components
TW202017455A (zh) 轉置方法及轉置裝置
JP6301565B1 (ja) マイクロチップをウェーハーから切り離して該マイクロチップを基板上に装着する方法および装置
CN114762097A (zh) 一种吸附抓取装置及客体表面加工方法
US11621186B2 (en) Simultaneous bonding approach for high quality wafer stacking applications
US6827809B2 (en) Method of transferring a substantially disc-shaped workpiece, and device for carrying out this method
US8776363B2 (en) Method for supporting semiconductor wafer and wafer supporting assembly
US9113585B2 (en) Method of forming external terminals of a package and apparatus for performing the same
US20070181653A1 (en) Magnetic alignment of integrated circuits to each other
JP2023525222A (ja) 基板システム間でアライメントマークを転送する方法とシステム
JP6516889B2 (ja) 基板スタックを取り扱うための、収容システム及び装置及び方法
JP2019145811A (ja) 薄膜化基板の貼り合わせ方法
KR102615699B1 (ko) 반도체 웨이퍼의 보유 방법 및 반도체 장치의 제조 방법
JP2013232663A (ja) 基板ホルダ装置及び基板張り合わせ装置
CN117716487A (zh) 微装置的选择性释放
CN112864072A (zh) 衬底的加工方法
KR20230147713A (ko) 마이크로 디바이스의 이송

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant