TW201918134A - Printed circuit board - Google Patents

Abstract

A printed circuit board according to an aspect of the present invention comprises a first insulating layer of which a metal pad is formed on one surface; a plating via formed by penetrating through the first insulating layer to be connected to one surface of the metal pad; a second insulating layer formed on one surface of the first insulating layer; and a paste via formed by penetrating through the second insulating layer to be connected to the other surface of the metal pad, wherein side surface of the plating via at the other surface of the first insulating layer is positioned within the first insulating layer.

Description

A printed circuit board

The following description relates to a printed circuit board (PCB).

Due to the dramatic increase in the focus on 5th generation (5G) communication using high frequency regions of 20 GHz or higher, in order to cope with this situation, technical research is underway to print The board uses new materials. In order to minimize signal transmission loss in high frequency regions, it is necessary to develop insulating materials with low dielectric constant (Dk) and low dielectric loss (Df), reduce circuit surface roughness, and improve inter-via connections. (inter-via connection) technology.

An example of a printed circuit board is described in Korean Patent No. 10-2011-0002112.

It is an object of the present invention to provide a printed circuit board having improved inter-via connections.

A printed circuit board according to an aspect of the present invention includes: a first insulating layer formed on one surface of the first insulating layer; a plated through hole formed by penetrating through the first insulating layer Connecting to one surface of the metal pad; a second insulating layer formed on one surface of the first insulating layer; and a paste via formed by penetrating through the second insulating layer to be connected to the Another surface of the metal pad, wherein a surface of the plated through hole at the other surface of the first insulating layer is located within the first insulating layer.

A printed circuit board according to another aspect of the present invention includes: a first insulating layer; a plated through hole formed by penetrating through the first insulating layer; and a second insulating layer formed on the first insulating layer And a paste via hole formed by penetrating through the second insulating layer to contact the plated through hole, wherein a contact interface between the plated through hole and the paste through hole is located Inside the first insulating layer.

Other features and aspects will be apparent from the following detailed description, drawings and claims.

The following detailed description is provided to assist the reader in a comprehensive understanding of the methods, devices, and/or systems described herein. Various modifications, adaptations, and equivalents of the methods, devices, and/or systems described herein will be apparent to those skilled in the art. The order of operations described herein is merely an example, and is not limited to the order of operations referred to herein, but will be apparent to those of ordinary skill in the art, except where the operations must occur in a particular order. Other than that, it can be changed. In addition, descriptions of well-known functions and constructions of those skilled in the art can be omitted for clarity and clarity.

Features described herein can be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein are provided to be thorough and complete, and the full scope of the present invention will be conveyed to those of ordinary skill in the art.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning meaning meaning Any term defined in a commonly used dictionary should be interpreted as having the same meaning as in the context of the related art, and should not be construed as having an idealized or overly formal meaning unless explicitly defined otherwise.

Regardless of the figure number, the same or corresponding components will be given the same drawing numbers, and the same or corresponding components will not be described again. In the entire description of the present invention, the detailed description will be omitted when it is stated that the specific related conventional technology is not related to the viewpoint of the present invention. Terms such as "first" and "second" may be used in the description of various components, but the above components should not be limited to the above terms. The above terms are only used to distinguish between components. In the drawings, some components may be exaggerated, omitted, or briefly shown, and the dimensions of the components do not necessarily reflect the actual dimensions of the components.

In the following, specific embodiments of the invention will be described in detail with reference to the drawings.

Figure 1 shows a printed circuit board in accordance with an embodiment of the present invention. 2 illustrates a plurality of unit layers of a printed circuit board in accordance with an embodiment of the present invention. Figure 3 illustrates a via in a printed circuit board in accordance with an embodiment of the present invention.

A printed circuit board according to an embodiment of the present invention will be explained in two aspects. One aspect illustrates the structure of one unit layer and the other illustrates a via structure in which adjacent unit layers are bonded together. Therefore, the former will be explained with reference to FIGS. 1 and 2, and the latter will be explained with reference to FIG.

Referring to FIGS. 1 and 2, a printed circuit board according to an embodiment of the present invention includes a first insulating layer 100, a plated through hole 130, a second insulating layer 200, and a paste via 230. The printed circuit board may be formed of a plurality of unit layers and each of the plurality of unit layers includes a first insulating layer 100, a plated through hole 130, a second insulating layer 200, and a paste via 230.

The first insulating layer 100 and the second insulating layer 200 are formed of an insulating material such as a resin. The second insulating layer 200 is laminated on one surface of the first insulating layer 100. In the case where the printed circuit board is formed of a plurality of unit layers, since each unit layer includes the first insulating layer 100 and the second insulating layer 200, the finally manufactured printed circuit board has the first insulating layer 100 therein The second insulating layer 200 alternately overlaps the laminated structure.

Examples of the resin of the insulating layer 100 and the insulating layer 200 may include various materials such as a thermosetting resin and a thermoplastic resin.

The insulating layer 100 and the insulating layer 200 may be made of a material having a low dielectric constant and a low dielectric loss. Specifically, the insulating layer 100 and the insulating layer 200 are formed of at least one material selected from the group consisting of liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), and polyphenylene ether. , PPE), cyclo olefin polymer (COP), perfluoroalkoxy (PFA), and polyimide (PI). This material is suitable for reducing signal loss in substrates used to transmit high frequency signals.

The insulating layer 100 and the insulating layer 200 may be formed of an epoxy resin, a polyimide or the like. Examples of the epoxy resin include naphthalene epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, and novolac epoxy. Novolac epoxy resin, cresol novolac epoxy resin, rubber modified epoxy resin, cycloaliphatic epoxy resin, lanthanum epoxy Resin, nitrogen-based epoxy resin, phosphorus-based epoxy resin, and the like. However, it is not limited to this.

The insulating layer 100 and the insulating layer 200 may include a fiber reinforcing material such as glass cloth or an inorganic filler such as cerium oxide. In the former case, the insulating layer 100 and the insulating layer 200 may be formed in a prepreg (PPG), and in the latter case, the insulating layer 100 and the insulating layer 200 may be formed, for example, in a taste augmentation film. (ajinomoto build-up film, ABF) and other buildup films.

A first circuit 111 and a metal pad 110 are formed on one surface of the first insulating layer 100. The first circuit 111 and the metal pad 110 may be embedded in one surface of the first insulating layer 100. In this case, the first circuit 111 and the metal pad 110 are formed on a surface of the second insulating layer 200 that is in contact with one surface of the first insulating layer 100 (the other surface of the second insulating layer 200; the second insulating layer 200) The surface that is not in contact with the first insulating layer 100 is referred to as "one surface", and the surface opposite to the other surface is referred to as "the other surface". The metal pad 110 and the metal pad 110 are located between the first insulating layer 100 and the second insulating layer 200 and are recessed in one surface of the first insulating layer 100.

The first circuit 111 is a conductor that is patterned to transmit electrical signals. The metal pad 110 is a conductor connected to the first circuit 111. The first circuit 111 and the metal pad 110 may be formed of a metal such as copper (Cu), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt) or alloy thereof. .

Each side surface of the first circuit 111 and the metal pad 110 may be inclined. Specifically, each side surface of the first circuit 111 and the metal pad 110 may have a descending slope. The cross-sectional area of each of the first circuit 111 and the metal pad 110 increases toward the bottom of the insulator 200. Specifically, the cross-sectional area of the metal pad 110 increases from one surface to the other. Such inclined side surfaces may be the result of forming the first circuit 111 and the metal pad 110 by a substractive process such as tenting.

A second circuit 112 is formed on the other surface of the first insulating layer 100. The second circuit 112 is a conductor that is patterned to transmit electrical signals in the same manner as the first circuit 111. The second circuit 112 may be formed of a metal such as copper (Cu), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or an alloy thereof.

The second circuit 112 may have a finer pitch than the first circuit 111. That is, the wiring density of the second circuit 112 is greater than the wiring density of the first circuit 111, the width of the second circuit 112 is smaller than the width of the first circuit 111, and the interval between the second circuits 112 may be smaller than between the first circuits 111. Interval.

The side surface of the second circuit 112 may not be inclined or may be inclined to be very close to vertical as compared to the first circuit 111. This may be the result of forming the first circuit 111 and the second circuit 112 in different ways. For example, the first circuit 111 is formed by a subtractive process and the second circuit 112 is formed by an additive process, a semi-additive process, and a modified semi-additive process. Process) or similar process formation.

The second circuit 112 can include a seed layer S located below the second circuit 112. The seed layer S can be formed by electroless plating, and in this case, the second circuit 112 can be formed by electroplating. The seed layer S may have a thickness of 2 micrometers (μm) or less than 2 micrometers.

A ground layer 113 may be formed on the other surface of the first insulating layer 100. The second circuit 112 can be a patterned conductor, and the ground layer 113 can be a metal layer that is wider than the second circuit 112.

When the printed circuit board is formed of a plurality of unit layers, the second circuit 112 or the ground layer 113 may be selectively formed on the other surface of the first insulating layer 100 in each of the unit layers. When the printed circuit board is finally formed by stacking a plurality of unit layers in a batch, the circuit layers (the first circuit 111 and the second circuit 112) and the ground layer 113 may be alternately formed in a specific order. For example, in FIG. 1, it is designed to form a ground layer 113 after every three circuit layers.

However, the invention is not limited to this configuration. The second circuit 112 and the ground layer 113 may be formed together on the other surface of the first insulating layer 100.

A plated through hole 130 is formed in the first insulating layer 100. The plated through hole 130 is formed to penetrate through the first opening 120 of the first insulating layer 100 such that the plated through hole 130 penetrates the first insulating layer 100. The plated through hole 130 is made of a metal such as copper (Cu), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt) or alloy thereof. The opening 120 is formed by plating.

The plated through hole 130 is connected to the metal pad 110 and contacts one surface of the metal pad 110. The plated through hole 130 electrically connects the metal pad 110 to the second circuit 112 (or the ground layer 113). Here, since the metal pad 110 is connected to the first circuit 111, the first circuit 111 and the second circuit 112 (or the ground layer 113) are electrically connected by plating the through holes 130.

A surface of the plated through hole 130 that is not in contact with the metal pad 110 is exposed to the other surface of the first insulating layer 100. However, the surface of the plating via 130 that is not in contact with the metal pad 110 is more recessed than the other surface of the first insulating layer 100. That is, the surface of the plating via 130 at the other surface of the first insulating layer 100 is located within the first insulating layer 100. Therefore, if one surface of the first insulating layer 100 is set as the bottom surface and the other surface of the first insulating layer 100 is set as the upper surface, the position of the upper surface of the plated through hole 130 is lower than that of the first insulating layer 100. The position of the upper surface. Here, a space formed when the surface of the plating via 130 is more recessed than the upper surface of the first insulating layer 100 may be referred to as a recessed space or recess 140. The recessed space 140 may have a thickness of 3 microns or less.

The cross-sectional area of the plated through hole 130 may increase from one surface of the first insulating layer 100 to the other surface of the first insulating layer 100. That is, the cross-sectional area of the plated through hole 130 is increased from the first circuit 111 to the second circuit 112 (or the ground layer 113). On the other hand, in one of the plurality of unit layers, the cross-sectional area of the plated through hole 130 may become larger as the plated through hole 130 travels outward from the metal pad 110. This may be the result of forming the first opening 120 by a laser process such as a CO ₂ laser.

The plated through hole 130 may include a seed layer S under the plated through hole 130. The seed layer S may be formed by electroless plating, and the plated through holes 130 may be formed by electroplating. The seed layer S may be formed to have a thickness of 2 μm or less. The seed layer S of the second circuit 112 and the seed layer S of the plated via 130 may be connected to each other without an interface therebetween.

A paste via 230 is formed in the second insulating layer 200. The plated through hole 230 may be a through hole formed of a conductive filler such as a metal paste.

The metal of the metal paste forming the paste via 230 may be different from the metal plating the via 130. The melting point of the metal of the paste via 230 may be lower than the melting point of the plated through hole 130. The plated through hole 130 is formed of a copper-containing metal, and the paste through hole 230 may be formed of a metal including copper, tin, and silver coated with ruthenium.

The paste via 230 may be formed to penetrate through the second opening 220 of the second insulating layer 200 to penetrate the second insulating layer 200. The paste via 230 is connected to the metal pad 110 and contacts the other surface of the metal pad 110.

The cross-sectional area of the paste via 230 may increase from the other surface of the metal pad 110 to one surface of the second insulating layer 200. The increase or decrease of the cross-sectional area of the plated through hole 130 and the increase or decrease of the cross-sectional area of the paste through hole 230 may be symmetrical with respect to the metal pad 110. That is, in one of the plurality of unit layers, the cross-sectional area of the plated through hole 130 and the cross-sectional area of the paste through hole 230 may become larger from the metal pad 110 toward the outside. This is because the positions of the processed surfaces of the first opening 120 and the second opening 220 are opposite.

The paste via 230 may be exposed to one surface of the second insulating layer 200. In this case, the paste via 230 may protrude more than one surface of the second insulating layer 200. That is, when one surface of the second insulating layer 200 is referred to as a bottom surface, the other surface of the second insulating layer 200 contacts one surface of the first insulating layer 100. The bottom surface of the paste via 230 is exposed to the bottom surface of the second insulating layer 200 and protrudes more than the bottom surface of the second insulating layer 200.

On the other hand, the cross-sectional area of the paste via 230 may decrease from one surface of the second insulating layer 200 toward the outside. Therefore, the cross-sectional area of the paste via 230 can be increased from the other surface of the metal pad 110 up to one surface of the second insulating layer 200, and then reduced.

3 shows that when the printed circuit board is formed of a plurality of unit layers, the via hole 130 formed in one unit layer and the paste via 230 formed in another unit layer adjacent to the unit layer Coupling relationship.

When the printed circuit board is formed of a plurality of unit layers, the first insulating layer 100 in one unit layer is in contact with the second insulating layer 200 in the other unit layer adjacent to the one unit layer. At this time, the plated through holes 130 in the one unit layer are in contact with the paste through holes 230 in the other unit layer adjacent to the one unit layer.

That is, the second insulating layer 200 is laminated on the first insulating layer 100, and the paste vias 130 penetrating through the first insulating layer 100 and the paste vias 230 penetrating through the second insulating layer 230 are in contact with each other. At this time, the contact interface between the plated through hole 130 and the paste through hole 230 is located in the first insulating layer 100. Referring to FIG. 3, when the interface between the first insulating layer 100 and the second insulating layer 200 is referred to as A, the contact interface between the plated through hole 130 and the paste via 230 faces the first insulation as compared with A. Layer 100 is recessed B. Here, the space formed by B is the recessed space 140.

Specifically, when the surface of the plated through hole 130 is more recessed than the interface A and the first insulating layer 100 and the second insulating layer 200 are laminated on each other, the paste through hole 230 is inserted into the recessed space of the plated through hole 130. in. As a result, the paste through hole 230 protrudes from the interface A. Here, the end side surface of the paste through hole 230 contacts the first insulating layer 100.

This recessed space 140 receives a portion of the paste through hole 230, thereby preventing unnecessary flow of the paste through hole 230. In addition, since the recessed space 140 has the beneficial effect of matching the plated through hole 130 and the paste through hole 230, it is not necessary to provide a separate through hole pad, and the signal loss associated with the through hole pad can be reduced.

A first circuit 111 and a metal pad 110 are formed on one surface of the first insulating layer 100. The plated through hole 130 is formed on one surface of the metal pad 110, and the second insulating layer 200 is laminated on the other surface of the first insulating layer 100. Here, the side surface of the metal pad 110 includes an inclined surface, and the cross-sectional area of the metal pad 110 may increase from one surface of the metal pad 110 to the other surface of the metal pad 110. The same inclined surface may also be included in the side surface of the first circuit 111. The cross-sectional area of the second circuit 112 may also increase from one surface to the other.

A second circuit 112 is formed on the other surface of the first insulating layer 100. The side surface of the second circuit 112 may have no inclined surface or may include an inclined surface that is close to vertical. A seed layer S may be formed under the second circuit 112 and the seed layer S may be connected to the seed layer S disposed under the plated through holes 130.

A ground layer 113 may be formed on the other surface of the first insulating layer 100.

The first insulating layer 100 and the second insulating layer 200 may be formed of at least one material selected from the group consisting of liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), polyphenylene ether (PPE), and cycloolefin polymer (COP) ), perfluoroalkoxy (PFA) and polyimine (PI).

The cross-sectional area of each of the first opening 120 penetrating through the first insulating layer 100 and the second opening 220 penetrating through the second insulating layer 200 may decrease from the interface A to the opposite side. In this case, the cross-sectional area of the plated through hole 130 becomes smaller from one surface to the other. In other words, the cross-sectional area of the plated through hole 130 increases from the bottom surface to the interface A. The cross-sectional area of the paste via 230 increases from the upper surface to the interface between the first insulating layer 100 and the second insulating layer 200, and the interface between the first insulating layer 100 and the second insulating layer 200 faces the interface A. Reduced. This is because a portion of the paste via 230 is inserted into the first opening 120 such that the side slope of the paste via 230 in the first opening 120 is the same as the side slope of the plated via 130.

Figure 4 illustrates a printed circuit board in accordance with another embodiment of the present invention.

The printed circuit board shown in Figure 4 can be a rigid flexible board. Such a printed circuit board can be used as a replacement for a coaxial cable.

The rigid flexible substrate is divided into a rigid portion and a flexible portion. The flexible insulating layer 310 formed on the rigid portion and the flexible portion is made of a flexible material such as liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), and polyimine (PI). A rigid insulating layer 320 is laminated on both surfaces of the flexible insulating layer in the rigid portion. As the rigid insulating layer 320, a resin having a small flexibility can be used.

The rigid portion may include the structure set forth with reference to Figures 1 through 3. The description of the rigid portion is the same as that described above and thus will be omitted.

5 through 18 are cross-sectional views showing exemplary processes used in a method of fabricating a printed circuit board in accordance with an embodiment of the present invention.

Referring to Fig. 5, a substrate in which a metal foil M is laminated on an insulating material is prepared. The insulating material corresponds to the second insulating layer 200 in the above description, and the metal foil M corresponds to the first circuit 111 and the metal pad 110.

The insulating material may be, for example, liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), polyphenylene ether (PPE), cycloolefin polymer (COP), perfluoroalkoxy (PFA), and polyimine (PI). And other materials are formed. Preferably, the insulating material can have a dielectric loss tangent of less than 0.002 (at 10 GHz). Further, the insulating material may have a thickness of 25 micrometers to 100 micrometers. The metal foil M may be copper and may have a thickness of 10 micrometers to 20 micrometers. However, it is not limited to this.

Referring to Fig. 6, a photosensitive resist R1 is laminated and patterned. Patterning of the photosensitive photoresist R1 can be performed by a photolithography process including exposure and development. The photosensitive photoresist R1 becomes an etching resist. That is, the patterned photosensitive photoresist R1 is held in a region in which the first circuit 111 and the metal pad 110 are to be formed.

Referring to FIG. 7, the patterned photosensitive photoresist R1 becomes an etch resist and the metal foil M is etched. The first circuit 111 and the metal pad 110 can be formed by such a cap hole method, but are not limited thereto. When the first circuit 111 and the metal pad 110 are formed by the cap hole method, the side surfaces of the first circuit 111 and the metal pad 110 are inclined and the cross-sectional area of each of the first circuit 111 and the metal pad 110 is insulated. The material side is enlarged. That is, the longitudinal sides of the first circuit 111 and the metal pad 110 become trapezoidal. However, the trapezoidal shape of the side surfaces of the first circuit 111 and the metal pad 110 is omitted from FIG.

Referring to FIG. 8, a first insulating layer 100 is laminated on an insulating material, and one surface of the first insulating layer 100 contacts the insulating material. The first insulating layer 100 may be laminated by V-press lamination. The first insulating layer 100 may have a thickness of 25 micrometers to 100 micrometers. The first insulating layer 100 may be made of the same or different material as the insulating material (the second insulating layer 200). However, the dielectric loss tangent of the first insulating layer 100 may also be less than 0.002 (at 10 GHz).

According to the process of FIG. 8, a unit layer in which the first insulating layer 100 and the second insulating layer 200 are combined is formed. A circuit 111 and a metal pad 110 are formed between the first insulating layer 100 and the second insulating layer 200. The first circuit 111 and the metal pad 110 are embedded in the first insulating layer 100.

Referring to FIG. 9, a first opening 120 is formed in the first insulating layer 100. The first opening 120 may be formed by a laser process such as a CO ₂ laser or an ultra violet (UV) laser, or may be formed by a mechanical process such as a sand blast process. The first opening 120 is formed on the metal pad 110 such that one surface of the metal pad 110 is exposed through the first opening 120. The cross-sectional area of the first opening 120 may be reduced toward the metal pad 110, and the width of the first opening 120 may be 40 microns to 100 microns.

Referring to FIG. 10, a plated through hole 130 is formed in the first opening 120. The plated through hole 130 may be filled by performing electroplating after the seed layer S is formed by electroless plating. At this time, the seed layer S formed by electroless plating may be formed not only on the inner wall and the bottom of the first opening 120 but also on the other surface of the first insulating layer 100. The seed layer S may have a thickness of 2 microns or less.

Referring to Fig. 11, a photosensitive photoresist R2 is laminated on the seed layer S and the photosensitive photoresist R2 is patterned. For the region in which the second circuit 112 is formed, the photosensitive photoresist R2 is removed.

Referring to Figure 12, a second circuit 112 can be formed by electroplating. Therefore, the second circuit 112 can be formed by a semi-additive process, but is not limited thereto.

In Fig. 13, the photosensitive photoresist R2 is stripped.

Referring to Figure 14, the unnecessary seed layer S is removed. That is, the seed layer S located in a region other than the seed layer S located under the second circuit 112 is removed. Here, when the seed layer (S) is removed, one surface of the plated through hole 130 made of the same metal as the seed layer (S) is partially removed. That is, the recessed space 140 is formed in the plated through hole 130. Thereby, one surface of the plating via 130 is recessed lower than the other surface of the first insulating layer 100.

Referring to FIG. 15, a second opening 220 is formed after the protective film 210 is attached to one surface of the second insulating layer 200. The protective film 210 may be a polyethylene terephthalate (PET) film. The protective film 210 prevents a burr from occurring when the second opening 220 is processed. The second opening 220 may be formed by a laser process such as a CO ₂ laser or an ultraviolet laser, or may be formed by a mechanical process such as a sand blasting process. The width of the second opening 220 on one side of the second insulating layer 200 may be from 40 micrometers to 100 micrometers.

Referring to FIG. 16, a metal paste is filled in the second opening 220. The metal paste includes a metal filler made of copper, tin or silver coated with bismuth (Bi), and may be a paste mixed with a thermosetting resin. The metal paste can be extruded by a vacuum press or an atmospheric press.

Referring to FIG. 17, the protective film 210 is removed, and the paste via 230 is completed. When the protective film 210 is removed, a part of the metal paste may fall off. Even so, the metal paste can be more prominent than one surface of the second insulating layer 200. By such a process, a unit layer of a printed circuit board can be formed.

In FIG. 18, a cell layer in which the second circuit 112 is no longer formed but the ground layer 113 is formed is fabricated.

That is, after preparing the unit layer in which the second insulating layer 200 and the first insulating layer 100 are laminated, the first opening 120 is processed to form the seed layer S, and the plated through hole 130 and the ground layer are formed by plating. 113. The unit layer having the ground layer 113 can then be completed by bonding the protective film 210, forming the second opening 220, forming the paste via 230, and removing the protective film 210.

The unit layer on which the second circuit 112 is formed as described above with reference to FIGS. 5 to 7 is bonded together with the unit layer on which the ground layer 113 is formed as described with reference to FIG. 8, and then laminated at a high temperature to provide printing Board (see Figure 2).

Although the present invention includes specific examples, it will be apparent to those skilled in the art that various forms can be made in the examples without departing from the spirit and scope of the scope of the claims. And changes in the details. The examples described herein are to be considered as illustrative only and not as limiting. Descriptions of features or aspects in each instance should be considered as suitable features or aspects in other examples. If the techniques are performed in a different order and/or if components in the system, architecture, apparatus, or circuitry are combined and/or replaced or supplemented with other components or equivalent components thereof, Achieve a suitable result. Therefore, the scope of the invention is not to be limited by the details of the invention, but the scope of the claims and the equivalents thereof in.

100‧‧‧Insulation/First Insulation

110‧‧‧Metal pad

111‧‧‧First circuit

112‧‧‧second circuit

113‧‧‧ Grounding layer

120‧‧‧First opening/opening

130‧‧‧ Plated through holes

140‧‧‧ recessed space/depression

200‧‧‧Insulation/Second Insulation

210‧‧‧Protective film

220‧‧‧second opening

230‧‧‧Paste through hole

310‧‧‧Flexible insulation

320‧‧‧Rigid insulation

A‧‧‧ interface

B‧‧‧ Sag

M‧‧‧metal foil

R1, R2‧‧‧Photosensitive photoresist

S‧‧‧ seed layer

Figure 1 shows a printed circuit board in accordance with an embodiment of the present invention. 2 illustrates a plurality of unit layers of a printed circuit board in accordance with an embodiment of the present invention. Figure 3 illustrates a via in a printed circuit board in accordance with an embodiment of the present invention. Figure 4 illustrates a printed circuit board in accordance with another embodiment of the present invention. 5 through 18 are cross-sectional views showing exemplary processes used in a method of fabricating a printed circuit board in accordance with an embodiment of the present invention. Throughout the drawings and the detailed description, the same reference numerals refer to the same elements. The figures may not be drawn to scale, and the relative size, proportion, and depiction of the elements in the drawings may be exaggerated for clarity, description, and convenience.

Claims (20)

A printed circuit board comprising: a first insulating layer formed on one surface of the first insulating layer; a plated through hole formed by penetrating through the first insulating layer to be connected to the metal a surface of the pad; a second insulating layer formed on one surface of the first insulating layer; and a paste via hole formed by penetrating through the second insulating layer to be connected to the metal pad a surface, wherein a surface of the plated through hole at the other surface of the first insulating layer is located within the first insulating layer. The printed circuit board of claim 1, wherein a side surface of the metal pad is formed to be inclined. The printed circuit board of claim 2, wherein a cross-sectional area of the metal pad increases from one surface of the metal pad to the other surface of the metal pad. The printed circuit board of claim 1, further comprising a first circuit formed on one surface of the first insulating layer, wherein a side surface of the first circuit is formed to be inclined. The printed circuit board of claim 1, further comprising a second circuit formed on the other surface of the first insulating layer. The printed circuit board of claim 5, wherein the plated through hole and the second circuit comprise a seed layer at the bottom. The printed circuit board of claim 1, further comprising a ground layer formed on the other surface of the first insulating layer. The printed circuit board of claim 1, wherein the paste through hole protrudes more than one surface of the second insulating layer. The printed circuit board of claim 1, wherein a cross-sectional area of each of the plated through hole and the paste through hole increases from the metal pad to the outer side. The printed circuit board according to claim 1, wherein the first insulating layer and the second insulating layer are formed of at least one material selected from the group consisting of liquid crystal polymer (LCP) and polytetrafluoroethylene. (PTFE), polyphenylene ether (PPE), cycloolefin polymer (COP), perfluoroalkoxy (PFA), and polyimine (PI). A printed circuit board comprising: a first insulating layer; a plated through hole formed by penetrating through the first insulating layer; a second insulating layer formed on the first insulating layer; and a paste via hole, Forming through the second insulating layer to contact the plated through hole, wherein a contact interface between the plated through hole and the paste through hole is located in the first insulating layer. The printed circuit board of claim 11, wherein a side end surface of the paste through hole contacts the first insulating layer. The printed circuit board of claim 11, further comprising a metal pad formed on one surface of the first insulating layer, wherein the plated through hole is formed on one surface of the metal pad, And wherein the second insulating layer is formed on the other surface of the first insulating layer. The printed circuit board of claim 13, wherein the metal pad has a cross-sectional area that increases from one surface of the metal pad to the other surface of the metal pad. The printed circuit board of claim 13, further comprising a first circuit formed on one surface of the first insulating layer, wherein a side surface of the first circuit is formed to be inclined. The printed circuit board of claim 13, further comprising a second circuit formed on the other surface of the first insulating layer. The printed circuit board of claim 16, wherein the plated through hole and the second circuit comprise a seed layer at the bottom. The printed circuit board of claim 13, further comprising a ground layer formed on the other surface of the first insulating layer. The printed circuit board of claim 11, wherein a cross-sectional area of the plated through hole increases from a bottom to the contact interface, wherein a cross-sectional area of the paste through hole is from a top surface to a The interface between the first insulating layer and the second insulating layer is increased, and the interface between the first insulating layer and the second insulating layer is reduced to the contact interface. The printed circuit board according to claim 11, wherein the first insulating layer and the second insulating layer are made of at least one material selected from the group consisting of liquid crystal polymer (LCP) and polytetrafluoroethylene. Ethylene (PTFE), polyphenylene ether (PPE), cycloolefin polymer (COP), perfluoroalkoxy (PFA), and polyimine (PI).