TW201318143A - 積體電路裝置及裝配積體電路裝置的方法 - Google Patents

積體電路裝置及裝配積體電路裝置的方法 Download PDF

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TW201318143A
TW201318143A TW101131987A TW101131987A TW201318143A TW 201318143 A TW201318143 A TW 201318143A TW 101131987 A TW101131987 A TW 101131987A TW 101131987 A TW101131987 A TW 101131987A TW 201318143 A TW201318143 A TW 201318143A
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substrate
function block
integrated circuit
wireless
boot function
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TWI566371B (zh
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Sam Ziqun Zhao
Michael Boers
Ahmadreza Rofougaran
Arya Behzad
Jesus Alfonso Castandeda
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Broadcom Corp
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Abstract

本發明涉及具有無線啟動功能塊的裝置,其中所述的實施方式提供了改進的積體電路(IC)裝置。在實施方式中,IC裝置包括:基板;耦接至基板表面的IC晶片;位於IC晶片上的第一無線啟動功能塊,該第一無線啟動功能塊被配置為與位於基板上的第二無線啟動功能塊進行無線通訊;以及接地環,被配置為用於為第一和第二無線啟動功能塊提供電磁遮罩。

Description

積體電路裝置及裝配積體電路裝置的方法
本發明總體上涉及積體電路(IC)裝置,更具體地涉及有關IC裝置的通信。
積體電路(IC)裝置通常包括密封在封裝中的IC晶片(die)。該IC裝置可耦接至印刷電路板(PCB),以啟動IC裝置和耦接至PCB的其他裝置之間的通信。例如,在陣列型封裝中,IC晶片通常耦接至基板,該基板耦接至一組連接元件,例如,一組焊球。該組連接元件然後物理地耦接至PCB。
IC晶片可以各種方式耦接至基板。例如,在晶片下倒裝晶片(die-down flip-chip)封裝中,可使用焊接凸塊(bumps),以將IC晶片表面上的接觸墊(pads)耦接至位於基板上的接觸墊。在另一個實例中,可使用配線結合(wirebonds),以將IC晶片表面上的接觸墊耦接至位於基板上的指形焊點(bond fingers)。
然而,將IC晶片耦接至基板的傳統方式的成本較高。例如,用於形成配線結合的材料,例如,金,可能比較貴,從而增加了整個裝置的成本。此外,將IC晶片耦接至基板的傳統方式也易受製造缺陷的影響。例如,配線結合和/或焊接凸塊在製造和裝配過程中可能會破裂或被損壞,減少IC裝置的產量。
此外,耦接不同的IC裝置的傳統方式還具有缺點。例如,當使用PCB將IC裝置耦接在一起時,用於將IC裝置耦接至PCB的元件在製造或現場應用期間可能破裂或被損壞。此 外,IC裝置內部或IC裝置和其他裝置(例如,通過PCB)之間的大部分通信易受電磁干擾的影響。該干擾的存在將影響通信的保真度(fidelity),從而大大地妨礙整個系統的性能。
本發明提供了一種積體電路裝置,包括:基板;積體電路晶片,耦接至基板的表面;第一無線啟動功能塊(block),位於積體電路晶片上,其中,第一無線啟動功能塊被配置為與位於基板上的第二無線啟動功能塊進行無線通訊;以及接地環(ring),被配置為用於為第一無線啟動功能塊和第二無線啟動功能塊提供電磁遮罩(shielding)。
優選地,接地環位於基板的表面上。
優選地,接地環包括形成在基板的表面上的金屬跡線(trace)。
優選地,該積體電路裝置還包括:第二接地環,形成在基板的表面上,其中,第二接地環包括形成在基板的表面上的第二跡線。
優選地,該積體電路裝置被配置為耦接至印刷電路板,並且其中接地環耦接至印刷電路板。
優選地,接地環包括柔性(flexible)材料。
優選地,該積體電路裝置還包括耦接構件,其被配置為將接地環耦接至基板。
優選地,該耦接構件被配置為允許基板獨立於接地環而移動。
優選地,該積體電路裝置還包括位於基板的表面上的第二接地環。
優選地,該積體電路裝置被配置為耦接至印刷電路板表面,該積體電路裝置還包括:第三無線啟動功能塊,位於基板的第二表面上,基板的第二表面與基板的第一表面相對,其中,第三無線啟動功能塊被配置為與位於印刷電路板的表面上的第四無線啟動功能塊進行無線通訊。
優選地,接地環被配置為用於為第三無線啟動功能塊和第四無線啟動功能塊提供電磁遮罩。
優選地,該積體電路裝置還包括耦接至基板的第二表面的焊球,其被配置為耦接至印刷電路板的表面。
本發明還提供了一種裝配積體電路裝置的方法,包括:在積體電路晶片的表面上形成第一無線啟動功能塊;在基板的表面上形成第二無線啟動功能塊,其中,第二無線啟動功能塊被配置為與第一無線啟動功能塊進行無線通訊;將積體電路晶片耦接至基板;以及設置接地環,接地環被配置為用於為第一無線啟動功能塊和第二無線啟動功能塊提供電磁遮罩。
優選地,該設置包括:在基板的表面上形成金屬跡線。
優選地,該方法還包括:設置第二接地環,第二接地環被配置為用於為第一無線啟動功能塊和第二無線啟動功能塊提供電磁遮罩。
優選地,該積體電路裝置被配置為耦接至印刷電路板,並且其中所述設置包括將接地環耦接至印刷電路板。
優選地,該方法還包括:形成耦接構件,該耦接構件被配置為將接地環耦接至基板。
優選地,該耦接構件被配置為允許基板獨立於接地環而移動。
優選地,該積體電路裝置被配置為耦接至印刷電路板的表面,方法還包括:在基板的第二表面上形成第三無線啟動功能塊,基板的第二表面與基板的第一表面相對,其中,第三無線啟動功能塊被配置為與位於印刷電路板的表面上的第四無線啟動功能塊進行無線通訊。
優選地,接地環被配置為用於為第三無線啟動功能塊提供電磁遮罩。
在本說明書中對“一個實施方式”、“實施方式”、“示例性實施方式”等的參考表示所述的實施方式可包括特定的特徵、結構或特性,但並不是每個實施方式均必須包括該特定特徵、結構或特性。此外,此類片語不一定需要指相同的實施方式。此外,當結合實施方式來說明特定特徵、結構或特性時,本領域技術人員應當瞭解,應結合無論是否清楚說明的其他實施方式來實現此類特徵、結構或特性。
此外,應當理解,此處使用的空間說明(例如“上方”、“下方”、“左”、“右”、“上”、“下”、“頂部”、“底部”等)僅用於示例的目的,並且此處說明的結構的實際實現方式可以任何的方向或以任何方式進行空間佈置。
傳統封裝
圖1示出了傳統的晶片下(die down)球柵陣列(BGA)封裝100的橫截面圖。BGA封裝100包括通過焊接凸塊130而耦接至基板120的上表面125的IC晶片110。BGA封裝100 是晶片下封裝,其中晶片110的有源(active)表面115面向基板120。另一方面,在晶片上(die up)封裝中,晶片的有源表面背向基板。
有源表面115通常包括電力和接地分佈軌跡(rails)和輸入/輸出接觸墊(pads)。多個焊接凸塊130可在倒裝晶片110的有源表面115上分佈著,以各自連接倒裝晶片110至基板120。如圖1示出,焊接遮罩(mask)190包圍焊接凸塊130所位於的區域。
在圖1示出的傳統佈置中,通孔(vias)140在基板120的上表面125將焊接凸塊130、跡線和/或通孔墊150連接至基板120底面的焊球180。如圖1示出,基板120可包括凸起墊160和球墊170。凸起墊160在基板120的上表面125連接至焊接凸塊130。球墊170在基板120的下表面連接至焊球180。焊球180可將倒裝晶片BGA封裝100電連接至具有導電連接的任何適當的表面,例如PCB。
本發明的示例性實施方式
在此處說明的實施方式中,提供了一種IC裝置,其包括無線啟動功能塊。該無線啟動功能塊可用於在IC晶片和基板之間使信號進行通信。此外、或可選地,無線啟動功能塊可用於在基板和印刷電路板(PCB)之間使信號進行通信。在實施方式中,還可設置接地環為無線啟動功能塊提供電磁遮罩。由於無線啟動功能塊之間的無線通訊尤其易受電磁干擾的影響,為了無線啟動功能塊之間通信的保真度而設置的接地環是非常有用的。
圖2示出了根據本發明實施方式的耦接至印刷電路板(PCB)250的IC裝置200的橫截面圖。IC裝置200包括通過 粘合劑206而耦接至基板204的IC晶片202。IC晶片202具有多個第一無線啟動功能塊220和形成在表面208上的接觸墊207。基板204具有分別形成在表面210和212上的多個第二和第三無線啟動功能塊230和240。基板204還具有分別形成在表面210和212上的焊接凸塊209和焊球211。PCB 250具有形成於其上的多個第四無線啟動功能塊260和焊球218。第一和第二接地環214和216形成在基板204的表面210上。
粘合劑206將IC晶片202附接至基板204。在實施方式中,粘合劑206是不導電的環氧樹脂。
如圖2示出,IC晶片202均歐姆地且無線地耦接至基板204。具體地,IC晶片202的接觸墊207物理地耦接至基板204的焊接凸塊209。此外,多個第一無線啟動功能塊220被配置為與多個第二無線啟動功能塊230進行無線通訊。相似地,基板204均歐姆地且無線地耦接至PCB 250。特別地,基板204的表面212物理地連接至焊球218,基板204通過焊球218而耦接至PCB 250。另外,多個第三無線啟動功能塊240被配置為與位於PCB 250上的多個第四無線啟動功能塊260進行無線通訊。在實施方式中,諸如FDMA、TDMA或CDMA的多路接入(multiple access)技術可由該無線啟動功能塊使用,以使不同的多個第一、第二、第三和第四無線啟動功能塊220、230、240和260相互之間不干擾。以下將參考圖3更詳細地說明多個第一、第二、第三和第四無線啟動功能塊220、230、240和260的結構。
與IC晶片202、基板204和PCB 250之間的所有通信相同,多個第一、第二、第三和第四無線啟動功能塊220、230 、240和260之間的通信易受來自IC裝置200外部的電磁干擾的影響。然而,多個第一、第二、第三和第四無線啟動功能塊220、230、240和260之間的通信尤其易受干擾的影響,因為此類通信是無線的。由此,電磁干擾能嚴重的損壞多個不同的無線啟動功能塊之間的通信的保真度。
為減少電磁干擾,接地環214和216設置於IC裝置200,如圖2中所示。接地環214和216可形成為基板204之表面210上的金屬跡線並且可通過基板204(例如,通過基板204的接地平面)而耦接至地電位。在實施方式中,接地環214和216可由諸如銅、金、鎳金合金、銀或其他金屬的導電金屬形成。在操作中,接地環214和216用作法拉第籠,其防止電磁波進入一個或多個第一、第二、第三和第四無線啟動功能塊220、230、240和260之間的空間。此外,接地環214和216也可用作IC裝置200的部件的共同接地。例如,接地環214和216可用作多個第一、第二、第三和第四無線啟動功能塊220、230、240和260的共同接地。
在實施方式中,接地環214和216可構造為柔性的(flexible)。例如,可較薄地形成接地環214和216,例如,其厚度與形成在基板204上的通常的跡線的厚度相同或更小,並且可從諸如金屬之類的柔性材料或可塑性(malleable)材料中製成。在這種情況下,當彎曲或按壓IC裝置200時,接地環214和216不在基板204上施加額外的壓力,從而減少了基板204將破裂或被損壞的可能性。
如圖2示出,IC裝置包括兩個接地環,即,接地環214和216。根據以上說明,對本領域技術人員顯而易見的是,只要不違背本發明的範圍和精神,IC裝置200可包括與接地環 214和216相似的任何數量的接地環(例如,一個、三個或多於三個)。
圖3示出了根據本發明實施方式的無線啟動功能塊300的示圖。無線啟動功能塊300包括天線302和通孔304a和304b(統稱為“304”),其通向(饋給)天線302。一個或多個第一、第二、第三和第四無線啟動功能塊220、230、240和260可以與無線啟動功能塊300相似的方式來實現。在實施方式中,至少一個通孔304是矽通孔(例如,在無線啟動功能塊300形成在IC晶片202的表面上的實施方式中)。
如圖3示出,天線302是偶極天線。根據需要,可使用其他天線配置。在實施方式中,天線302可由金屬跡線或平面形成。例如,可使用IC晶片202或基板204上的跡線形成偶極天線302。天線302可被配置為在某個頻率範圍內進行操作(例如,通過調節天線302的尺寸)。在其他實施方式中,天線302可以是其他類型的天線。例如,天線302可以是具有方形或矩形形狀的貼片(patch)天線。
通孔304可用于使用單端信號或差分信號來驅動天線或從天線接收單端信號或差分信號。例如,通孔304a可耦接至信號平面(例如,通過一個或多個接地環214和216的地平面)並且通孔304b可耦接至電路塊或耦接至提供單端信號的其他元件。可選地,每個通孔304可耦接至電路塊或耦接至提供差分信號的分量的其他元件。
如圖3示出,無線啟動功能塊300可選地包括收發器306。在此實施方式中,天線302由收發器306饋給。收發器306可使用晶片的通孔、基板或PCB而耦接至信號平面。在實施方式中,收發器306也耦接至電路塊或PCB的一部分(例如 ,通過基板)。收發器306可配置為傳送從電路塊或PCB接收到的信號和/或傳遞接收到的信號至電路塊或至PCB。在另一個實施方式中,收發器306可具有附加功能。例如,收發器306可能夠執行信號處理任務,如調制和解調以及允許使用以上提到的多路接入。
圖4示出了根據本發明實施方式的耦接至PCB 250的IC裝置400的橫截面圖。IC裝置400基本上與IC裝置200相似,除了IC裝置400不包括接地環214和216以外。作為替代,接地環402設置於PCB 250上。接地環402係與接地環214和216相似,接地環402可保持地電位並且從而可作為法拉第籠進行操作,從而提供電磁遮罩。然而,與接地環214和216不同,接地環402為多個第三和第四無線啟動功能塊240和260提供電磁遮罩,而且也為多個第一和第二無線啟動功能塊220和230提供電磁遮罩。在實施方式中,接地環402可通過形成在PCB 250上的一個或多個跡線以獲取地電位。
如圖4示出,接地環402與基板204物理地分開。由此,當彎曲或按壓基板204時,接地環402不在基板上施加額外的壓力。在實施方式中,接地環402可由柔性材料形成,以防止在接地環402上施加壓力時使其破裂或損壞。
圖5示出了根據本發明實施方式的耦接至PCB 250的IC裝置500的橫截面圖。IC裝置500基本上與IC裝置400相似,除了IC裝置500以外還附加地包括耦接構件502。耦接構件502將基板204耦接至接地環402。在實施方式中,耦接構件502可由導電材料形成,例如,銅。在另一個實施方式中,耦接構件502將接地環402電耦接至基板204。從而,接地環402可從基板204獲得地電位。
此外,耦接構件502可被配置為允許基板204和接地環402獨立運動。例如,耦接構件502可由允許基板204相對於接地環402而滑動的金屬或其他材料製成。因此,當彎曲或按壓IC裝置500時,可以使用耦接構件502以確保接地環402不在基板204上施加附加的壓力。在另一實施方式中,接地環402可由柔性材料或可塑性材料製成,以進一步減少將施加於基板204的任何壓力。
圖6示出了根據本發明實施方式的耦接至PCB 250的IC裝置600的橫截面圖。IC裝置600基本上與IC裝置500相似,除了IC裝置600以外還附加地包括第二接地環602。第二接地環602可基本上與參考圖2說明的接地環214和216相似。第二接地環602可提供對電磁干擾的附加遮罩。對本領域技術人員顯而易見的是,只要不違背本發明的範圍和精神,IC裝置600可包括與接地環602相似的任何數量的接地環。
圖7示出了根據本發明實施方式的提供用於裝配IC裝置的示例性步驟的流程圖700。根據以下討論,其他結構性或操作性的實施方式將對本領域的技術人員顯而易見。圖7中示出的步驟不一定要按以下示出的順序進行。以下詳細說明了圖7的步驟。
在步驟702中,在IC晶片的表面上形成多個第一無線啟動功能塊。例如,在圖2中,可在IC晶片202的表面208上形成第一無線啟動功能塊220。
在步驟704中,在基板的表面上形成第二無線啟動功能塊。例如,在圖2中,可在基板204的表面210上形成多個第二無線啟動功能塊230。在另一實施方式中,可在基板的另 一表面上形成第三無線啟動功能塊。例如,在圖2中,可在基板204的表面212上形成多個第三無線啟動功能塊240。在實施方式中,一個或多個第一、第二、第三無線啟動功能塊可形成為參考如上圖3說明的跡線和通孔的組合。例如,通過將跡線耦接至收發器以形成能在其他任務中執行信號處理的無線啟動功能塊,可提供附加的功能。
在可選的步驟706中,在基板上形成耦接構件。例如,在圖5中,可在基板204上形成耦接構件502。耦接構件502可被配置為將基板204耦接至接地環402。在另一實施方式中,耦接構件502可被配置為通過允許基板204相對於接地環402而滑動來允許基板204獨立於接地環402而移動。
在步驟708中,該IC晶片耦接至基板。例如,在圖2中,IC晶片202使用粘合劑206耦接至基板204。
在步驟710中,設置接地環,其被配置為提供電磁遮罩。例如,在圖2中,在基板204上設置接地環214和216。在另一實施方式中,在圖3中,在PCB 250上設置接地環402。如以上所述,接地環214、216和402被配置為用於為多個第一、第二、第三和第四無線啟動功能塊220、230、240和260提供電磁遮罩。
結論
以上已借助於示出具體功能的實現及其關係的功能構造塊說明了本發明的實施方式。此類功能構造塊的邊界在此是任意定義的,以方便說明。只要適當地執行特定的功能及其關係,也可定義其他邊界。
前述具體實施方式的說明已充分地示出了本發明的一般特徵,在沒有過分的實驗並且在不違背本發明的總體概念的情況下,其他人員可通過運用本技術領域中的知識,對此類具體實施方式進行修改和/或使用于各種應用。因而,根據此處呈現的教導和指導,此類使用和修改應在公開的實施方式的等效的含義和範圍內。應當理解,此處的措辭和術語是用於說明而非限制,從而本領域技術人員根據這些教導和指導能理解本說明書中的術語或措辭。
本發明的廣度和範圍不應限於任何以上說明的示例性實施方式,而應僅根據所附的申請專利範圍和它們的等同物來限定。
100‧‧‧BGA封裝
110‧‧‧晶片
115‧‧‧有源表面
120‧‧‧基板
125‧‧‧上表面
130‧‧‧焊接凸塊
140‧‧‧通孔
150‧‧‧通孔墊
160‧‧‧凸起墊
170‧‧‧球墊
180‧‧‧焊球
190‧‧‧焊接遮罩
200‧‧‧IC裝置
202‧‧‧IC晶片
204‧‧‧基板
206‧‧‧粘合劑
207‧‧‧接觸墊
208‧‧‧表面
209‧‧‧焊接凸塊
210/212‧‧‧表面
211‧‧‧焊球
214‧‧‧第一接地環
216‧‧‧第二接地環
218‧‧‧焊球
220‧‧‧第一無線啟動功能塊
230‧‧‧第二無線啟動功能塊
240‧‧‧第三無線啟動功能塊
250‧‧‧PCB
260‧‧‧第四無線啟動功能塊
300‧‧‧無線啟動功能塊
302‧‧‧天線
304‧‧‧通孔
306‧‧‧收發器
400‧‧‧IC裝置
402‧‧‧接地環
500‧‧‧IC裝置
502‧‧‧耦接構件
600‧‧‧IC裝置
602‧‧‧第二接地環
圖1是傳統的晶片下(die down)球柵陣列封裝的橫截面圖;圖2是根據本發明實施方式的具有位於基板上的接地環的IC裝置的橫截面圖;圖3是根據本發明實施方式的無線啟動功能塊的示圖;圖4至圖6是根據本發明實施方式的具有耦接至印刷電路板的接地環的IC裝置的橫截面圖;圖7是根據本發明實施方式的用於裝配IC裝置的示例性步驟的流程圖。
100‧‧‧BGA封裝
110‧‧‧晶片
115‧‧‧有源表面
120‧‧‧基板
125‧‧‧上表面
130‧‧‧焊接凸塊
140‧‧‧通孔
150‧‧‧通孔墊
160‧‧‧凸起墊
170‧‧‧球墊
180‧‧‧焊球
190‧‧‧焊接遮罩遮罩

Claims (10)

  1. 一種積體電路裝置,包括:基板;積體電路晶片,耦接至所述基板的表面;第一無線啟動功能塊,位於所述積體電路晶片上,其中,所述第一無線啟動功能塊被配置為與位於所述基板上的第二無線啟動功能塊進行無線通訊;以及接地環,被配置為用於為所述第一無線啟動功能塊和所述第二無線啟動功能塊提供電磁遮罩。
  2. 如申請專利範圍第1項所述的積體電路裝置,其中所述接地環位於所述基板的表面上。
  3. 如申請專利範圍第2項所述的積體電路裝置,其中所述接地環包括形成在所述基板的表面上的金屬跡線。
  4. 如申請專利範圍第1項所述的積體電路裝置,其中所述積體電路裝置被配置為耦接至印刷電路板,並且其中所述接地環耦接至所述印刷電路板。
  5. 如申請專利範圍第4項所述的積體電路裝置,其中還包括耦接構件,其被配置為將所述接地環耦接至所述基板。
  6. 如申請專利範圍第4項所述的積體電路裝置,其中還包括位於所述基板的表面上的第二接地環。
  7. 如申請專利範圍第1項所述的積體電路裝置,其中所述積體電路裝置被配置為耦接至印刷電路板表面,所述積體電路裝置還包括:第三無線啟動功能塊,位於所述基板的第二表面上,所述基板的第二表面與所述基板的第一表面相對,其中,所述第三無線啟動功能塊被配置為與位於所述印刷電路板的表面上的第四無線啟動功能塊進行無線通訊。
  8. 如申請專利範圍第7項所述的積體電路裝置,其中所述接地環被配置為用於為所述第三無線啟動功能塊和所述第四無線啟動功能塊提供電磁遮罩。
  9. 一種裝配積體電路裝置的方法,包括:在積體電路晶片的表面上形成第一無線啟動功能塊;在所述基板的表面上形成第二無線啟動功能塊,其中,所述第二無線啟動功能塊被配置為與所述第一無線啟動功能塊進行無線通訊;將所述積體電路晶片耦接至所述基板;以及設置接地環,所述接地環被配置為用於為所述第一無線啟動功能塊和所述第二無線啟動功能塊提供電磁遮罩。
  10. 如申請專利範圍第9項所述的裝配積體電路裝置的方法,其中所述積體電路裝置被配置為耦接至印刷電路板,並且其中所述設置包括將所述接地環耦接至所述印刷電路板。
TW101131987A 2011-09-30 2012-09-03 積體電路裝置及裝配積體電路裝置的方法 TWI566371B (zh)

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8901945B2 (en) 2011-02-23 2014-12-02 Broadcom Corporation Test board for use with devices having wirelessly enabled functional blocks and method of using same
US8928139B2 (en) 2011-09-30 2015-01-06 Broadcom Corporation Device having wirelessly enabled functional blocks
CN214960295U (zh) * 2018-08-22 2021-11-30 株式会社村田制作所 传输线路基板以及传输线路基板的接合构造
US11088108B2 (en) * 2019-06-27 2021-08-10 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure including ring-like structure and method for forming the same
US11791535B2 (en) 2020-09-28 2023-10-17 Samsung Electronics Co., Ltd. Non-galvanic interconnect for planar RF devices

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6728113B1 (en) * 1993-06-24 2004-04-27 Polychip, Inc. Method and apparatus for non-conductively interconnecting integrated circuits
FR2727227B1 (fr) 1994-11-17 1996-12-20 Schlumberger Ind Sa Dispositif de securite actif a memoire electronique
JP3378435B2 (ja) 1995-09-29 2003-02-17 株式会社東芝 超高周波帯無線通信装置
FR2765399B1 (fr) 1997-06-27 2001-12-07 Sgs Thomson Microelectronics Dispositif semi-conducteur a moyen d'echanges a distance
FR2769110B1 (fr) 1997-09-26 1999-12-03 Gemplus Card Int Procede de fabrication d'un module ou etiquette electronique, module ou etiquette obtenue et support comportant un tel module ou etiquette
EP0932200A3 (en) 1998-01-22 2000-08-23 International Business Machines Corporation Heat sink device for microprocessor
EP0978729A3 (en) 1998-08-07 2002-03-20 Hitachi, Ltd. High-frequency transmitter-receiving apparatus for such an application as vehicle-onboard radar system
US6542720B1 (en) 1999-03-01 2003-04-01 Micron Technology, Inc. Microelectronic devices, methods of operating microelectronic devices, and methods of providing microelectronic devices
JP3675688B2 (ja) 2000-01-27 2005-07-27 寛治 大塚 配線基板及びその製造方法
EP1126522A1 (en) * 2000-02-18 2001-08-22 Alcatel Packaged integrated circuit with radio frequency antenna
JP4848108B2 (ja) 2001-09-14 2011-12-28 インターナショナル・ビジネス・マシーンズ・コーポレーション データ処理システム
US6885090B2 (en) 2001-11-28 2005-04-26 North Carolina State University Inductively coupled electrical connectors
US6670692B1 (en) 2002-10-09 2003-12-30 Silicon Integrated Systems Corp. Semiconductor chip with partially embedded decoupling capacitors
US7095620B2 (en) 2002-11-27 2006-08-22 International Business Machines Corp. Optically connectable circuit board with optical component(s) mounted thereon
US20050075080A1 (en) 2003-10-03 2005-04-07 Nanyang Technological University Inter-chip and intra-chip wireless communications systems
WO2005101051A2 (en) 2004-04-12 2005-10-27 Ghz Tr Corporation Method and apparatus for automotive radar sensor
US7525199B1 (en) 2004-05-21 2009-04-28 Sun Microsystems, Inc Packaging for proximity communication positioned integrated circuits
DE102004059333A1 (de) 2004-12-09 2006-06-14 Robert Bosch Gmbh Antennenanordnung für einen Radar-Transceiver
DE102004063541A1 (de) 2004-12-30 2006-07-13 Robert Bosch Gmbh Antennenanordnung für einen Radar-Transceiver
US7502965B2 (en) 2005-02-07 2009-03-10 Broadcom Corporation Computer chip set having on board wireless interfaces to support test operations
US7479841B2 (en) 2005-02-15 2009-01-20 Northrop Grumman Corporation Transmission line to waveguide interconnect and method of forming same including a heat spreader
US20060285480A1 (en) 2005-06-21 2006-12-21 Janofsky Eric B Wireless local area network communications module and integrated chip package
US8186048B2 (en) * 2007-06-27 2012-05-29 Rf Micro Devices, Inc. Conformal shielding process using process gases
US20070065984A1 (en) 2005-09-22 2007-03-22 Lau Daniel K Thermal enhanced package for block mold assembly
US7405477B1 (en) * 2005-12-01 2008-07-29 Altera Corporation Ball grid array package-to-board interconnect co-design apparatus
EP1967876A4 (en) 2005-12-27 2013-04-17 Ibiden Co Ltd OPTICAL AND ELECTRICAL COMPOSITE WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
US8390307B2 (en) 2006-03-07 2013-03-05 Steven Slupsky Method and apparatus for interrogating an electronic component
US7692295B2 (en) 2006-03-31 2010-04-06 Intel Corporation Single package wireless communication device
EP2830006A1 (en) * 2006-04-26 2015-01-28 Murata Manufacturing Co., Ltd. Article with an electromagnetic-coupling module
KR100691632B1 (ko) 2006-05-16 2007-03-12 삼성전기주식회사 반도체칩, 반도체칩의 제조방법 및 반도체칩 패키지
US8102665B2 (en) 2006-06-21 2012-01-24 Broadcom Corporation Integrated circuit with intra-chip clock interface and methods for use therewith
US20080122726A1 (en) 2006-11-27 2008-05-29 Gil Levi Low cost chip package with integrated RFantenna
US8032089B2 (en) 2006-12-30 2011-10-04 Broadcom Corporation Integrated circuit/printed circuit board substrate structure and communications
US7974587B2 (en) 2006-12-30 2011-07-05 Broadcom Corporation Local wireless communications within a device
WO2008094128A1 (en) 2007-01-29 2008-08-07 Agency For Science, Technology And Research Antenna for underwater communications
US8116294B2 (en) 2007-01-31 2012-02-14 Broadcom Corporation RF bus controller
WO2008111914A1 (en) 2007-03-09 2008-09-18 Nanyang Technological University An integrated circuit structure and a method of forming the same
US20080237843A1 (en) 2007-03-27 2008-10-02 Ashish Gupta Microelectronic package including thermally conductive sealant between heat spreader and substrate
JP5049039B2 (ja) 2007-03-30 2012-10-17 株式会社バッファロー モジュール装着システム、モジュール、マザーボード及びモジュールの制御方法
US7868841B2 (en) 2007-04-11 2011-01-11 Vubiq Incorporated Full-wave di-patch antenna
EP2138962B1 (en) 2007-04-26 2012-01-04 Murata Manufacturing Co. Ltd. Wireless ic device
US7899407B2 (en) 2007-05-01 2011-03-01 Broadcom Corporation High frequency signal combining
CN101308950A (zh) 2007-05-18 2008-11-19 英资莱尔德无线通信技术(北京)有限公司 天线装置
US7619901B2 (en) 2007-06-25 2009-11-17 Epic Technologies, Inc. Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system
US20090006675A1 (en) 2007-06-28 2009-01-01 Broadcom Corporation Universal Serial Bus Dongle Device with Millimeter Wave Transceiver and System for use Therewith
CN101578616A (zh) 2007-07-17 2009-11-11 株式会社村田制作所 无线ic器件及电子设备
US7651889B2 (en) * 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
US7911388B2 (en) 2007-12-12 2011-03-22 Broadcom Corporation Method and system for configurable antenna in an integrated circuit package
US8363189B2 (en) 2007-12-18 2013-01-29 Rockwell Collins, Inc. Alkali silicate glass for displays
US20090227205A1 (en) 2008-03-04 2009-09-10 Broadcom Corporation Inductively coupled integrated circuit with multiple access protocol and methods for use therewith
TWI370530B (en) 2008-05-21 2012-08-11 Advanced Semiconductor Eng Semiconductor package having an antenna
US8384596B2 (en) 2008-06-19 2013-02-26 Broadcom Corporation Method and system for inter-chip communication via integrated circuit package antennas
US8274147B2 (en) 2008-06-19 2012-09-25 Broadcom Corporation Method and system for intra-printed circuit board communication via waveguides
US7943404B2 (en) 2008-08-07 2011-05-17 International Business Machines Corporation Integrated millimeter wave antenna and transceiver on a substrate
US8148813B2 (en) 2009-07-31 2012-04-03 Altera Corporation Integrated circuit package architecture
US20110316139A1 (en) 2010-06-23 2011-12-29 Broadcom Corporation Package for a wireless enabled integrated circuit
US20120086114A1 (en) 2010-10-07 2012-04-12 Broadcom Corporation Millimeter devices on an integrated circuit
US8901945B2 (en) 2011-02-23 2014-12-02 Broadcom Corporation Test board for use with devices having wirelessly enabled functional blocks and method of using same
US8928139B2 (en) 2011-09-30 2015-01-06 Broadcom Corporation Device having wirelessly enabled functional blocks

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