CN103035628B - 具有无线激活功能块的装置 - Google Patents

具有无线激活功能块的装置 Download PDF

Info

Publication number
CN103035628B
CN103035628B CN201210365294.9A CN201210365294A CN103035628B CN 103035628 B CN103035628 B CN 103035628B CN 201210365294 A CN201210365294 A CN 201210365294A CN 103035628 B CN103035628 B CN 103035628B
Authority
CN
China
Prior art keywords
substrate
functional block
activating functional
wirelessly activating
ground loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201210365294.9A
Other languages
English (en)
Other versions
CN103035628A (zh
Inventor
赵子群
迈克尔·布尔斯
艾哈迈德礼萨·罗福加兰
阿里亚·贝赫扎德
热苏斯·阿方索·卡斯坦德达
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies General IP Singapore Pte Ltd
Original Assignee
Zyray Wireless Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zyray Wireless Inc filed Critical Zyray Wireless Inc
Publication of CN103035628A publication Critical patent/CN103035628A/zh
Application granted granted Critical
Publication of CN103035628B publication Critical patent/CN103035628B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

本发明涉及具有无线激活功能块的装置，其中所述的实施方式提供了改进的集成电路（IC）装置。在实施方式中，IC装置包括：基板；耦接至基板表面的IC芯片；位于IC芯片上的第一无线激活功能块，该第一无线激活功能块被配置为与位于基板上的第二无线激活功能块进行无线通信；以及接地环，被配置用于为第一和第二无线激活功能块提供电磁屏蔽。

Description

具有无线激活功能块的装置
技术领域
本发明总体上涉及集成电路（IC）装置，更具体地涉及有关IC装置的通信。
背景技术
集成电路（IC）装置通常包括密封在封装中的IC芯片。该IC装置可耦接至印刷电路板（PCB），以激活IC装置和耦接至PCB的其他装置之间的通信。例如，在阵列型封装中，IC芯片通常耦接至基板，该基板耦接至一组连接元件，例如，一组焊球。该组连接元件然后物理地耦接至PCB。
IC芯片可以各种方式耦接至基板。例如，在芯片下倒装芯片封装中，可使用焊接凸点，以将IC芯片表面上的接触垫耦接至位于基板上的接触垫。在另一个实例中，可使用配线结合，以将IC芯片表面上的接触垫耦接至位于基板上的指形焊点（bond finger）。
然而，将IC芯片耦接至基板的传统方式的成本较高。例如，用于形成配线结合的材料，例如，金，可能比较贵，从而增加了整个装置的成本。此外，将IC芯片耦接至基板的传统方式也易受制造缺陷的影响。例如，配线结合和/或焊接凸点在制造和装配过程中可能会破裂或被损坏，减少IC装置的产量。
此外，耦接不同的IC装置的传统方式还具有缺点。例如，当使用PCB将IC装置耦接在一起时，用于将IC装置耦接至PCB的元件在制造或现场应用期间可能破裂或被损坏。此外，IC装置内部或IC装置和其他装置（例如，通过PCB）之间的大部分通信易受电磁干扰的影响。该干扰的存在将影响通信的保真度，从而极大地妨碍整个系统的性能。
发明内容
本发明提供了一种集成电路装置，包括：基板；集成电路芯片，耦接至基板的表面；第一无线激活功能块，位于集成电路芯片上，其中，第一无线激活功能块被配置为与位于基板上的第二无线激活功能块进行无线通信；以及接地环，被配置用于为第一无线激活功能块和第二无线激活功能块提供电磁屏蔽。
优选地，接地环位于基板的表面上。
优选地，接地环包括形成在基板的表面上的金属迹线。
优选地，该集成电路装置还包括：第二接地环，形成在基板的表面上，其中，第二接地环包括形成在基板的表面上的第二迹线。
优选地，该集成电路装置被配置为耦接至印刷电路板，并且其中，接地环耦接至印刷电路板。
优选地，接地环包括柔性材料。
优选地，该集成电路装置还包括耦接构件，其被配置为将接地环耦接至基板。
优选地，耦接构件被配置为允许基板独立于接地环而移动。
优选地，该集成电路装置还包括位于基板的表面上的第二接地环。
优选地，该集成电路装置被配置为耦接至印刷电路板表面，集成电路装置还包括：第三无线激活功能块，位于基板的第二表面上，基板的第二表面与基板的第一表面相反，其中，第三无线激活功能块被配置为与位于印刷电路板的表面上的第四无线激活功能块进行无线通信。
优选地，接地环被配置用于为第三无线激活功能块和第四无线激活功能块提供电磁屏蔽。
优选地，该集成电路装置还包括耦接至基板的第二表面的焊球，其被配置为耦接至印刷电路板的表面。
本发明还提供了一种装配集成电路装置的方法，包括：在集成电路芯片的表面上形成第一无线激活功能块；在基板的表面上形成第二无线激活功能块，其中，第二无线激活功能块被配置为与第一无线激活功能块进行无线通信；将集成电路芯片耦接至基板；以及设置接地环，接地环被配置用于为第一无线激活功能块和第二无线激活功能块提供电磁屏蔽。
优选地，该设置包括：在基板的表面上形成金属迹线。
优选地，该方法还包括：设置第二接地环，第二接地环被配置用于为第一无线激活功能块和第二无线激活功能块提供电磁屏蔽。
优选地，该集成电路装置被配置为耦接至印刷电路板，并且其中，设置包括将接地环耦接至印刷电路板。
优选地，该方法还包括：形成耦接构件，耦接构件被配置为将接地环耦接至基板。
优选地，耦接构件被配置为允许基板独立于接地环而移动。
优选地，该集成电路装置被配置为耦接至印刷电路板的表面，方法还包括：在基板的第二表面上形成第三无线激活功能块，基板的第二表面与基板的第一表面相反，其中，第三无线激活功能块被配置为与位于印刷电路板的表面上的第四无线激活功能块进行无线通信。
优选地，接地环被配置用于为第三无线激活功能块提供电磁屏蔽。
附图说明
包含于此并形成本说明书的一部分的附示图出本发明，并且与说明一起，用于进一步解释本发明的原理并使本领域技术人员制造和使用本发明。
图1是传统的芯片下（die down）球栅阵列封装的截面图。
图2是根据本发明实施方式的具有位于基板上的接地环的IC装置的截面图。
图3是根据本发明实施方式的无线激活功能块的示图。
图4至图6是根据本发明实施方式的具有耦接至印刷电路板的接地环的IC装置的截面图。
图7是根据本发明实施方式的用于装配IC装置的示例性步骤的流程图。
将参考附图对本发明进行说明。在附图中，相似的参考标号表示相同的或功能相似的元件。此外，参考标号的最左边数字表示该参考标号首次出现的图。
具体实施方式
在本说明书中对“一个实施方式”、“实施方式”、“示例性实施方式”等的参考表示所述的实施方式可包括特定的特征、结构或特性，但并不是每个实施方式均必须包括该特定特征、结构或特性。此外，此类词组不一定需要指相同的实施方式。此外，当结合实施方式来说明特定特征、结构或特性时，本领域技术人员应当了解，应结合无论是否清楚说明的其他实施方式来实现此类特征、结构或特性。
此外，应当理解，此处使用的空间说明（例如“上方”、“下方”、“左”、“右”、“上”、“下”、“顶部”、“底部”等）仅用于示例的目的，并且此处说明的结构的实际实现方式可以任何的方向或以任何方式进行空间布置。
传统封装
图1示出了传统的芯片下球栅阵列（BGA）封装100的截面图。BGA封装100包括通过焊接凸点130耦接至基板120的上表面125的IC芯片110。BGA封装100是芯片下封装，其中芯片110的有源表面115面向基板120。另一方面，在芯片上封装中，芯片的有源表面背向基板。
有源表面115通常包括电力和接地分布轨迹和输入/输出接触垫。多个焊接凸点130可在倒装芯片110的有源表面115上分布，以各自连接倒装芯片110至基板120。如图1示出，焊接掩模190包围焊接凸点130所位于的区域。
在图1示出的传统布置中，通孔140在基板120的上表面125将焊接凸点130、迹线和/或通孔垫150连接至基板120底面的焊球180。如图1示出，基板120可包括凸起垫160和球垫170。凸起垫160在基板120的上表面125连接至焊接凸点130。球垫170在基板120的下表面连接至焊球180。焊球180可将倒装芯片BGA封装100电连接至具有导电连接的任何适当的表面，如PCB。
本发明的示例性实施方式
在此处说明的实施方式中，提供了一种IC装置，其包括无线激活功能块。该无线激活功能块可用于在IC芯片和基板之间通信信号。此外、或可选地，无线激活功能块可用于在基板和印刷电路板（PCB）之间通信信号。在实施方式中，还可设置接地环为无线激活功能块提供电磁屏蔽。由于无线激活功能块之间的无线通信尤其易受电磁干扰的影响，为了无线激活功能块之间通信的保真度而设置的接地环是非常有用的。
图2示出了根据本发明实施方式的耦接至印刷电路板（PCB）250的IC装置200的截面图。IC装置200包括通过粘合剂206耦接至基板204的IC芯片202。IC芯片202具有多个第一无线激活功能块220和形成在表面208上的接触垫207。基板204具有分别形成在表面210和212上的多个第二和第三无线激活功能块230和240。基板204还具有分别形成在表面210和212上的焊接凸点209和焊球211。PCB250具有形成于其上的多个第四无线激活功能块260和焊球218。第一和第二接地环214和216形成在基板204的表面210上。
粘合剂206将IC芯片202附接至基板204。在实施方式中，粘合剂206是不导电的环氧树脂。
如图2示出，IC芯片202均欧姆地且无线地耦接至基板204。具体地，IC芯片202的接触垫207物理地耦接至基板204的焊接凸点209。此外，多个第一无线激活功能块220被配置为与多个第二无线激活功能块230进行无线通信。相似地，基板204均欧姆地且无线地耦接至PCB250。特别地，基板204的表面212物理连接至焊球218，基板204通过焊球218耦接至PCB250。附加地，多个第三无线激活功能块240被配置为与位于PCB250上的多个第四无线激活功能块260进行无线通信。在实施方式中，诸如FDMA、TDMA或CDMA的接入技术可由该无线激活功能块使用，以使不同的多个第一、第二、第三和第四无线激活功能块220、230、240和260相互之间不干扰。以下将参考图3更详细地说明多个第一、第二、第三和第四无线激活功能块220、230、240和260的结构。
与IC芯片202、基板204和PCB250之间的所有通信相同，多个第一、第二、第三和第四无线激活功能块220、230、240和260之间的通信易受来自IC装置200外部的电磁干扰的影响。然而多个第一、第二、第三和第四无线激活功能块220、230、240和260之间的通信尤其易受干扰的影响，因为此类通信是无线的。由此，电磁干扰能严重的损坏多个不同的无线激活功能块之间的通信的保真度。
为减少电磁干扰，接地环214和216设置于IC装置200，如图2中所示。接地环214和216可形成为基板204表面210上的金属迹线并且可通过基板204（例如，通过基板204的接地平面）耦接至地电位。在实施方式中，接地环214和216可由诸如铜、金、镍金合金、银或其他金属的导电金属形成。在操作中，接地环214和216用作法拉第笼，其防止电磁波进入一个或多个第一、第二、第三和第四无线激活功能块220、230、240和260之间的空间。此外，接地环214和216也可用作IC装置200的部件的共同接地。例如，接地环214和216可用作多个第一、第二、第三和第四无线激活功能块220、230、240和260的共同接地。
在实施方式中，接地环214和216可构造为柔性的。例如，可较薄地形成接地环214和216，例如，其厚度与形成在基板204上的通常的迹线的厚度相同或更小，并且可从诸如金属的柔性或可塑性材料中制成。在这种情况下，当弯曲或按压IC装置200时，接地环214和216不在基板204上施加额外的压力，从而减少了基板204将破裂或被损坏的可能性。
如图2示出，IC装置包括两个接地环，即，接地环214和216。根据以上说明，对本领域技术人员显而易见的是，只要不违背本发明的范围和精神，IC装置200可包括与接地环214和216相似的任何数量的接地环（例如，一个、三个或多于三个）。
图3示出了根据本发明实施方式的无线激活功能块300的示图。无线激活功能块300包括天线302和通孔304a和304b（统称为“304”），其通向（馈给）天线302。一个或多个第一、第二、第三和第四无线激活功能块220、230、240和260可以与无线激活功能块300相似的方式执行。在实施方式中，至少一个通孔304是硅通孔（例如，在无线激活功能块300形成在IC芯片202的表面上的实施方式中）。
如图3示出，天线302是偶极天线。根据需要，可使用其他天线配置。在实施方式中，天线302可由金属迹线或平面形成。例如，可使用IC芯片202或基板204上的迹线形成偶极天线302。天线302可被配置为在某个频率范围内进行操作（例如，通过调节天线302的尺寸）。在其他实施方式中，天线302可以是其他类型的天线。例如，天线302可以是具有方形或矩形形状的贴片天线。
通孔304可用于使用单端信号或差分信号驱动天线或从天线接收单端信号或差分信号。例如，通孔304a可耦接至信号平面（例如，通过一个或多个接地环214和216的地平面）并且通孔304b可耦接至电路块或提供单端信号的其他元件。可选地，每个通孔304可耦接至电路块或提供差分信号的分量的其他元件。
如图3示出，无线激活功能块300可选地包括收发器306。在此实施方式中，天线302由收发器306馈给。收发器306可使用芯片的通孔、基板或PCB耦接至信号平面。在实施方式中，收发器306也耦接至电路块或PCB的一部分（例如，通过基板）。收发器306可配置为传送从电路块或PCB接收到的信号和/或传递接收到的信号至电路块或PCB。在另一个实施方式中，收发器306可具有附加功能。例如，收发器306可能够执行信号处理任务，如调制和解调以及允许使用以上提到的多路接入。
图4示出了根据本发明实施方式的耦接至PCB250的IC装置400的截面图。IC装置400基本与IC装置200相似，除了IC装置400不包括接地环214和216。作为替代，接地环402设置于PCB250上。接地环402与接地环214和216相似，可保持地电位并且从而可作为法拉第笼进行操作，从而提供电磁屏蔽。然而与接地环214和216不同，接地环402为多个第三和第四无线激活功能块240和260提供电磁屏蔽，而且也为多个第一和第二无线激活功能块220和230提供电磁屏蔽。在实施方式中，接地环402可通过形成在PCB250上的一个或多个迹线获取地电位。
如图4示出，接地环402与基板204物理地分开。由此，当弯曲或按压基板204时，接地环402不在基板上施加额外的压力。在实施方式中，接地环402可由柔性材料形成，以防止在接地环402上施加压力时其破裂或损坏。
图5示出了根据本发明实施方式的耦接至PCB250的IC装置500的截面图。IC装置500基本与IC装置400相似，除了IC装置500还附加地包括耦接构件502。耦接构件502将基板204耦接至接地环402。在实施方式中，耦接构件502可由导电材料形成，例如，铜。在另一个实施方式中，耦接构件502将接地环402电耦接至基板204。从而，接地环402可从基板204获得地电位。
此外，耦接构件502可被配置为允许基板204和接地环402独立运动。例如，耦接构件502可由允许基板204相对于接地环402滑动的金属或其他材料制成。因此，当弯曲或按压IC装置500时，可以使用耦接构件502以确保接地环402不在基板204上施加附加的压力。在另一实施方式中，接地环402可由柔性或可塑性材料中制成，以进一步减少将施加于基板204的任何压力。
图6示出了根据本发明实施方式的耦接至PCB250的IC装置600的截面图。IC装置600基本与IC装置500相似，除了IC装置600还附加地包括第二接地环602。第二接地环602可基本与参考图2说明的接地环214和216相似。第二接地环602可提供对电磁干扰的附加屏蔽。对本领域技术人员显而易见的是，只要不违背本发明的范围和精神，IC装置600可包括与接地环602相似的任何数量的接地环。
图7示出了根据本发明实施方式的提供用于装配IC装置的示例性步骤的流程图700。根据以下讨论，其他结构性或操作性的实施方式将对本领域的技术人员显而易见。图7中示出的步骤不一定要按以下示出的顺序发生。以下详细说明了图7的步骤。
在步骤702中，在IC芯片的表面上形成多个第一无线激活功能块。例如，在图2中，可在IC芯片202的表面208上形成第一无线激活功能块220。
在步骤704中，在基板的表面上形成第二无线激活功能块。例如，在图2中，可在基板204的表面210上形成多个第二无线激活功能块230。在另一实施方式中，可在基板的另一表面上形成第三无线激活功能块。例如，在图2中，可在基板204的表面212上形成多个第三无线激活功能块240。在实施方式中，一个或多个第一、第二、第三无线激活功能块可形成为以参考如上图3说明的迹线和通孔的组合。例如，通过将迹线耦接至收发器以形成能在其他任务中执行信号处理的无线激活功能块，可提供附加的功能。
在可选步骤706中，在基板上形成耦接构件。例如，在图5中，可在基板204上形成耦接构件502。耦接构件502可被配置为将基板204耦接至接地环402。在另一实施方式中，耦接构件502可被配置为通过允许基板204相对于接地环402滑动来允许基板204独立于接地环402而移动。
在步骤708中，该IC芯片耦接至基板。例如，在图2中，IC芯片202使用粘合剂206耦接至基板204。
在步骤710中，设置接地环，其被配置为提供电磁屏蔽。例如，在图2中，在基板204上设置接地环214和216。在另一实施方式中，在图3中，在PCB250上设置接地环402。如以上所述，接地环214、216和402被配置用于为多个第一、第二、第三和第四无线激活功能块220、230、240和260提供电磁屏蔽。
结论
以上已借助于示出具体功能的实现及其关系的功能构造块说明了本发明的实施方式。此类功能构造块的边界在此是任意定义的，以方便说明。只要适当地执行特定的功能及其关系，也可定义其他边界。
前述具体实施方式的说明已充分地示出了本发明的一般特征，在没有过度实验并且在不违背本发明的总体概念的情况下，其他人员可通过运用本技术领域中的知识，对此类具体实施方式进行修改和/或适用于各种应用。因而，根据此处呈现的教导和指导，此类使用和修改应在公开的实施方式的等效的含义和范围内。应当理解，此处的措辞和术语是用于说明而非限制，从而本领域技术人员根据这些教导和指导能理解本说明书中的术语或措辞。
本发明的外延和范围不应限于任何以上说明的示例性实施方式，而应仅根据所附的权利要求和它们的等同物来限定。

Claims (8)

1.一种集成电路装置，包括：
基板，具有第一表面、第二表面和第三表面，所述第一表面与所述第二表面相反，而且所述第三表面与所述第一表面正交；
集成电路芯片，耦接至所述基板的第一表面；
第一无线激活功能块，位于所述集成电路芯片上；
第二无线激活功能块，位于所述基板的所述第一表面上，其中，所述第一无线激活功能块被配置为与位于所述基板上的第二无线激活功能块进行无线通信；以及
接地环，被配置用于为所述第一无线激活功能块和所述第二无线激活功能块提供电磁屏蔽；以及
耦接构件，接至所述基板的所述第三表面和所述接地环。
2.根据权利要求1所述的集成电路装置，还包括第二接地环，位于所述基板的所述第一表面上。
3.根据权利要求2所述的集成电路装置，其中，所述第二接地环包括形成在所述基板的所述第一表面上的金属迹线。
4.根据权利要求1所述的集成电路装置，其中，所述集成电路装置被配置为耦接至印刷电路板，并且其中，所述接地环耦接至所述印刷电路板。
5.根据权利要求4所述的集成电路装置，其中，所述耦接构件，将所述接地环电耦接至所述基板。
6.根据权利要求4所述的集成电路装置，其中，所述基板能相对于所述接地环滑动。
7.根据权利要求1所述的集成电路装置，还包括：
印刷电路板，其中所述基板被配置为耦接到所述印刷电路板的一个表面；
第三无线激活功能块，位于所述基板的第二表面上；以及
第四无线激活功能块，位于所述印刷电路板上，其中，所述第三无线激活功能块被配置为与所述第四无线激活功能块进行无线通信。
8.根据权利要求7所述的集成电路装置，其中，所述接地环被配置用于为所述第三无线激活功能块和所述第四无线激活功能块提供电磁屏蔽。
CN201210365294.9A 2011-09-30 2012-09-26 具有无线激活功能块的装置 Active CN103035628B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/249,885 US8928139B2 (en) 2011-09-30 2011-09-30 Device having wirelessly enabled functional blocks
US13/249,885 2011-09-30

Publications (2)

Publication Number Publication Date
CN103035628A CN103035628A (zh) 2013-04-10
CN103035628B true CN103035628B (zh) 2015-10-07

Family

ID=46796217

Family Applications (2)

Application Number Title Priority Date Filing Date
CN2012204981949U Expired - Fee Related CN203071061U (zh) 2011-09-30 2012-09-26 集成电路装置
CN201210365294.9A Active CN103035628B (zh) 2011-09-30 2012-09-26 具有无线激活功能块的装置

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN2012204981949U Expired - Fee Related CN203071061U (zh) 2011-09-30 2012-09-26 集成电路装置

Country Status (6)

Country Link
US (1) US8928139B2 (zh)
EP (1) EP2575416B1 (zh)
KR (1) KR101425460B1 (zh)
CN (2) CN203071061U (zh)
HK (1) HK1180109A1 (zh)
TW (1) TWI566371B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8901945B2 (en) 2011-02-23 2014-12-02 Broadcom Corporation Test board for use with devices having wirelessly enabled functional blocks and method of using same
US8928139B2 (en) 2011-09-30 2015-01-06 Broadcom Corporation Device having wirelessly enabled functional blocks
CN214960295U (zh) * 2018-08-22 2021-11-30 株式会社村田制作所 传输线路基板以及传输线路基板的接合构造
US11088108B2 (en) * 2019-06-27 2021-08-10 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure including ring-like structure and method for forming the same
WO2022065994A1 (en) 2020-09-28 2022-03-31 Samsung Electronics Co., Ltd. Non-galvanic interconnect for planar rf devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916719B1 (en) * 1993-06-24 2005-07-12 Thomas F. Knight Method and apparatus for non-conductively interconnecting integrated circuits
CN101578616A (zh) * 2007-07-17 2009-11-11 株式会社村田制作所 无线ic器件及电子设备
CN203071061U (zh) * 2011-09-30 2013-07-17 美国博通公司 集成电路装置

Family Cites Families (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2727227B1 (fr) 1994-11-17 1996-12-20 Schlumberger Ind Sa Dispositif de securite actif a memoire electronique
JP3378435B2 (ja) 1995-09-29 2003-02-17 株式会社東芝 超高周波帯無線通信装置
FR2765399B1 (fr) 1997-06-27 2001-12-07 Sgs Thomson Microelectronics Dispositif semi-conducteur a moyen d'echanges a distance
FR2769110B1 (fr) 1997-09-26 1999-12-03 Gemplus Card Int Procede de fabrication d'un module ou etiquette electronique, module ou etiquette obtenue et support comportant un tel module ou etiquette
EP0932200A3 (en) 1998-01-22 2000-08-23 International Business Machines Corporation Heat sink device for microprocessor
EP0978729A3 (en) 1998-08-07 2002-03-20 Hitachi, Ltd. High-frequency transmitter-receiving apparatus for such an application as vehicle-onboard radar system
US6542720B1 (en) 1999-03-01 2003-04-01 Micron Technology, Inc. Microelectronic devices, methods of operating microelectronic devices, and methods of providing microelectronic devices
JP3675688B2 (ja) 2000-01-27 2005-07-27 寛治 大塚 配線基板及びその製造方法
EP1126522A1 (en) * 2000-02-18 2001-08-22 Alcatel Packaged integrated circuit with radio frequency antenna
JP4848108B2 (ja) 2001-09-14 2011-12-28 インターナショナル・ビジネス・マシーンズ・コーポレーション データ処理システム
US6885090B2 (en) 2001-11-28 2005-04-26 North Carolina State University Inductively coupled electrical connectors
US6670692B1 (en) 2002-10-09 2003-12-30 Silicon Integrated Systems Corp. Semiconductor chip with partially embedded decoupling capacitors
US7095620B2 (en) 2002-11-27 2006-08-22 International Business Machines Corp. Optically connectable circuit board with optical component(s) mounted thereon
US20050075080A1 (en) 2003-10-03 2005-04-07 Nanyang Technological University Inter-chip and intra-chip wireless communications systems
EP1761799A2 (en) 2004-04-12 2007-03-14 Ghz Tr Corporation Method and apparatus for automotive radar sensor
US7525199B1 (en) 2004-05-21 2009-04-28 Sun Microsystems, Inc Packaging for proximity communication positioned integrated circuits
DE102004059333A1 (de) 2004-12-09 2006-06-14 Robert Bosch Gmbh Antennenanordnung für einen Radar-Transceiver
DE102004063541A1 (de) 2004-12-30 2006-07-13 Robert Bosch Gmbh Antennenanordnung für einen Radar-Transceiver
US7502965B2 (en) 2005-02-07 2009-03-10 Broadcom Corporation Computer chip set having on board wireless interfaces to support test operations
US7479841B2 (en) 2005-02-15 2009-01-20 Northrop Grumman Corporation Transmission line to waveguide interconnect and method of forming same including a heat spreader
US20060285480A1 (en) 2005-06-21 2006-12-21 Janofsky Eric B Wireless local area network communications module and integrated chip package
US8220145B2 (en) * 2007-06-27 2012-07-17 Rf Micro Devices, Inc. Isolated conformal shielding
US20070065984A1 (en) 2005-09-22 2007-03-22 Lau Daniel K Thermal enhanced package for block mold assembly
US7405477B1 (en) * 2005-12-01 2008-07-29 Altera Corporation Ball grid array package-to-board interconnect co-design apparatus
EP1967876A4 (en) 2005-12-27 2013-04-17 Ibiden Co Ltd OPTICAL AND ELECTRICAL COMPOSITE WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
WO2007101345A1 (en) 2006-03-07 2007-09-13 Scanimetrics Inc. Method and apparatus for interrogating an electronic component
US7692295B2 (en) 2006-03-31 2010-04-06 Intel Corporation Single package wireless communication device
EP2012258B2 (en) 2006-04-26 2014-10-22 Murata Manufacturing Co. Ltd. Article provided with electromagnetically coupled module
KR100691632B1 (ko) 2006-05-16 2007-03-12 삼성전기주식회사 반도체칩, 반도체칩의 제조방법 및 반도체칩 패키지
US8102665B2 (en) 2006-06-21 2012-01-24 Broadcom Corporation Integrated circuit with intra-chip clock interface and methods for use therewith
US20080122726A1 (en) 2006-11-27 2008-05-29 Gil Levi Low cost chip package with integrated RFantenna
US8032089B2 (en) 2006-12-30 2011-10-04 Broadcom Corporation Integrated circuit/printed circuit board substrate structure and communications
US7974587B2 (en) 2006-12-30 2011-07-05 Broadcom Corporation Local wireless communications within a device
US8207901B2 (en) 2007-01-29 2012-06-26 Agency For Science, Technology And Research Antenna for underwater communications
US8116294B2 (en) 2007-01-31 2012-02-14 Broadcom Corporation RF bus controller
US8164167B2 (en) 2007-03-09 2012-04-24 Nanyang Technological University Integrated circuit structure and a method of forming the same
US20080237843A1 (en) 2007-03-27 2008-10-02 Ashish Gupta Microelectronic package including thermally conductive sealant between heat spreader and substrate
JP5049039B2 (ja) 2007-03-30 2012-10-17 株式会社バッファロー モジュール装着システム、モジュール、マザーボード及びモジュールの制御方法
US7868841B2 (en) 2007-04-11 2011-01-11 Vubiq Incorporated Full-wave di-patch antenna
WO2008136226A1 (ja) 2007-04-26 2008-11-13 Murata Manufacturing Co., Ltd. 無線ｉｃデバイス
US7899407B2 (en) 2007-05-01 2011-03-01 Broadcom Corporation High frequency signal combining
CN101308950A (zh) 2007-05-18 2008-11-19 英资莱尔德无线通信技术（北京）有限公司 天线装置
US7868445B2 (en) 2007-06-25 2011-01-11 Epic Technologies, Inc. Integrated structures and methods of fabrication thereof with fan-out metallization on a chips-first chip layer
US20090006675A1 (en) 2007-06-28 2009-01-01 Broadcom Corporation Universal Serial Bus Dongle Device with Millimeter Wave Transceiver and System for use Therewith
US7651889B2 (en) * 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
US7911388B2 (en) 2007-12-12 2011-03-22 Broadcom Corporation Method and system for configurable antenna in an integrated circuit package
US8363189B2 (en) 2007-12-18 2013-01-29 Rockwell Collins, Inc. Alkali silicate glass for displays
US20090227205A1 (en) 2008-03-04 2009-09-10 Broadcom Corporation Inductively coupled integrated circuit with multiple access protocol and methods for use therewith
TWI370530B (en) 2008-05-21 2012-08-11 Advanced Semiconductor Eng Semiconductor package having an antenna
US8384596B2 (en) 2008-06-19 2013-02-26 Broadcom Corporation Method and system for inter-chip communication via integrated circuit package antennas
US8274147B2 (en) 2008-06-19 2012-09-25 Broadcom Corporation Method and system for intra-printed circuit board communication via waveguides
US7943404B2 (en) 2008-08-07 2011-05-17 International Business Machines Corporation Integrated millimeter wave antenna and transceiver on a substrate
US8148813B2 (en) 2009-07-31 2012-04-03 Altera Corporation Integrated circuit package architecture
US20110316139A1 (en) 2010-06-23 2011-12-29 Broadcom Corporation Package for a wireless enabled integrated circuit
US20120086114A1 (en) 2010-10-07 2012-04-12 Broadcom Corporation Millimeter devices on an integrated circuit
US8901945B2 (en) 2011-02-23 2014-12-02 Broadcom Corporation Test board for use with devices having wirelessly enabled functional blocks and method of using same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916719B1 (en) * 1993-06-24 2005-07-12 Thomas F. Knight Method and apparatus for non-conductively interconnecting integrated circuits
CN101578616A (zh) * 2007-07-17 2009-11-11 株式会社村田制作所 无线ic器件及电子设备
CN203071061U (zh) * 2011-09-30 2013-07-17 美国博通公司 集成电路装置

Also Published As

Publication number Publication date
HK1180109A1 (zh) 2013-10-11
KR20130035893A (ko) 2013-04-09
CN203071061U (zh) 2013-07-17
TW201318143A (zh) 2013-05-01
EP2575416A1 (en) 2013-04-03
CN103035628A (zh) 2013-04-10
US8928139B2 (en) 2015-01-06
TWI566371B (zh) 2017-01-11
EP2575416B1 (en) 2014-12-10
KR101425460B1 (ko) 2014-08-01
US20130082363A1 (en) 2013-04-04

Similar Documents

Publication Publication Date Title
CN102446906B (zh) 集成电路器件及其制造方法
CN103035628B (zh) 具有无线激活功能块的装置
US7745943B2 (en) Microelectonic packages and methods therefor
US7911066B2 (en) Through-chip via interconnects for stacked integrated circuit structures
US8008785B2 (en) Microelectronic assembly with joined bond elements having lowered inductance
US20080185708A1 (en) Stackable semiconductor package having metal pin within through hole of package
CN103237412B (zh) 一种电子件安装结构及制作方法、电子件产品
TWI557854B (zh) 整合式毫米波晶片封裝結構
US20100187686A1 (en) Semiconductor package comprising alignment memers
JP5803345B2 (ja) 半導体チップの製造方法、回路実装体及びその製造方法
EP2400545A2 (en) Package for a wireless enabled integrated circuit
KR101565690B1 (ko) 회로기판, 회로기판 제조방법, 전자부품 패키지 및 전자부품 패키지 제조방법
US9704812B1 (en) Double-sided electronic package
CN104183577A (zh) 具有压接互连的柔性基板
US20130285239A1 (en) Chip assembly and chip assembling method
US20110147928A1 (en) Microelectronic assembly with bond elements having lowered inductance
KR20070053660A (ko) 집적 회로 칩의 단일 열 결합 패드 배열체
KR20170105796A (ko) 반도체 디바이스
KR100973268B1 (ko) 인쇄회로기판 및 그의 제조방법
CN112447690B (zh) 天线置顶的半导体封装结构
JP2015198197A (ja) 無線モジュール及び無線モジュールの製造方法
CN113838824A (zh) 功率放大器芯片

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
REG Reference to a national code

Ref country code: HK

Ref legal event code: DE

Ref document number: 1180109

Country of ref document: HK

C14 Grant of patent or utility model
GR01 Patent grant
REG Reference to a national code

Ref country code: HK

Ref legal event code: GR

Ref document number: 1180109

Country of ref document: HK

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20170307

Address after: Singapore Singapore

Patentee after: Avago Technologies Fiber IP Singapore Pte. Ltd.

Address before: American California

Patentee before: Zyray Wireless Inc.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20181022

Address after: Singapore Singapore

Patentee after: Annwa high tech Limited by Share Ltd

Address before: Singapore Singapore

Patentee before: Avago Technologies Fiber IP Singapore Pte. Ltd.