TW201117294A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
TW201117294A
TW201117294A TW099104320A TW99104320A TW201117294A TW 201117294 A TW201117294 A TW 201117294A TW 099104320 A TW099104320 A TW 099104320A TW 99104320 A TW99104320 A TW 99104320A TW 201117294 A TW201117294 A TW 201117294A
Authority
TW
Taiwan
Prior art keywords
layer
nitriding
group
compound semiconductor
semiconductor layer
Prior art date
Application number
TW099104320A
Other languages
English (en)
Chinese (zh)
Inventor
Shinichi Takagi
Mitsuru Takenaka
Takuya Hoshii
Original Assignee
Univ Tokyo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Tokyo filed Critical Univ Tokyo
Publication of TW201117294A publication Critical patent/TW201117294A/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Optics & Photonics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
TW099104320A 2009-11-10 2010-02-11 Semiconductor device and manufacturing method thereof TW201117294A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009256756A JP5499319B2 (ja) 2009-11-10 2009-11-10 半導体デバイス及びその製造方法

Publications (1)

Publication Number Publication Date
TW201117294A true TW201117294A (en) 2011-05-16

Family

ID=44193549

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099104320A TW201117294A (en) 2009-11-10 2010-02-11 Semiconductor device and manufacturing method thereof

Country Status (3)

Country Link
JP (1) JP5499319B2 (ja)
KR (1) KR20110052417A (ja)
TW (1) TW201117294A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9685514B2 (en) 2012-05-09 2017-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. III-V compound semiconductor device having dopant layer and method of making the same

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013165144A (ja) * 2012-02-10 2013-08-22 Nippon Telegr & Teleph Corp <Ntt> Ｍｏｓ構造の製造方法
JP2013207020A (ja) * 2012-03-28 2013-10-07 Nippon Telegr & Teleph Corp <Ntt> 電界効果トランジスタおよびその製造方法
JP6162388B2 (ja) * 2012-11-14 2017-07-12 新日本無線株式会社 炭化珪素半導体装置の製造方法
JP2014232788A (ja) * 2013-05-29 2014-12-11 豊田合成株式会社 電極、ｍｉｓ型半導体装置および電極の製造方法
US9515186B2 (en) 2014-01-23 2016-12-06 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
JP2016054250A (ja) * 2014-09-04 2016-04-14 豊田合成株式会社 半導体装置、製造方法、方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01189960A (ja) * 1988-01-26 1989-07-31 Toshiba Corp 化合物半導体装置の製造方法
JP2770544B2 (ja) * 1990-03-23 1998-07-02 松下電器産業株式会社 Ｍｉｓ型半導体装置の製造方法
JP3189291B2 (ja) * 1991-04-05 2001-07-16 株式会社村田製作所 半導体装置の製造方法
JPH06244409A (ja) * 1993-02-12 1994-09-02 Sony Corp 化合物半導体基板の前処理方法
JPH08340105A (ja) * 1995-06-12 1996-12-24 Hitachi Ltd 半導体装置およびその製造方法
JP2003273130A (ja) * 2002-03-15 2003-09-26 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2004214530A (ja) * 2003-01-08 2004-07-29 Nippon Telegr & Teleph Corp <Ntt> Ｍｉｓ型化合物半導体装置の製造方法
US7002224B2 (en) * 2004-02-03 2006-02-21 Infineon Technologies Ag Transistor with doped gate dielectric
JP2009032796A (ja) * 2007-07-25 2009-02-12 Rohm Co Ltd 窒化物半導体素子および窒化物半導体素子の製造方法
US20100244206A1 (en) * 2009-03-31 2010-09-30 International Business Machines Corporation Method and structure for threshold voltage control and drive current improvement for high-k metal gate transistors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9685514B2 (en) 2012-05-09 2017-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. III-V compound semiconductor device having dopant layer and method of making the same

Also Published As

Publication number Publication date
KR20110052417A (ko) 2011-05-18
JP5499319B2 (ja) 2014-05-21
JP2011103318A (ja) 2011-05-26

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