TW200921860A - Semiconductor package - Google Patents

Semiconductor package Download PDF

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Publication number
TW200921860A
TW200921860A TW097142608A TW97142608A TW200921860A TW 200921860 A TW200921860 A TW 200921860A TW 097142608 A TW097142608 A TW 097142608A TW 97142608 A TW97142608 A TW 97142608A TW 200921860 A TW200921860 A TW 200921860A
Authority
TW
Taiwan
Prior art keywords
cavity
substrate
electronic device
semiconductor package
wafer
Prior art date
Application number
TW097142608A
Other languages
English (en)
Chinese (zh)
Inventor
Akinori Shiraishi
Kei Murayama
Yuichi Taguchi
Masahiro Sunohara
Mitsutoshi Higashi
Original Assignee
Shinko Electric Ind Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of TW200921860A publication Critical patent/TW200921860A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/811—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
    • B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/01—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS
    • B81B2207/012—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS the micromechanical device and the control or processing electronics being separate parts in the same package
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/03—Bonding two components
    • B81C2203/031—Anodic bondings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Light Receiving Elements (AREA)
TW097142608A 2007-11-06 2008-11-05 Semiconductor package TW200921860A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007288907A JP4912275B2 (ja) 2007-11-06 2007-11-06 半導体パッケージ

Publications (1)

Publication Number Publication Date
TW200921860A true TW200921860A (en) 2009-05-16

Family

ID=40230534

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097142608A TW200921860A (en) 2007-11-06 2008-11-05 Semiconductor package

Country Status (4)

Country Link
US (1) US7960820B2 (https=)
EP (1) EP2058872A2 (https=)
JP (1) JP4912275B2 (https=)
TW (1) TW200921860A (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI406435B (zh) * 2010-08-06 2013-08-21 Advanced Optoelectronic Tech 發光二極體製造方法
TWI453957B (zh) * 2010-05-24 2014-09-21 Advanced Optoelectronic Tech 發光二極體之封裝結構
TWI843150B (zh) * 2022-02-15 2024-05-21 日商鎧俠股份有限公司 半導體裝置及半導體裝置的製造方法

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100836663B1 (ko) * 2006-02-16 2008-06-10 삼성전기주식회사 캐비티가 형성된 패키지 온 패키지 및 그 제조 방법
DE102009022901A1 (de) * 2009-05-27 2010-12-02 Osram Opto Semiconductors Gmbh Optoelektronisches Modul und Verfahren zur Herstellung eines optoelektronischen Moduls
JP2011023709A (ja) * 2009-06-18 2011-02-03 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP5208871B2 (ja) * 2009-07-13 2013-06-12 浜松ホトニクス株式会社 光検出器
JP5100715B2 (ja) * 2009-07-13 2012-12-19 株式会社東芝 半導体装置及び半導体装置の製造方法
US9443834B2 (en) 2010-09-02 2016-09-13 Micron Technology, Inc. Back-to-back solid state lighting devices and associated methods
JP2012119601A (ja) * 2010-12-03 2012-06-21 Nec Corp インターポーザ及び半導体装置
US9013011B1 (en) * 2011-03-11 2015-04-21 Amkor Technology, Inc. Stacked and staggered die MEMS package and method
US9105635B2 (en) * 2013-03-13 2015-08-11 Intel Corporation Stubby pads for channel cross-talk reduction
US10651150B2 (en) 2014-03-10 2020-05-12 Mitsubishi Heavy Industries, Ltd. Multichip module including surface mounting part embedded therein
JP2016004888A (ja) * 2014-06-17 2016-01-12 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
JP6663167B2 (ja) * 2015-03-18 2020-03-11 浜松ホトニクス株式会社 光検出装置
US11211305B2 (en) 2016-04-01 2021-12-28 Texas Instruments Incorporated Apparatus and method to support thermal management of semiconductor-based components
US10861796B2 (en) 2016-05-10 2020-12-08 Texas Instruments Incorporated Floating die package
US10179730B2 (en) 2016-12-08 2019-01-15 Texas Instruments Incorporated Electronic sensors with sensor die in package structure cavity
US10411150B2 (en) 2016-12-30 2019-09-10 Texas Instruments Incorporated Optical isolation systems and circuits and photon detectors with extended lateral P-N junctions
US9929110B1 (en) 2016-12-30 2018-03-27 Texas Instruments Incorporated Integrated circuit wave device and method
US10074639B2 (en) 2016-12-30 2018-09-11 Texas Instruments Incorporated Isolator integrated circuits with package structure cavity and fabrication methods
US10121847B2 (en) 2017-03-17 2018-11-06 Texas Instruments Incorporated Galvanic isolation device
JP6993220B2 (ja) * 2017-12-26 2022-01-13 京セラ株式会社 電子部品収納用パッケージ、電子装置および電子モジュール
DE102018100946A1 (de) * 2018-01-17 2019-07-18 Osram Opto Semiconductors Gmbh Bauteil und verfahren zur herstellung eines bauteils
KR102796767B1 (ko) * 2019-07-10 2025-04-16 삼성전자주식회사 인터포저를 포함하는 전자 장치
SG10201908828WA (en) 2019-09-23 2021-04-29 Apple Inc Embedded Packaging Concepts for Integration of ASICs and Optical Components
US11942386B2 (en) 2020-08-24 2024-03-26 Texas Instruments Incorporated Electronic devices in semiconductor package cavities
JP2022186420A (ja) 2021-06-04 2022-12-15 キオクシア株式会社 半導体装置の製造方法および半導体装置
US20240222349A1 (en) * 2021-07-01 2024-07-04 Mitsubishi Electric Corporation Power module
US12153268B2 (en) * 2022-01-03 2024-11-26 Apple Inc. Technologies for increased volumetric and functional efficiencies of optical packages
US20240332105A1 (en) * 2023-04-03 2024-10-03 Nxp Usa, Inc. Multidevice package with recessed mounting surface

Family Cites Families (10)

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Publication number Priority date Publication date Assignee Title
JPS5875859A (ja) * 1981-10-30 1983-05-07 Fujitsu Ltd 半導体装置
US5422435A (en) * 1992-05-22 1995-06-06 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
US6343019B1 (en) * 1997-12-22 2002-01-29 Micron Technology, Inc. Apparatus and method of stacking die on a substrate
US20040038442A1 (en) * 2002-08-26 2004-02-26 Kinsman Larry D. Optically interactive device packages and methods of assembly
JP2004296613A (ja) * 2003-03-26 2004-10-21 Renesas Technology Corp 半導体装置
JP2006186357A (ja) * 2003-10-03 2006-07-13 Matsushita Electric Works Ltd センサ装置及びその製造方法
JP4692260B2 (ja) * 2005-12-12 2011-06-01 株式会社デンソー 半導体力学量センサ装置およびその製造方法
JP4996101B2 (ja) 2006-02-02 2012-08-08 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
JP2007287967A (ja) * 2006-04-18 2007-11-01 Shinko Electric Ind Co Ltd 電子部品装置
JP4933934B2 (ja) * 2007-03-28 2012-05-16 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI453957B (zh) * 2010-05-24 2014-09-21 Advanced Optoelectronic Tech 發光二極體之封裝結構
TWI406435B (zh) * 2010-08-06 2013-08-21 Advanced Optoelectronic Tech 發光二極體製造方法
TWI843150B (zh) * 2022-02-15 2024-05-21 日商鎧俠股份有限公司 半導體裝置及半導體裝置的製造方法
US12444711B2 (en) 2022-02-15 2025-10-14 Kioxia Corporation Semiconductor device and method for manufacturing same

Also Published As

Publication number Publication date
JP2009117611A (ja) 2009-05-28
EP2058872A2 (en) 2009-05-13
US7960820B2 (en) 2011-06-14
US20090115049A1 (en) 2009-05-07
JP4912275B2 (ja) 2012-04-11

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