TW200723971A - Via hole having fine hole land and method for forming the same - Google Patents
Via hole having fine hole land and method for forming the sameInfo
- Publication number
- TW200723971A TW200723971A TW095125038A TW95125038A TW200723971A TW 200723971 A TW200723971 A TW 200723971A TW 095125038 A TW095125038 A TW 095125038A TW 95125038 A TW95125038 A TW 95125038A TW 200723971 A TW200723971 A TW 200723971A
- Authority
- TW
- Taiwan
- Prior art keywords
- forming
- via hole
- same
- hole
- land
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09545—Plated through-holes or blind vias without lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0542—Continuous temporary metal layer over metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1377—Protective layers
- H05K2203/1394—Covering open PTHs, e.g. by dry film resist or by metal disc
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050121752A KR100722625B1 (ko) | 2005-12-12 | 2005-12-12 | 미소 홀랜드를 갖는 비아홀 및 그 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200723971A true TW200723971A (en) | 2007-06-16 |
TWI331490B TWI331490B (en) | 2010-10-01 |
Family
ID=38138472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095125038A TWI331490B (en) | 2005-12-12 | 2006-07-10 | Via hole having fine hole land and method for forming the same |
Country Status (4)
Country | Link |
---|---|
US (2) | US7629692B2 (zh) |
JP (1) | JP4314263B2 (zh) |
KR (1) | KR100722625B1 (zh) |
TW (1) | TWI331490B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8440916B2 (en) * | 2007-06-28 | 2013-05-14 | Intel Corporation | Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method |
TWI471984B (zh) * | 2008-05-23 | 2015-02-01 | Advanced Semiconductor Eng | 具有內埋式導電線路之電路板及其製造方法 |
US8114712B1 (en) * | 2010-12-22 | 2012-02-14 | General Electric Company | Method for fabricating a semiconductor device package |
CN106982522A (zh) * | 2017-03-14 | 2017-07-25 | 开平依利安达电子第三有限公司 | 多网络通孔电路板及其制造方法 |
KR102309827B1 (ko) | 2020-05-15 | 2021-10-12 | 주식회사 디에이피 | 다층 인쇄회로기판 제조 방법 및 이에 의해 제조된 다층 인쇄회로기판 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04286389A (ja) | 1991-03-15 | 1992-10-12 | Citizen Watch Co Ltd | 回路基板の製造方法 |
JP2636537B2 (ja) * | 1991-04-08 | 1997-07-30 | 日本電気株式会社 | プリント配線板の製造方法 |
US5495665A (en) | 1994-11-04 | 1996-03-05 | International Business Machines Corporation | Process for providing a landless via connection |
JPH08186373A (ja) * | 1994-12-28 | 1996-07-16 | Nec Toyama Ltd | プリント配線板の製造方法 |
JP2000151067A (ja) | 1998-11-06 | 2000-05-30 | Mitsui Mining & Smelting Co Ltd | 新規なプリント配線板および多層プリント配線板の製造方法 |
CA2364571A1 (en) * | 1999-03-15 | 2000-09-21 | Merck & Co., Inc. | Isoforms of mouse serotonin 5-ht2c receptor |
JP3048360B1 (ja) | 1999-04-06 | 2000-06-05 | 日東電工株式会社 | 両面プリント配線板およびその製造方法 |
US20020117753A1 (en) | 2001-02-23 | 2002-08-29 | Lee Michael G. | Three dimensional packaging |
US7485812B2 (en) | 2002-06-27 | 2009-02-03 | Ppg Industries Ohio, Inc. | Single or multi-layer printed circuit board with improved via design |
JP2004146668A (ja) | 2002-10-25 | 2004-05-20 | Sharp Corp | 多層プリント配線板及びその製造方法 |
JP4113024B2 (ja) | 2003-03-31 | 2008-07-02 | 三菱製紙株式会社 | 基板の製造方法 |
JP2005286296A (ja) | 2004-03-03 | 2005-10-13 | Mitsubishi Paper Mills Ltd | 回路基板の製造方法 |
KR100632579B1 (ko) * | 2004-04-07 | 2006-10-09 | 삼성전기주식회사 | 인쇄회로기판의 비아홀 형성방법 |
KR100632577B1 (ko) * | 2004-05-03 | 2006-10-09 | 삼성전기주식회사 | 인쇄회로기판의 전해 금도금 방법 |
-
2005
- 2005-12-12 KR KR1020050121752A patent/KR100722625B1/ko active IP Right Grant
-
2006
- 2006-07-10 TW TW095125038A patent/TWI331490B/zh not_active IP Right Cessation
- 2006-07-12 US US11/484,708 patent/US7629692B2/en not_active Expired - Fee Related
- 2006-11-13 JP JP2006306612A patent/JP4314263B2/ja not_active Expired - Fee Related
-
2008
- 2008-02-06 US US12/068,457 patent/US20080209722A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US7629692B2 (en) | 2009-12-08 |
JP2007165863A (ja) | 2007-06-28 |
JP4314263B2 (ja) | 2009-08-12 |
US20070132087A1 (en) | 2007-06-14 |
US20080209722A1 (en) | 2008-09-04 |
TWI331490B (en) | 2010-10-01 |
KR100722625B1 (ko) | 2007-05-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200738085A (en) | Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate | |
TW200636942A (en) | Method of production of circuit board utilizing electroplating | |
TW200623318A (en) | Method for fabricating a multi-layer circuit board with fine pitch | |
WO2009069683A1 (ja) | 多層プリント配線板の製造方法 | |
WO2006134216A3 (en) | Circuit board structure and method for manufacturing a circuit board structure | |
TW200727752A (en) | Method of forming metal plate pattern and circuit board | |
TW200704304A (en) | Printed wiring board manufacturing method | |
EP1194021A3 (en) | Method of producing multilayer printed wiring board and multilayer printed wiring board | |
WO2007024567A3 (en) | Controlled depth etched vias | |
WO2009057419A1 (ja) | 回路形成方法 | |
TW200723971A (en) | Via hole having fine hole land and method for forming the same | |
WO2007030527A3 (en) | Photomask for the fabrication of a dual damascene structure and method for forming the same | |
ATE388614T1 (de) | Verfahren zur herstellung einer doppelseitigen leiterplatte | |
TW200746968A (en) | Method for fabricating electrical connecting structure of circuit board | |
TW200638826A (en) | Circuit board structure and fabricating method thereof | |
TW200631481A (en) | Printed wiring board manufacturing method | |
TW200744424A (en) | Method for manufacturing via holes used in printed circuit boards | |
TWI257273B (en) | Printed circuit board, method and apparatus for fabricating the same, wiring circuit pattern, and printed wiring board | |
JP2010087168A (ja) | 多層プリント配線板の製造方法 | |
JP2012227557A (ja) | プリント基板の製造方法 | |
SG128504A1 (en) | Dielectric substrate with holes and method of manufacture | |
JP2007088202A (ja) | プリント配線板およびその製造方法 | |
CN104115569B (zh) | 印刷电路板及其制造方法 | |
TW200640311A (en) | A method of manufacturing a film printed circuit board | |
KR20080087622A (ko) | 무접착 양면 fccl, 및 이를 이용한 fpcb 및 그제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |